1*a4b16dadSTom Zanussi /* SPDX-License-Identifier: GPL-2.0-only */ 2*a4b16dadSTom Zanussi /* Copyright(c) 2022 Intel Corporation */ 3*a4b16dadSTom Zanussi #ifndef _ICP_QAT_HW_20_COMP_DEFS_H 4*a4b16dadSTom Zanussi #define _ICP_QAT_HW_20_COMP_DEFS_H 5*a4b16dadSTom Zanussi 6*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_CONTROL_BITPOS 31 7*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_CONTROL_MASK 0x1 8*a4b16dadSTom Zanussi 9*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_scb_control { 10*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_CONTROL_ENABLE = 0x0, 11*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_CONTROL_DISABLE = 0x1, 12*a4b16dadSTom Zanussi }; 13*a4b16dadSTom Zanussi 14*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_CONTROL_DEFAULT_VAL \ 15*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_CONTROL_DISABLE 16*a4b16dadSTom Zanussi 17*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_RMB_CONTROL_BITPOS 30 18*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_RMB_CONTROL_MASK 0x1 19*a4b16dadSTom Zanussi 20*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_rmb_control { 21*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_RMB_CONTROL_RESET_ALL = 0x0, 22*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_RMB_CONTROL_RESET_FC_ONLY = 0x1, 23*a4b16dadSTom Zanussi }; 24*a4b16dadSTom Zanussi 25*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_RMB_CONTROL_DEFAULT_VAL \ 26*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_RMB_CONTROL_RESET_ALL 27*a4b16dadSTom Zanussi 28*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SOM_CONTROL_BITPOS 28 29*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SOM_CONTROL_MASK 0x3 30*a4b16dadSTom Zanussi 31*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_som_control { 32*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SOM_CONTROL_NORMAL_MODE = 0x0, 33*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SOM_CONTROL_REPLAY_MODE = 0x1, 34*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SOM_CONTROL_INPUT_CRC = 0x2, 35*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SOM_CONTROL_RESERVED_MODE = 0x3, 36*a4b16dadSTom Zanussi }; 37*a4b16dadSTom Zanussi 38*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SOM_CONTROL_DEFAULT_VAL \ 39*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SOM_CONTROL_NORMAL_MODE 40*a4b16dadSTom Zanussi 41*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_RD_CONTROL_BITPOS 27 42*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_RD_CONTROL_MASK 0x1 43*a4b16dadSTom Zanussi 44*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_skip_hash_rd_control { 45*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_RD_CONTROL_NO_SKIP = 0x0, 46*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_RD_CONTROL_SKIP_HASH_READS = 0x1, 47*a4b16dadSTom Zanussi }; 48*a4b16dadSTom Zanussi 49*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_RD_CONTROL_DEFAULT_VAL \ 50*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_RD_CONTROL_NO_SKIP 51*a4b16dadSTom Zanussi 52*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_UNLOAD_CONTROL_BITPOS 26 53*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_UNLOAD_CONTROL_MASK 0x1 54*a4b16dadSTom Zanussi 55*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_scb_unload_control { 56*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_UNLOAD_CONTROL_UNLOAD = 0x0, 57*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_UNLOAD_CONTROL_NO_UNLOAD = 0x1, 58*a4b16dadSTom Zanussi }; 59*a4b16dadSTom Zanussi 60*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_UNLOAD_CONTROL_DEFAULT_VAL \ 61*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_UNLOAD_CONTROL_UNLOAD 62*a4b16dadSTom Zanussi 63*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_DISABLE_TOKEN_FUSION_CONTROL_BITPOS 21 64*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_DISABLE_TOKEN_FUSION_CONTROL_MASK 0x1 65*a4b16dadSTom Zanussi 66*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_disable_token_fusion_control { 67*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_DISABLE_TOKEN_FUSION_CONTROL_ENABLE = 0x0, 68*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_DISABLE_TOKEN_FUSION_CONTROL_DISABLE = 0x1, 69*a4b16dadSTom Zanussi }; 70*a4b16dadSTom Zanussi 71*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_DISABLE_TOKEN_FUSION_CONTROL_DEFAULT_VAL \ 72*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_DISABLE_TOKEN_FUSION_CONTROL_ENABLE 73*a4b16dadSTom Zanussi 74*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LBMS_BITPOS 19 75*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LBMS_MASK 0x3 76*a4b16dadSTom Zanussi 77*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_lbms { 78*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LBMS_LBMS_64KB = 0x0, 79*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LBMS_LBMS_256KB = 0x1, 80*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LBMS_LBMS_1MB = 0x2, 81*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LBMS_LBMS_4MB = 0x3, 82*a4b16dadSTom Zanussi }; 83*a4b16dadSTom Zanussi 84*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LBMS_DEFAULT_VAL \ 85*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LBMS_LBMS_64KB 86*a4b16dadSTom Zanussi 87*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_MODE_RESET_MASK_BITPOS 18 88*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_MODE_RESET_MASK_MASK 0x1 89*a4b16dadSTom Zanussi 90*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_scb_mode_reset_mask { 91*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_MODE_RESET_MASK_RESET_COUNTERS = 0x0, 92*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_MODE_RESET_MASK_RESET_COUNTERS_AND_HISTORY = 0x1, 93*a4b16dadSTom Zanussi }; 94*a4b16dadSTom Zanussi 95*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SCB_MODE_RESET_MASK_DEFAULT_VAL \ 96*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SCB_MODE_RESET_MASK_RESET_COUNTERS 97*a4b16dadSTom Zanussi 98*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_BITPOS 9 99*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_MASK 0x1ff 100*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_DEFAULT_VAL 258 101*a4b16dadSTom Zanussi 102*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_BITPOS 0 103*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_MASK 0x1ff 104*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_DEFAULT_VAL 259 105*a4b16dadSTom Zanussi 106*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HBS_CONTROL_BITPOS 14 107*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HBS_CONTROL_MASK 0x7 108*a4b16dadSTom Zanussi 109*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_hbs_control { 110*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HBS_CONTROL_HBS_IS_32KB = 0x0, 111*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_23_HBS_CONTROL_HBS_IS_64KB = 0x1, 112*a4b16dadSTom Zanussi }; 113*a4b16dadSTom Zanussi 114*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HBS_CONTROL_DEFAULT_VAL \ 115*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HBS_CONTROL_HBS_IS_32KB 116*a4b16dadSTom Zanussi 117*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_ABD_BITPOS 13 118*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_ABD_MASK 0x1 119*a4b16dadSTom Zanussi 120*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_abd { 121*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_ABD_ABD_ENABLED = 0x0, 122*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_ABD_ABD_DISABLED = 0x1, 123*a4b16dadSTom Zanussi }; 124*a4b16dadSTom Zanussi 125*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_ABD_DEFAULT_VAL \ 126*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_ABD_ABD_ENABLED 127*a4b16dadSTom Zanussi 128*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LLLBD_CTRL_BITPOS 12 129*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LLLBD_CTRL_MASK 0x1 130*a4b16dadSTom Zanussi 131*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_lllbd_ctrl { 132*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_ENABLED = 0x0, 133*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_DISABLED = 0x1, 134*a4b16dadSTom Zanussi }; 135*a4b16dadSTom Zanussi 136*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_LLLBD_CTRL_DEFAULT_VAL \ 137*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_ENABLED 138*a4b16dadSTom Zanussi 139*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SEARCH_DEPTH_BITPOS 8 140*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SEARCH_DEPTH_MASK 0xf 141*a4b16dadSTom Zanussi 142*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_search_depth { 143*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_1 = 0x1, 144*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_6 = 0x3, 145*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_9 = 0x4, 146*a4b16dadSTom Zanussi }; 147*a4b16dadSTom Zanussi 148*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SEARCH_DEPTH_DEFAULT_VAL \ 149*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_1 150*a4b16dadSTom Zanussi 151*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HW_COMP_FORMAT_BITPOS 5 152*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HW_COMP_FORMAT_MASK 0x7 153*a4b16dadSTom Zanussi 154*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_hw_comp_format { 155*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_ILZ77 = 0x0, 156*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_DEFLATE = 0x1, 157*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_LZ4 = 0x2, 158*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_LZ4S = 0x3, 159*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_23_HW_COMP_FORMAT_ZSTD = 0x4, 160*a4b16dadSTom Zanussi }; 161*a4b16dadSTom Zanussi 162*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_HW_COMP_FORMAT_DEFAULT_VAL \ 163*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_DEFLATE 164*a4b16dadSTom Zanussi 165*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_BITPOS 4 166*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_MASK 0x1 167*a4b16dadSTom Zanussi 168*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_min_match_control { 169*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_MIN_MATCH_CONTROL_MATCH_3B = 0x0, 170*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_MIN_MATCH_CONTROL_MATCH_4B = 0x1, 171*a4b16dadSTom Zanussi }; 172*a4b16dadSTom Zanussi 173*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_DEFAULT_VAL \ 174*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_MIN_MATCH_CONTROL_MATCH_3B 175*a4b16dadSTom Zanussi 176*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_COLLISION_BITPOS 3 177*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_COLLISION_MASK 0x1 178*a4b16dadSTom Zanussi 179*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_skip_hash_collision { 180*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_COLLISION_ALLOW = 0x0, 181*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_COLLISION_DONT_ALLOW = 0x1, 182*a4b16dadSTom Zanussi }; 183*a4b16dadSTom Zanussi 184*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_COLLISION_DEFAULT_VAL \ 185*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_COLLISION_ALLOW 186*a4b16dadSTom Zanussi 187*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_UPDATE_BITPOS 2 188*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_UPDATE_MASK 0x1 189*a4b16dadSTom Zanussi 190*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_skip_hash_update { 191*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_ALLOW = 0x0, 192*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_DONT_ALLOW = 0x1, 193*a4b16dadSTom Zanussi }; 194*a4b16dadSTom Zanussi 195*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_SKIP_HASH_UPDATE_DEFAULT_VAL \ 196*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_ALLOW 197*a4b16dadSTom Zanussi 198*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_BYTE_SKIP_BITPOS 1 199*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_BYTE_SKIP_MASK 0x1 200*a4b16dadSTom Zanussi 201*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_byte_skip { 202*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_TOKEN = 0x0, 203*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_LITERAL = 0x1, 204*a4b16dadSTom Zanussi }; 205*a4b16dadSTom Zanussi 206*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_BYTE_SKIP_DEFAULT_VAL \ 207*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_TOKEN 208*a4b16dadSTom Zanussi 209*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_EXTENDED_DELAY_MATCH_MODE_BITPOS 0 210*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_EXTENDED_DELAY_MATCH_MODE_MASK 0x1 211*a4b16dadSTom Zanussi 212*a4b16dadSTom Zanussi enum icp_qat_hw_comp_20_extended_delay_match_mode { 213*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_DISABLED = 0x0, 214*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_ENABLED = 0x1, 215*a4b16dadSTom Zanussi }; 216*a4b16dadSTom Zanussi 217*a4b16dadSTom Zanussi #define ICP_QAT_HW_COMP_20_CONFIG_CSR_EXTENDED_DELAY_MATCH_MODE_DEFAULT_VAL \ 218*a4b16dadSTom Zanussi ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_DISABLED 219*a4b16dadSTom Zanussi 220*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_SPECULATIVE_DECODER_CONTROL_BITPOS 31 221*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_SPECULATIVE_DECODER_CONTROL_MASK 0x1 222*a4b16dadSTom Zanussi 223*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_speculative_decoder_control { 224*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_SPECULATIVE_DECODER_CONTROL_ENABLE = 0x0, 225*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_SPECULATIVE_DECODER_CONTROL_DISABLE = 0x1, 226*a4b16dadSTom Zanussi }; 227*a4b16dadSTom Zanussi 228*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_SPECULATIVE_DECODER_CONTROL_DEFAULT_VAL \ 229*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_SPECULATIVE_DECODER_CONTROL_ENABLE 230*a4b16dadSTom Zanussi 231*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MINI_CAM_CONTROL_BITPOS 30 232*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MINI_CAM_CONTROL_MASK 0x1 233*a4b16dadSTom Zanussi 234*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_mini_cam_control { 235*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MINI_CAM_CONTROL_ENABLE = 0x0, 236*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MINI_CAM_CONTROL_DISABLE = 0x1, 237*a4b16dadSTom Zanussi }; 238*a4b16dadSTom Zanussi 239*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MINI_CAM_CONTROL_DEFAULT_VAL \ 240*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MINI_CAM_CONTROL_ENABLE 241*a4b16dadSTom Zanussi 242*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HBS_CONTROL_BITPOS 14 243*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HBS_CONTROL_MASK 0x7 244*a4b16dadSTom Zanussi 245*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_hbs_control { 246*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HBS_CONTROL_HBS_IS_32KB = 0x0, 247*a4b16dadSTom Zanussi }; 248*a4b16dadSTom Zanussi 249*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HBS_CONTROL_DEFAULT_VAL \ 250*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HBS_CONTROL_HBS_IS_32KB 251*a4b16dadSTom Zanussi 252*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LBMS_BITPOS 8 253*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LBMS_MASK 0x3 254*a4b16dadSTom Zanussi 255*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_lbms { 256*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LBMS_LBMS_64KB = 0x0, 257*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LBMS_LBMS_256KB = 0x1, 258*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LBMS_LBMS_1MB = 0x2, 259*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LBMS_LBMS_4MB = 0x3, 260*a4b16dadSTom Zanussi }; 261*a4b16dadSTom Zanussi 262*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LBMS_DEFAULT_VAL \ 263*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LBMS_LBMS_64KB 264*a4b16dadSTom Zanussi 265*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HW_DECOMP_FORMAT_BITPOS 5 266*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HW_DECOMP_FORMAT_MASK 0x7 267*a4b16dadSTom Zanussi 268*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_hw_comp_format { 269*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_DEFLATE = 0x1, 270*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_LZ4 = 0x2, 271*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_LZ4S = 0x3, 272*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_23_HW_DECOMP_FORMAT_ZSTD = 0x4, 273*a4b16dadSTom Zanussi }; 274*a4b16dadSTom Zanussi 275*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_HW_DECOMP_FORMAT_DEFAULT_VAL \ 276*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_DEFLATE 277*a4b16dadSTom Zanussi 278*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_BITPOS 4 279*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_MASK 0x1 280*a4b16dadSTom Zanussi 281*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_min_match_control { 282*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MIN_MATCH_CONTROL_MATCH_3B = 0x0, 283*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MIN_MATCH_CONTROL_MATCH_4B = 0x1, 284*a4b16dadSTom Zanussi }; 285*a4b16dadSTom Zanussi 286*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_MIN_MATCH_CONTROL_DEFAULT_VAL \ 287*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_MIN_MATCH_CONTROL_MATCH_3B 288*a4b16dadSTom Zanussi 289*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_PRESENT_BITPOS 3 290*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_PRESENT_MASK 0x1 291*a4b16dadSTom Zanussi 292*a4b16dadSTom Zanussi enum icp_qat_hw_decomp_20_lz4_block_checksum_present { 293*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LZ4_BLOCK_CHKSUM_ABSENT = 0x0, 294*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LZ4_BLOCK_CHKSUM_PRESENT = 0x1, 295*a4b16dadSTom Zanussi }; 296*a4b16dadSTom Zanussi 297*a4b16dadSTom Zanussi #define ICP_QAT_HW_DECOMP_20_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_PRESENT_DEFAULT_VAL \ 298*a4b16dadSTom Zanussi ICP_QAT_HW_DECOMP_20_LZ4_BLOCK_CHKSUM_ABSENT 299*a4b16dadSTom Zanussi 300*a4b16dadSTom Zanussi #endif 301