1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2 /* Copyright(c) 2014 - 2021 Intel Corporation */ 3 #ifndef ADF_DRV_H 4 #define ADF_DRV_H 5 6 #include <linux/list.h> 7 #include <linux/pci.h> 8 #include "adf_accel_devices.h" 9 #include "icp_qat_fw_loader_handle.h" 10 #include "icp_qat_hal.h" 11 12 #define ADF_MAJOR_VERSION 0 13 #define ADF_MINOR_VERSION 6 14 #define ADF_BUILD_VERSION 0 15 #define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \ 16 __stringify(ADF_MINOR_VERSION) "." \ 17 __stringify(ADF_BUILD_VERSION) 18 19 #define ADF_STATUS_RESTARTING 0 20 #define ADF_STATUS_STARTING 1 21 #define ADF_STATUS_CONFIGURED 2 22 #define ADF_STATUS_STARTED 3 23 #define ADF_STATUS_AE_INITIALISED 4 24 #define ADF_STATUS_AE_UCODE_LOADED 5 25 #define ADF_STATUS_AE_STARTED 6 26 #define ADF_STATUS_PF_RUNNING 7 27 #define ADF_STATUS_IRQ_ALLOCATED 8 28 29 enum adf_dev_reset_mode { 30 ADF_DEV_RESET_ASYNC = 0, 31 ADF_DEV_RESET_SYNC 32 }; 33 34 enum adf_event { 35 ADF_EVENT_INIT = 0, 36 ADF_EVENT_START, 37 ADF_EVENT_STOP, 38 ADF_EVENT_SHUTDOWN, 39 ADF_EVENT_RESTARTING, 40 ADF_EVENT_RESTARTED, 41 }; 42 43 struct service_hndl { 44 int (*event_hld)(struct adf_accel_dev *accel_dev, 45 enum adf_event event); 46 unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; 47 unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; 48 char *name; 49 struct list_head list; 50 }; 51 52 int adf_service_register(struct service_hndl *service); 53 int adf_service_unregister(struct service_hndl *service); 54 55 int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config); 56 int adf_dev_down(struct adf_accel_dev *accel_dev, bool cache_config); 57 int adf_dev_restart(struct adf_accel_dev *accel_dev); 58 59 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); 60 void adf_clean_vf_map(bool); 61 62 int adf_ctl_dev_register(void); 63 void adf_ctl_dev_unregister(void); 64 int adf_processes_dev_register(void); 65 void adf_processes_dev_unregister(void); 66 67 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, 68 struct adf_accel_dev *pf); 69 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, 70 struct adf_accel_dev *pf); 71 struct list_head *adf_devmgr_get_head(void); 72 struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id); 73 struct adf_accel_dev *adf_devmgr_get_first(void); 74 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev); 75 int adf_devmgr_verify_id(u32 id); 76 void adf_devmgr_get_num_dev(u32 *num); 77 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); 78 int adf_dev_started(struct adf_accel_dev *accel_dev); 79 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); 80 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); 81 int adf_ae_init(struct adf_accel_dev *accel_dev); 82 int adf_ae_shutdown(struct adf_accel_dev *accel_dev); 83 int adf_ae_fw_load(struct adf_accel_dev *accel_dev); 84 void adf_ae_fw_release(struct adf_accel_dev *accel_dev); 85 int adf_ae_start(struct adf_accel_dev *accel_dev); 86 int adf_ae_stop(struct adf_accel_dev *accel_dev); 87 88 extern const struct pci_error_handlers adf_err_handler; 89 void adf_reset_sbr(struct adf_accel_dev *accel_dev); 90 void adf_reset_flr(struct adf_accel_dev *accel_dev); 91 void adf_dev_restore(struct adf_accel_dev *accel_dev); 92 int adf_init_aer(void); 93 void adf_exit_aer(void); 94 int adf_init_admin_comms(struct adf_accel_dev *accel_dev); 95 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); 96 int adf_send_admin_init(struct adf_accel_dev *accel_dev); 97 int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); 98 int adf_init_arb(struct adf_accel_dev *accel_dev); 99 void adf_exit_arb(struct adf_accel_dev *accel_dev); 100 void adf_update_ring_arb(struct adf_etr_ring_data *ring); 101 102 int adf_dev_get(struct adf_accel_dev *accel_dev); 103 void adf_dev_put(struct adf_accel_dev *accel_dev); 104 int adf_dev_in_use(struct adf_accel_dev *accel_dev); 105 int adf_init_etr_data(struct adf_accel_dev *accel_dev); 106 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); 107 int qat_crypto_register(void); 108 int qat_crypto_unregister(void); 109 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev); 110 struct qat_crypto_instance *qat_crypto_get_instance_node(int node); 111 void qat_crypto_put_instance(struct qat_crypto_instance *inst); 112 void qat_alg_callback(void *resp); 113 void qat_alg_asym_callback(void *resp); 114 int qat_algs_register(void); 115 void qat_algs_unregister(void); 116 int qat_asym_algs_register(void); 117 void qat_asym_algs_unregister(void); 118 119 struct qat_compression_instance *qat_compression_get_instance_node(int node); 120 void qat_compression_put_instance(struct qat_compression_instance *inst); 121 int qat_compression_register(void); 122 int qat_compression_unregister(void); 123 int qat_comp_algs_register(void); 124 void qat_comp_algs_unregister(void); 125 void qat_comp_alg_callback(void *resp); 126 127 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 128 void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 129 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 130 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); 131 132 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); 133 134 int adf_sysfs_init(struct adf_accel_dev *accel_dev); 135 136 int qat_hal_init(struct adf_accel_dev *accel_dev); 137 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); 138 int qat_hal_start(struct icp_qat_fw_loader_handle *handle); 139 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 140 unsigned int ctx_mask); 141 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); 142 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); 143 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, 144 unsigned char ae, unsigned int ctx_mask); 145 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, 146 unsigned int ae); 147 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, 148 unsigned char ae, enum icp_qat_uof_regtype lm_type, 149 unsigned char mode); 150 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, 151 unsigned char ae, unsigned char mode); 152 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, 153 unsigned char ae, unsigned char mode); 154 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, 155 unsigned char ae, unsigned int ctx_mask, unsigned int upc); 156 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, 157 unsigned char ae, unsigned int uaddr, 158 unsigned int words_num, u64 *uword); 159 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 160 unsigned int uword_addr, unsigned int words_num, 161 unsigned int *data); 162 int qat_hal_get_ins_num(void); 163 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, 164 unsigned char ae, 165 struct icp_qat_uof_batch_init *lm_init_header); 166 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, 167 unsigned char ae, unsigned long ctx_mask, 168 enum icp_qat_uof_regtype reg_type, 169 unsigned short reg_num, unsigned int regdata); 170 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, 171 unsigned char ae, unsigned long ctx_mask, 172 enum icp_qat_uof_regtype reg_type, 173 unsigned short reg_num, unsigned int regdata); 174 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, 175 unsigned char ae, unsigned long ctx_mask, 176 enum icp_qat_uof_regtype reg_type, 177 unsigned short reg_num, unsigned int regdata); 178 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, 179 unsigned char ae, unsigned long ctx_mask, 180 unsigned short reg_num, unsigned int regdata); 181 int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle, 182 unsigned char ae, unsigned short lm_addr, unsigned int value); 183 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, 184 unsigned char ae, unsigned char mode); 185 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); 186 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); 187 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr, 188 int mem_size); 189 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, 190 void *addr_ptr, u32 mem_size, char *obj_name); 191 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, 192 unsigned int cfg_ae_mask); 193 int adf_init_misc_wq(void); 194 void adf_exit_misc_wq(void); 195 bool adf_misc_wq_queue_work(struct work_struct *work); 196 #if defined(CONFIG_PCI_IOV) 197 int adf_sriov_configure(struct pci_dev *pdev, int numvfs); 198 void adf_disable_sriov(struct adf_accel_dev *accel_dev); 199 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask); 200 void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev); 201 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); 202 bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr); 203 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); 204 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 205 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 206 void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info); 207 int adf_init_pf_wq(void); 208 void adf_exit_pf_wq(void); 209 int adf_init_vf_wq(void); 210 void adf_exit_vf_wq(void); 211 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); 212 #else 213 #define adf_sriov_configure NULL 214 215 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) 216 { 217 } 218 219 static inline int adf_init_pf_wq(void) 220 { 221 return 0; 222 } 223 224 static inline void adf_exit_pf_wq(void) 225 { 226 } 227 228 static inline int adf_init_vf_wq(void) 229 { 230 return 0; 231 } 232 233 static inline void adf_exit_vf_wq(void) 234 { 235 } 236 237 #endif 238 239 static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev) 240 { 241 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 242 struct adf_bar *pmisc; 243 244 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; 245 246 return pmisc->virt_addr; 247 } 248 249 #endif 250