1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) 2 /* Copyright(c) 2014 - 2020 Intel Corporation */ 3 #include <linux/types.h> 4 #include <linux/mutex.h> 5 #include <linux/slab.h> 6 #include <linux/iopoll.h> 7 #include <linux/pci.h> 8 #include <linux/dma-mapping.h> 9 #include "adf_accel_devices.h" 10 #include "adf_common_drv.h" 11 #include "icp_qat_fw_init_admin.h" 12 13 #define ADF_ADMIN_MAILBOX_STRIDE 0x1000 14 #define ADF_ADMINMSG_LEN 32 15 #define ADF_CONST_TABLE_SIZE 1024 16 #define ADF_ADMIN_POLL_DELAY_US 20 17 #define ADF_ADMIN_POLL_TIMEOUT_US (5 * USEC_PER_SEC) 18 19 static const u8 const_tab[1024] __aligned(1024) = { 20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 26 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 27 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 28 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 29 0x00, 0x00, 0x00, 0x03, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 30 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 31 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 0x02, 0x00, 0x00, 32 0x00, 0x00, 0x00, 0x00, 0x13, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 33 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 34 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 35 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 36 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 37 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 38 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 39 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 43 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 44 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76, 45 0x54, 0x32, 0x10, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67, 0x45, 0x23, 0x01, 0xef, 0xcd, 0xab, 47 0x89, 0x98, 0xba, 0xdc, 0xfe, 0x10, 0x32, 0x54, 0x76, 0xc3, 0xd2, 0xe1, 0xf0, 48 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 49 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0x05, 0x9e, 51 0xd8, 0x36, 0x7c, 0xd5, 0x07, 0x30, 0x70, 0xdd, 0x17, 0xf7, 0x0e, 0x59, 0x39, 52 0xff, 0xc0, 0x0b, 0x31, 0x68, 0x58, 0x15, 0x11, 0x64, 0xf9, 0x8f, 0xa7, 0xbe, 53 0xfa, 0x4f, 0xa4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6a, 0x09, 0xe6, 0x67, 0xbb, 0x67, 0xae, 55 0x85, 0x3c, 0x6e, 0xf3, 0x72, 0xa5, 0x4f, 0xf5, 0x3a, 0x51, 0x0e, 0x52, 0x7f, 56 0x9b, 0x05, 0x68, 0x8c, 0x1f, 0x83, 0xd9, 0xab, 0x5b, 0xe0, 0xcd, 0x19, 0x05, 57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 58 0x00, 0x00, 0xcb, 0xbb, 0x9d, 0x5d, 0xc1, 0x05, 0x9e, 0xd8, 0x62, 0x9a, 0x29, 59 0x2a, 0x36, 0x7c, 0xd5, 0x07, 0x91, 0x59, 0x01, 0x5a, 0x30, 0x70, 0xdd, 0x17, 60 0x15, 0x2f, 0xec, 0xd8, 0xf7, 0x0e, 0x59, 0x39, 0x67, 0x33, 0x26, 0x67, 0xff, 61 0xc0, 0x0b, 0x31, 0x8e, 0xb4, 0x4a, 0x87, 0x68, 0x58, 0x15, 0x11, 0xdb, 0x0c, 62 0x2e, 0x0d, 0x64, 0xf9, 0x8f, 0xa7, 0x47, 0xb5, 0x48, 0x1d, 0xbe, 0xfa, 0x4f, 63 0xa4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 64 0x00, 0x00, 0x00, 0x00, 0x6a, 0x09, 0xe6, 0x67, 0xf3, 0xbc, 0xc9, 0x08, 0xbb, 65 0x67, 0xae, 0x85, 0x84, 0xca, 0xa7, 0x3b, 0x3c, 0x6e, 0xf3, 0x72, 0xfe, 0x94, 66 0xf8, 0x2b, 0xa5, 0x4f, 0xf5, 0x3a, 0x5f, 0x1d, 0x36, 0xf1, 0x51, 0x0e, 0x52, 67 0x7f, 0xad, 0xe6, 0x82, 0xd1, 0x9b, 0x05, 0x68, 0x8c, 0x2b, 0x3e, 0x6c, 0x1f, 68 0x1f, 0x83, 0xd9, 0xab, 0xfb, 0x41, 0xbd, 0x6b, 0x5b, 0xe0, 0xcd, 0x19, 0x13, 69 0x7e, 0x21, 0x79, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 70 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 71 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x18, 73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 74 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x01, 0x00, 75 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 76 0x15, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x02, 0x00, 0x00, 0x00, 77 0x00, 0x00, 0x00, 0x14, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x02, 78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 79 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 80 0x00, 0x00, 0x00, 0x00, 0x24, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 81 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 82 0x00, 0x00, 0x12, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x00, 0x00, 83 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 84 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x01, 0x00, 0x00, 0x00, 85 0x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x01, 86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 87 0x00, 0x2B, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 88 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 89 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 95 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 96 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 97 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 98 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; 99 100 struct adf_admin_comms { 101 dma_addr_t phy_addr; 102 dma_addr_t const_tbl_addr; 103 void *virt_addr; 104 void *virt_tbl_addr; 105 void __iomem *mailbox_addr; 106 struct mutex lock; /* protects adf_admin_comms struct */ 107 }; 108 109 static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, 110 void *in, void *out) 111 { 112 int ret; 113 u32 status; 114 struct adf_admin_comms *admin = accel_dev->admin; 115 int offset = ae * ADF_ADMINMSG_LEN * 2; 116 void __iomem *mailbox = admin->mailbox_addr; 117 int mb_offset = ae * ADF_ADMIN_MAILBOX_STRIDE; 118 struct icp_qat_fw_init_admin_req *request = in; 119 120 mutex_lock(&admin->lock); 121 122 if (ADF_CSR_RD(mailbox, mb_offset) == 1) { 123 mutex_unlock(&admin->lock); 124 return -EAGAIN; 125 } 126 127 memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN); 128 ADF_CSR_WR(mailbox, mb_offset, 1); 129 130 ret = read_poll_timeout(ADF_CSR_RD, status, status == 0, 131 ADF_ADMIN_POLL_DELAY_US, 132 ADF_ADMIN_POLL_TIMEOUT_US, true, 133 mailbox, mb_offset); 134 if (ret < 0) { 135 /* Response timeout */ 136 dev_err(&GET_DEV(accel_dev), 137 "Failed to send admin msg %d to accelerator %d\n", 138 request->cmd_id, ae); 139 } else { 140 /* Response received from admin message, we can now 141 * make response data available in "out" parameter. 142 */ 143 memcpy(out, admin->virt_addr + offset + 144 ADF_ADMINMSG_LEN, ADF_ADMINMSG_LEN); 145 } 146 147 mutex_unlock(&admin->lock); 148 return ret; 149 } 150 151 static int adf_send_admin(struct adf_accel_dev *accel_dev, 152 struct icp_qat_fw_init_admin_req *req, 153 struct icp_qat_fw_init_admin_resp *resp, 154 const unsigned long ae_mask) 155 { 156 u32 ae; 157 158 for_each_set_bit(ae, &ae_mask, ICP_QAT_HW_AE_DELIMITER) 159 if (adf_put_admin_msg_sync(accel_dev, ae, req, resp) || 160 resp->status) 161 return -EFAULT; 162 163 return 0; 164 } 165 166 static int adf_init_ae(struct adf_accel_dev *accel_dev) 167 { 168 struct icp_qat_fw_init_admin_req req; 169 struct icp_qat_fw_init_admin_resp resp; 170 struct adf_hw_device_data *hw_device = accel_dev->hw_device; 171 u32 ae_mask = hw_device->ae_mask; 172 173 memset(&req, 0, sizeof(req)); 174 memset(&resp, 0, sizeof(resp)); 175 req.cmd_id = ICP_QAT_FW_INIT_AE; 176 177 return adf_send_admin(accel_dev, &req, &resp, ae_mask); 178 } 179 180 static int adf_set_fw_constants(struct adf_accel_dev *accel_dev) 181 { 182 struct icp_qat_fw_init_admin_req req; 183 struct icp_qat_fw_init_admin_resp resp; 184 struct adf_hw_device_data *hw_device = accel_dev->hw_device; 185 u32 ae_mask = hw_device->admin_ae_mask ?: hw_device->ae_mask; 186 187 memset(&req, 0, sizeof(req)); 188 memset(&resp, 0, sizeof(resp)); 189 req.cmd_id = ICP_QAT_FW_CONSTANTS_CFG; 190 191 req.init_cfg_sz = ADF_CONST_TABLE_SIZE; 192 req.init_cfg_ptr = accel_dev->admin->const_tbl_addr; 193 194 return adf_send_admin(accel_dev, &req, &resp, ae_mask); 195 } 196 197 static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev, 198 u32 *capabilities) 199 { 200 struct adf_hw_device_data *hw_device = accel_dev->hw_device; 201 struct icp_qat_fw_init_admin_resp resp; 202 struct icp_qat_fw_init_admin_req req; 203 unsigned long ae_mask; 204 unsigned long ae; 205 int ret; 206 207 /* Target only service accelerator engines */ 208 ae_mask = hw_device->ae_mask & ~hw_device->admin_ae_mask; 209 210 memset(&req, 0, sizeof(req)); 211 memset(&resp, 0, sizeof(resp)); 212 req.cmd_id = ICP_QAT_FW_COMP_CAPABILITY_GET; 213 214 *capabilities = 0; 215 for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) { 216 ret = adf_send_admin(accel_dev, &req, &resp, 1ULL << ae); 217 if (ret) 218 return ret; 219 220 *capabilities |= resp.extended_features; 221 } 222 223 return 0; 224 } 225 226 /** 227 * adf_send_admin_init() - Function sends init message to FW 228 * @accel_dev: Pointer to acceleration device. 229 * 230 * Function sends admin init message to the FW 231 * 232 * Return: 0 on success, error code otherwise. 233 */ 234 int adf_send_admin_init(struct adf_accel_dev *accel_dev) 235 { 236 u32 dc_capabilities = 0; 237 int ret; 238 239 ret = adf_get_dc_capabilities(accel_dev, &dc_capabilities); 240 if (ret) { 241 dev_err(&GET_DEV(accel_dev), "Cannot get dc capabilities\n"); 242 return ret; 243 } 244 accel_dev->hw_device->extended_dc_capabilities = dc_capabilities; 245 246 ret = adf_set_fw_constants(accel_dev); 247 if (ret) 248 return ret; 249 250 return adf_init_ae(accel_dev); 251 } 252 EXPORT_SYMBOL_GPL(adf_send_admin_init); 253 254 /** 255 * adf_init_admin_pm() - Function sends PM init message to FW 256 * @accel_dev: Pointer to acceleration device. 257 * @idle_delay: QAT HW idle time before power gating is initiated. 258 * 000 - 64us 259 * 001 - 128us 260 * 010 - 256us 261 * 011 - 512us 262 * 100 - 1ms 263 * 101 - 2ms 264 * 110 - 4ms 265 * 111 - 8ms 266 * 267 * Function sends to the FW the admin init message for the PM state 268 * configuration. 269 * 270 * Return: 0 on success, error code otherwise. 271 */ 272 int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay) 273 { 274 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 275 struct icp_qat_fw_init_admin_resp resp = {0}; 276 struct icp_qat_fw_init_admin_req req = {0}; 277 u32 ae_mask = hw_data->admin_ae_mask; 278 279 if (!accel_dev->admin) { 280 dev_err(&GET_DEV(accel_dev), "adf_admin is not available\n"); 281 return -EFAULT; 282 } 283 284 req.cmd_id = ICP_QAT_FW_PM_STATE_CONFIG; 285 req.idle_filter = idle_delay; 286 287 return adf_send_admin(accel_dev, &req, &resp, ae_mask); 288 } 289 290 int adf_init_admin_comms(struct adf_accel_dev *accel_dev) 291 { 292 struct adf_admin_comms *admin; 293 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 294 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); 295 struct admin_info admin_csrs_info; 296 u32 mailbox_offset, adminmsg_u, adminmsg_l; 297 void __iomem *mailbox; 298 u64 reg_val; 299 300 admin = kzalloc_node(sizeof(*accel_dev->admin), GFP_KERNEL, 301 dev_to_node(&GET_DEV(accel_dev))); 302 if (!admin) 303 return -ENOMEM; 304 admin->virt_addr = dma_alloc_coherent(&GET_DEV(accel_dev), PAGE_SIZE, 305 &admin->phy_addr, GFP_KERNEL); 306 if (!admin->virt_addr) { 307 dev_err(&GET_DEV(accel_dev), "Failed to allocate dma buff\n"); 308 kfree(admin); 309 return -ENOMEM; 310 } 311 312 admin->virt_tbl_addr = dma_alloc_coherent(&GET_DEV(accel_dev), 313 PAGE_SIZE, 314 &admin->const_tbl_addr, 315 GFP_KERNEL); 316 if (!admin->virt_tbl_addr) { 317 dev_err(&GET_DEV(accel_dev), "Failed to allocate const_tbl\n"); 318 dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, 319 admin->virt_addr, admin->phy_addr); 320 kfree(admin); 321 return -ENOMEM; 322 } 323 324 memcpy(admin->virt_tbl_addr, const_tab, sizeof(const_tab)); 325 hw_data->get_admin_info(&admin_csrs_info); 326 327 mailbox_offset = admin_csrs_info.mailbox_offset; 328 mailbox = pmisc_addr + mailbox_offset; 329 adminmsg_u = admin_csrs_info.admin_msg_ur; 330 adminmsg_l = admin_csrs_info.admin_msg_lr; 331 332 reg_val = (u64)admin->phy_addr; 333 ADF_CSR_WR(pmisc_addr, adminmsg_u, upper_32_bits(reg_val)); 334 ADF_CSR_WR(pmisc_addr, adminmsg_l, lower_32_bits(reg_val)); 335 336 mutex_init(&admin->lock); 337 admin->mailbox_addr = mailbox; 338 accel_dev->admin = admin; 339 return 0; 340 } 341 EXPORT_SYMBOL_GPL(adf_init_admin_comms); 342 343 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev) 344 { 345 struct adf_admin_comms *admin = accel_dev->admin; 346 347 if (!admin) 348 return; 349 350 if (admin->virt_addr) 351 dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, 352 admin->virt_addr, admin->phy_addr); 353 if (admin->virt_tbl_addr) 354 dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, 355 admin->virt_tbl_addr, admin->const_tbl_addr); 356 357 mutex_destroy(&admin->lock); 358 kfree(admin); 359 accel_dev->admin = NULL; 360 } 361 EXPORT_SYMBOL_GPL(adf_exit_admin_comms); 362