1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2019 HiSilicon Limited. */
3 #ifndef __HISI_HPRE_H
4 #define __HISI_HPRE_H
5 
6 #include <linux/list.h>
7 #include "../qm.h"
8 
9 #define HPRE_SQE_SIZE			sizeof(struct hpre_sqe)
10 #define HPRE_PF_DEF_Q_NUM		64
11 #define HPRE_PF_DEF_Q_BASE		0
12 
13 enum {
14 	HPRE_CLUSTER0,
15 	HPRE_CLUSTER1,
16 	HPRE_CLUSTER2,
17 	HPRE_CLUSTER3,
18 	HPRE_CLUSTERS_NUM,
19 };
20 
21 enum hpre_ctrl_dbgfs_file {
22 	HPRE_CURRENT_QM,
23 	HPRE_CLEAR_ENABLE,
24 	HPRE_CLUSTER_CTRL,
25 	HPRE_DEBUG_FILE_NUM,
26 };
27 
28 #define HPRE_DEBUGFS_FILE_NUM    (HPRE_DEBUG_FILE_NUM + HPRE_CLUSTERS_NUM - 1)
29 
30 struct hpre_debugfs_file {
31 	int index;
32 	enum hpre_ctrl_dbgfs_file type;
33 	spinlock_t lock;
34 	struct hpre_debug *debug;
35 };
36 
37 /*
38  * One HPRE controller has one PF and multiple VFs, some global configurations
39  * which PF has need this structure.
40  * Just relevant for PF.
41  */
42 struct hpre_debug {
43 	struct dentry *debug_root;
44 	struct hpre_debugfs_file files[HPRE_DEBUGFS_FILE_NUM];
45 };
46 
47 struct hpre {
48 	struct hisi_qm qm;
49 	struct hpre_debug debug;
50 	u32 num_vfs;
51 	unsigned long status;
52 };
53 
54 enum hpre_alg_type {
55 	HPRE_ALG_NC_NCRT = 0x0,
56 	HPRE_ALG_NC_CRT = 0x1,
57 	HPRE_ALG_KG_STD = 0x2,
58 	HPRE_ALG_KG_CRT = 0x3,
59 	HPRE_ALG_DH_G2 = 0x4,
60 	HPRE_ALG_DH = 0x5,
61 };
62 
63 struct hpre_sqe {
64 	__le32 dw0;
65 	__u8 task_len1;
66 	__u8 task_len2;
67 	__u8 mrttest_num;
68 	__u8 resv1;
69 	__le64 key;
70 	__le64 in;
71 	__le64 out;
72 	__le16 tag;
73 	__le16 resv2;
74 #define _HPRE_SQE_ALIGN_EXT	7
75 	__le32 rsvd1[_HPRE_SQE_ALIGN_EXT];
76 };
77 
78 struct hisi_qp *hpre_create_qp(void);
79 int hpre_algs_register(void);
80 void hpre_algs_unregister(void);
81 
82 #endif
83