1 /*
2  * This file is part of the Chelsio T6 Crypto driver for Linux.
3  *
4  * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  *
34  */
35 
36 #ifndef __CHCR_CORE_H__
37 #define __CHCR_CORE_H__
38 
39 #include <crypto/algapi.h>
40 #include "t4_hw.h"
41 #include "cxgb4.h"
42 #include "cxgb4_uld.h"
43 
44 #define DRV_MODULE_NAME "chcr"
45 #define DRV_VERSION "1.0.0.0"
46 
47 #define MAX_PENDING_REQ_TO_HW 20
48 #define CHCR_TEST_RESPONSE_TIMEOUT 1000
49 
50 #define PAD_ERROR_BIT		1
51 #define CHK_PAD_ERR_BIT(x)	(((x) >> PAD_ERROR_BIT) & 1)
52 
53 #define MAC_ERROR_BIT		0
54 #define CHK_MAC_ERR_BIT(x)	(((x) >> MAC_ERROR_BIT) & 1)
55 #define MAX_SALT                4
56 
57 struct uld_ctx;
58 
59 struct _key_ctx {
60 	__be32 ctx_hdr;
61 	u8 salt[MAX_SALT];
62 	__be64 reserverd;
63 	unsigned char key[0];
64 };
65 
66 struct chcr_wr {
67 	struct fw_crypto_lookaside_wr wreq;
68 	struct ulp_txpkt ulptx;
69 	struct ulptx_idata sc_imm;
70 	struct cpl_tx_sec_pdu sec_cpl;
71 	struct _key_ctx key_ctx;
72 };
73 
74 struct chcr_dev {
75 	spinlock_t lock_chcr_dev;
76 	struct uld_ctx *u_ctx;
77 	unsigned char tx_channel_id;
78 	unsigned char rx_channel_id;
79 };
80 
81 struct uld_ctx {
82 	struct list_head entry;
83 	struct cxgb4_lld_info lldi;
84 	struct chcr_dev *dev;
85 };
86 
87 int assign_chcr_device(struct chcr_dev **dev);
88 int chcr_send_wr(struct sk_buff *skb);
89 int start_crypto(void);
90 int stop_crypto(void);
91 int chcr_uld_rx_handler(void *handle, const __be64 *rsp,
92 			const struct pkt_gl *pgl);
93 int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input,
94 		     int err);
95 #endif /* __CHCR_CORE_H__ */
96