1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
3 
4 #ifndef __CC_SRAM_MGR_H__
5 #define __CC_SRAM_MGR_H__
6 
7 #ifndef CC_CC_SRAM_SIZE
8 #define CC_CC_SRAM_SIZE 4096
9 #endif
10 
11 struct cc_drvdata;
12 
13 #define NULL_SRAM_ADDR ((u32)-1)
14 
15 /**
16  * cc_sram_mgr_init() - Initializes SRAM pool.
17  * The first X bytes of SRAM are reserved for ROM usage, hence, pool
18  * starts right after X bytes.
19  *
20  * @drvdata: Associated device driver context
21  *
22  * Return:
23  * Zero for success, negative value otherwise.
24  */
25 int cc_sram_mgr_init(struct cc_drvdata *drvdata);
26 
27 /**
28  * cc_sram_alloc() - Allocate buffer from SRAM pool.
29  *
30  * @drvdata: Associated device driver context
31  * @size: The requested bytes to allocate
32  *
33  * Return:
34  * Address offset in SRAM or NULL_SRAM_ADDR for failure.
35  */
36 u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);
37 
38 /**
39  * cc_set_sram_desc() - Create const descriptors sequence to
40  *	set values in given array into SRAM.
41  * Note: each const value can't exceed word size.
42  *
43  * @src:	  A pointer to array of words to set as consts.
44  * @dst:	  The target SRAM buffer to set into
45  * @nelement:	  The number of words in "src" array
46  * @seq:	  A pointer to the given IN/OUT descriptor sequence
47  * @seq_len:	  A pointer to the given IN/OUT sequence length
48  */
49 void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
50 		      struct cc_hw_desc *seq, unsigned int *seq_len);
51 
52 #endif /*__CC_SRAM_MGR_H__*/
53