1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */ 3 4 #ifndef __CC_SRAM_MGR_H__ 5 #define __CC_SRAM_MGR_H__ 6 7 #ifndef CC_CC_SRAM_SIZE 8 #define CC_CC_SRAM_SIZE 4096 9 #endif 10 11 struct cc_drvdata; 12 13 /** 14 * Address (offset) within CC internal SRAM 15 */ 16 17 typedef u64 cc_sram_addr_t; 18 19 #define NULL_SRAM_ADDR ((cc_sram_addr_t)-1) 20 21 /*! 22 * Initializes SRAM pool. 23 * The first X bytes of SRAM are reserved for ROM usage, hence, pool 24 * starts right after X bytes. 25 * 26 * \param drvdata 27 * 28 * \return int Zero for success, negative value otherwise. 29 */ 30 int cc_sram_mgr_init(struct cc_drvdata *drvdata); 31 32 /*! 33 * Allocate buffer from SRAM pool. 34 * 35 * \param drvdata 36 * \param size The requested bytes to allocate 37 */ 38 cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size); 39 40 /** 41 * cc_set_sram_desc() - Create const descriptors sequence to 42 * set values in given array into SRAM. 43 * Note: each const value can't exceed word size. 44 * 45 * @src: A pointer to array of words to set as consts. 46 * @dst: The target SRAM buffer to set into 47 * @nelements: The number of words in "src" array 48 * @seq: A pointer to the given IN/OUT descriptor sequence 49 * @seq_len: A pointer to the given IN/OUT sequence length 50 */ 51 void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst, 52 unsigned int nelement, struct cc_hw_desc *seq, 53 unsigned int *seq_len); 54 55 #endif /*__CC_SRAM_MGR_H__*/ 56