14c3f9727SGilad Ben-Yossef /* SPDX-License-Identifier: GPL-2.0 */ 203963caeSGilad Ben-Yossef /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */ 34c3f9727SGilad Ben-Yossef 44c3f9727SGilad Ben-Yossef #ifndef __CC_SRAM_MGR_H__ 54c3f9727SGilad Ben-Yossef #define __CC_SRAM_MGR_H__ 64c3f9727SGilad Ben-Yossef 74c3f9727SGilad Ben-Yossef #ifndef CC_CC_SRAM_SIZE 84c3f9727SGilad Ben-Yossef #define CC_CC_SRAM_SIZE 4096 94c3f9727SGilad Ben-Yossef #endif 104c3f9727SGilad Ben-Yossef 114c3f9727SGilad Ben-Yossef struct cc_drvdata; 124c3f9727SGilad Ben-Yossef 134c3f9727SGilad Ben-Yossef /** 144c3f9727SGilad Ben-Yossef * Address (offset) within CC internal SRAM 154c3f9727SGilad Ben-Yossef */ 164c3f9727SGilad Ben-Yossef 174c3f9727SGilad Ben-Yossef typedef u64 cc_sram_addr_t; 184c3f9727SGilad Ben-Yossef 194c3f9727SGilad Ben-Yossef #define NULL_SRAM_ADDR ((cc_sram_addr_t)-1) 204c3f9727SGilad Ben-Yossef 214c3f9727SGilad Ben-Yossef /*! 224c3f9727SGilad Ben-Yossef * Initializes SRAM pool. 234c3f9727SGilad Ben-Yossef * The first X bytes of SRAM are reserved for ROM usage, hence, pool 244c3f9727SGilad Ben-Yossef * starts right after X bytes. 254c3f9727SGilad Ben-Yossef * 264c3f9727SGilad Ben-Yossef * \param drvdata 274c3f9727SGilad Ben-Yossef * 284c3f9727SGilad Ben-Yossef * \return int Zero for success, negative value otherwise. 294c3f9727SGilad Ben-Yossef */ 304c3f9727SGilad Ben-Yossef int cc_sram_mgr_init(struct cc_drvdata *drvdata); 314c3f9727SGilad Ben-Yossef 324c3f9727SGilad Ben-Yossef /*! 334c3f9727SGilad Ben-Yossef * Uninits SRAM pool. 344c3f9727SGilad Ben-Yossef * 354c3f9727SGilad Ben-Yossef * \param drvdata 364c3f9727SGilad Ben-Yossef */ 374c3f9727SGilad Ben-Yossef void cc_sram_mgr_fini(struct cc_drvdata *drvdata); 384c3f9727SGilad Ben-Yossef 394c3f9727SGilad Ben-Yossef /*! 404c3f9727SGilad Ben-Yossef * Allocated buffer from SRAM pool. 414c3f9727SGilad Ben-Yossef * Note: Caller is responsible to free the LAST allocated buffer. 424c3f9727SGilad Ben-Yossef * This function does not taking care of any fragmentation may occur 434c3f9727SGilad Ben-Yossef * by the order of calls to alloc/free. 444c3f9727SGilad Ben-Yossef * 454c3f9727SGilad Ben-Yossef * \param drvdata 464c3f9727SGilad Ben-Yossef * \param size The requested bytes to allocate 474c3f9727SGilad Ben-Yossef */ 484c3f9727SGilad Ben-Yossef cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size); 494c3f9727SGilad Ben-Yossef 504c3f9727SGilad Ben-Yossef /** 514c3f9727SGilad Ben-Yossef * cc_set_sram_desc() - Create const descriptors sequence to 524c3f9727SGilad Ben-Yossef * set values in given array into SRAM. 534c3f9727SGilad Ben-Yossef * Note: each const value can't exceed word size. 544c3f9727SGilad Ben-Yossef * 554c3f9727SGilad Ben-Yossef * @src: A pointer to array of words to set as consts. 564c3f9727SGilad Ben-Yossef * @dst: The target SRAM buffer to set into 574c3f9727SGilad Ben-Yossef * @nelements: The number of words in "src" array 584c3f9727SGilad Ben-Yossef * @seq: A pointer to the given IN/OUT descriptor sequence 594c3f9727SGilad Ben-Yossef * @seq_len: A pointer to the given IN/OUT sequence length 604c3f9727SGilad Ben-Yossef */ 614c3f9727SGilad Ben-Yossef void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst, 624c3f9727SGilad Ben-Yossef unsigned int nelement, struct cc_hw_desc *seq, 634c3f9727SGilad Ben-Yossef unsigned int *seq_len); 644c3f9727SGilad Ben-Yossef 654c3f9727SGilad Ben-Yossef #endif /*__CC_SRAM_MGR_H__*/ 66