1 /* 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 3 * Copyright 2017 NXP 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the names of the above-listed copyright holders nor the 13 * names of any contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * 17 * ALTERNATIVELY, this software may be distributed under the terms of the 18 * GNU General Public License ("GPL") as published by the Free Software 19 * Foundation, either version 2 of that License or (at your option) any 20 * later version. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef _SG_SW_QM2_H_ 36 #define _SG_SW_QM2_H_ 37 38 #include <soc/fsl/dpaa2-fd.h> 39 40 static inline void dma_to_qm_sg_one(struct dpaa2_sg_entry *qm_sg_ptr, 41 dma_addr_t dma, u32 len, u16 offset) 42 { 43 dpaa2_sg_set_addr(qm_sg_ptr, dma); 44 dpaa2_sg_set_format(qm_sg_ptr, dpaa2_sg_single); 45 dpaa2_sg_set_final(qm_sg_ptr, false); 46 dpaa2_sg_set_len(qm_sg_ptr, len); 47 dpaa2_sg_set_bpid(qm_sg_ptr, 0); 48 dpaa2_sg_set_offset(qm_sg_ptr, offset); 49 } 50 51 /* 52 * convert scatterlist to h/w link table format 53 * but does not have final bit; instead, returns last entry 54 */ 55 static inline struct dpaa2_sg_entry * 56 sg_to_qm_sg(struct scatterlist *sg, int sg_count, 57 struct dpaa2_sg_entry *qm_sg_ptr, u16 offset) 58 { 59 while (sg_count && sg) { 60 dma_to_qm_sg_one(qm_sg_ptr, sg_dma_address(sg), 61 sg_dma_len(sg), offset); 62 qm_sg_ptr++; 63 sg = sg_next(sg); 64 sg_count--; 65 } 66 return qm_sg_ptr - 1; 67 } 68 69 /* 70 * convert scatterlist to h/w link table format 71 * scatterlist must have been previously dma mapped 72 */ 73 static inline void sg_to_qm_sg_last(struct scatterlist *sg, int sg_count, 74 struct dpaa2_sg_entry *qm_sg_ptr, 75 u16 offset) 76 { 77 qm_sg_ptr = sg_to_qm_sg(sg, sg_count, qm_sg_ptr, offset); 78 dpaa2_sg_set_final(qm_sg_ptr, true); 79 } 80 81 #endif /* _SG_SW_QM2_H_ */ 82