1 /* 2 * Copyright 2013-2016 Freescale Semiconductor, Inc. 3 * Copyright 2016-2017 NXP 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of Freescale Semiconductor nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * 17 * ALTERNATIVELY, this software may be distributed under the terms of the 18 * GNU General Public License ("GPL") as published by the Free Software 19 * Foundation, either version 2 of that License or (at your option) any 20 * later version. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 23 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 26 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef __SG_SW_QM_H 35 #define __SG_SW_QM_H 36 37 #include <soc/fsl/qman.h> 38 #include "regs.h" 39 40 static inline void __dma_to_qm_sg(struct qm_sg_entry *qm_sg_ptr, dma_addr_t dma, 41 u16 offset) 42 { 43 qm_sg_entry_set64(qm_sg_ptr, dma); 44 qm_sg_ptr->__reserved2 = 0; 45 qm_sg_ptr->bpid = 0; 46 qm_sg_ptr->offset = cpu_to_be16(offset & QM_SG_OFF_MASK); 47 } 48 49 static inline void dma_to_qm_sg_one(struct qm_sg_entry *qm_sg_ptr, 50 dma_addr_t dma, u32 len, u16 offset) 51 { 52 __dma_to_qm_sg(qm_sg_ptr, dma, offset); 53 qm_sg_entry_set_len(qm_sg_ptr, len); 54 } 55 56 static inline void dma_to_qm_sg_one_last(struct qm_sg_entry *qm_sg_ptr, 57 dma_addr_t dma, u32 len, u16 offset) 58 { 59 __dma_to_qm_sg(qm_sg_ptr, dma, offset); 60 qm_sg_entry_set_f(qm_sg_ptr, len); 61 } 62 63 static inline void dma_to_qm_sg_one_ext(struct qm_sg_entry *qm_sg_ptr, 64 dma_addr_t dma, u32 len, u16 offset) 65 { 66 __dma_to_qm_sg(qm_sg_ptr, dma, offset); 67 qm_sg_ptr->cfg = cpu_to_be32(QM_SG_EXT | (len & QM_SG_LEN_MASK)); 68 } 69 70 static inline void dma_to_qm_sg_one_last_ext(struct qm_sg_entry *qm_sg_ptr, 71 dma_addr_t dma, u32 len, 72 u16 offset) 73 { 74 __dma_to_qm_sg(qm_sg_ptr, dma, offset); 75 qm_sg_ptr->cfg = cpu_to_be32(QM_SG_EXT | QM_SG_FIN | 76 (len & QM_SG_LEN_MASK)); 77 } 78 79 /* 80 * convert scatterlist to h/w link table format 81 * but does not have final bit; instead, returns last entry 82 */ 83 static inline struct qm_sg_entry * 84 sg_to_qm_sg(struct scatterlist *sg, int sg_count, 85 struct qm_sg_entry *qm_sg_ptr, u16 offset) 86 { 87 while (sg_count && sg) { 88 dma_to_qm_sg_one(qm_sg_ptr, sg_dma_address(sg), 89 sg_dma_len(sg), offset); 90 qm_sg_ptr++; 91 sg = sg_next(sg); 92 sg_count--; 93 } 94 return qm_sg_ptr - 1; 95 } 96 97 /* 98 * convert scatterlist to h/w link table format 99 * scatterlist must have been previously dma mapped 100 */ 101 static inline void sg_to_qm_sg_last(struct scatterlist *sg, int sg_count, 102 struct qm_sg_entry *qm_sg_ptr, u16 offset) 103 { 104 qm_sg_ptr = sg_to_qm_sg(sg, sg_count, qm_sg_ptr, offset); 105 qm_sg_entry_set_f(qm_sg_ptr, qm_sg_entry_get_len(qm_sg_ptr)); 106 } 107 108 #endif /* __SG_SW_QM_H */ 109