1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * CAAM/SEC 4.x transport/backend driver 4 * JobR backend functionality 5 * 6 * Copyright 2008-2012 Freescale Semiconductor, Inc. 7 * Copyright 2019 NXP 8 */ 9 10 #include <linux/of_irq.h> 11 #include <linux/of_address.h> 12 13 #include "compat.h" 14 #include "ctrl.h" 15 #include "regs.h" 16 #include "jr.h" 17 #include "desc.h" 18 #include "intern.h" 19 20 struct jr_driver_data { 21 /* List of Physical JobR's with the Driver */ 22 struct list_head jr_list; 23 spinlock_t jr_alloc_lock; /* jr_list lock */ 24 } ____cacheline_aligned; 25 26 static struct jr_driver_data driver_data; 27 static DEFINE_MUTEX(algs_lock); 28 static unsigned int active_devs; 29 30 static void register_algs(struct device *dev) 31 { 32 mutex_lock(&algs_lock); 33 34 if (++active_devs != 1) 35 goto algs_unlock; 36 37 caam_algapi_init(dev); 38 caam_algapi_hash_init(dev); 39 caam_pkc_init(dev); 40 caam_rng_init(dev); 41 caam_qi_algapi_init(dev); 42 43 algs_unlock: 44 mutex_unlock(&algs_lock); 45 } 46 47 static void unregister_algs(void) 48 { 49 mutex_lock(&algs_lock); 50 51 if (--active_devs != 0) 52 goto algs_unlock; 53 54 caam_qi_algapi_exit(); 55 56 caam_rng_exit(); 57 caam_pkc_exit(); 58 caam_algapi_hash_exit(); 59 caam_algapi_exit(); 60 61 algs_unlock: 62 mutex_unlock(&algs_lock); 63 } 64 65 static int caam_reset_hw_jr(struct device *dev) 66 { 67 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 68 unsigned int timeout = 100000; 69 70 /* 71 * mask interrupts since we are going to poll 72 * for reset completion status 73 */ 74 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK); 75 76 /* initiate flush (required prior to reset) */ 77 wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET); 78 while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) == 79 JRINT_ERR_HALT_INPROGRESS) && --timeout) 80 cpu_relax(); 81 82 if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) != 83 JRINT_ERR_HALT_COMPLETE || timeout == 0) { 84 dev_err(dev, "failed to flush job ring %d\n", jrp->ridx); 85 return -EIO; 86 } 87 88 /* initiate reset */ 89 timeout = 100000; 90 wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET); 91 while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout) 92 cpu_relax(); 93 94 if (timeout == 0) { 95 dev_err(dev, "failed to reset job ring %d\n", jrp->ridx); 96 return -EIO; 97 } 98 99 /* unmask interrupts */ 100 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); 101 102 return 0; 103 } 104 105 /* 106 * Shutdown JobR independent of platform property code 107 */ 108 static int caam_jr_shutdown(struct device *dev) 109 { 110 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 111 dma_addr_t inpbusaddr, outbusaddr; 112 int ret; 113 114 ret = caam_reset_hw_jr(dev); 115 116 tasklet_kill(&jrp->irqtask); 117 118 /* Release interrupt */ 119 free_irq(jrp->irq, dev); 120 121 /* Free rings */ 122 inpbusaddr = rd_reg64(&jrp->rregs->inpring_base); 123 outbusaddr = rd_reg64(&jrp->rregs->outring_base); 124 dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH, 125 jrp->inpring, inpbusaddr); 126 dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH, 127 jrp->outring, outbusaddr); 128 kfree(jrp->entinfo); 129 130 return ret; 131 } 132 133 static int caam_jr_remove(struct platform_device *pdev) 134 { 135 int ret; 136 struct device *jrdev; 137 struct caam_drv_private_jr *jrpriv; 138 139 jrdev = &pdev->dev; 140 jrpriv = dev_get_drvdata(jrdev); 141 142 /* 143 * Return EBUSY if job ring already allocated. 144 */ 145 if (atomic_read(&jrpriv->tfm_count)) { 146 dev_err(jrdev, "Device is busy\n"); 147 return -EBUSY; 148 } 149 150 /* Unregister JR-based RNG & crypto algorithms */ 151 unregister_algs(); 152 153 /* Remove the node from Physical JobR list maintained by driver */ 154 spin_lock(&driver_data.jr_alloc_lock); 155 list_del(&jrpriv->list_node); 156 spin_unlock(&driver_data.jr_alloc_lock); 157 158 /* Release ring */ 159 ret = caam_jr_shutdown(jrdev); 160 if (ret) 161 dev_err(jrdev, "Failed to shut down job ring\n"); 162 irq_dispose_mapping(jrpriv->irq); 163 164 return ret; 165 } 166 167 /* Main per-ring interrupt handler */ 168 static irqreturn_t caam_jr_interrupt(int irq, void *st_dev) 169 { 170 struct device *dev = st_dev; 171 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 172 u32 irqstate; 173 174 /* 175 * Check the output ring for ready responses, kick 176 * tasklet if jobs done. 177 */ 178 irqstate = rd_reg32(&jrp->rregs->jrintstatus); 179 if (!irqstate) 180 return IRQ_NONE; 181 182 /* 183 * If JobR error, we got more development work to do 184 * Flag a bug now, but we really need to shut down and 185 * restart the queue (and fix code). 186 */ 187 if (irqstate & JRINT_JR_ERROR) { 188 dev_err(dev, "job ring error: irqstate: %08x\n", irqstate); 189 BUG(); 190 } 191 192 /* mask valid interrupts */ 193 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK); 194 195 /* Have valid interrupt at this point, just ACK and trigger */ 196 wr_reg32(&jrp->rregs->jrintstatus, irqstate); 197 198 preempt_disable(); 199 tasklet_schedule(&jrp->irqtask); 200 preempt_enable(); 201 202 return IRQ_HANDLED; 203 } 204 205 /* Deferred service handler, run as interrupt-fired tasklet */ 206 static void caam_jr_dequeue(unsigned long devarg) 207 { 208 int hw_idx, sw_idx, i, head, tail; 209 struct device *dev = (struct device *)devarg; 210 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 211 void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg); 212 u32 *userdesc, userstatus; 213 void *userarg; 214 u32 outring_used = 0; 215 216 while (outring_used || 217 (outring_used = rd_reg32(&jrp->rregs->outring_used))) { 218 219 head = READ_ONCE(jrp->head); 220 221 sw_idx = tail = jrp->tail; 222 hw_idx = jrp->out_ring_read_index; 223 224 for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) { 225 sw_idx = (tail + i) & (JOBR_DEPTH - 1); 226 227 if (jrp->outring[hw_idx].desc == 228 caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma)) 229 break; /* found */ 230 } 231 /* we should never fail to find a matching descriptor */ 232 BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0); 233 234 /* Unmap just-run descriptor so we can post-process */ 235 dma_unmap_single(dev, 236 caam_dma_to_cpu(jrp->outring[hw_idx].desc), 237 jrp->entinfo[sw_idx].desc_size, 238 DMA_TO_DEVICE); 239 240 /* mark completed, avoid matching on a recycled desc addr */ 241 jrp->entinfo[sw_idx].desc_addr_dma = 0; 242 243 /* Stash callback params */ 244 usercall = jrp->entinfo[sw_idx].callbk; 245 userarg = jrp->entinfo[sw_idx].cbkarg; 246 userdesc = jrp->entinfo[sw_idx].desc_addr_virt; 247 userstatus = caam32_to_cpu(jrp->outring[hw_idx].jrstatus); 248 249 /* 250 * Make sure all information from the job has been obtained 251 * before telling CAAM that the job has been removed from the 252 * output ring. 253 */ 254 mb(); 255 256 /* set done */ 257 wr_reg32(&jrp->rregs->outring_rmvd, 1); 258 259 jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) & 260 (JOBR_DEPTH - 1); 261 262 /* 263 * if this job completed out-of-order, do not increment 264 * the tail. Otherwise, increment tail by 1 plus the 265 * number of subsequent jobs already completed out-of-order 266 */ 267 if (sw_idx == tail) { 268 do { 269 tail = (tail + 1) & (JOBR_DEPTH - 1); 270 } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 && 271 jrp->entinfo[tail].desc_addr_dma == 0); 272 273 jrp->tail = tail; 274 } 275 276 /* Finally, execute user's callback */ 277 usercall(dev, userdesc, userstatus, userarg); 278 outring_used--; 279 } 280 281 /* reenable / unmask IRQs */ 282 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); 283 } 284 285 /** 286 * caam_jr_alloc() - Alloc a job ring for someone to use as needed. 287 * 288 * returns : pointer to the newly allocated physical 289 * JobR dev can be written to if successful. 290 **/ 291 struct device *caam_jr_alloc(void) 292 { 293 struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL; 294 struct device *dev = ERR_PTR(-ENODEV); 295 int min_tfm_cnt = INT_MAX; 296 int tfm_cnt; 297 298 spin_lock(&driver_data.jr_alloc_lock); 299 300 if (list_empty(&driver_data.jr_list)) { 301 spin_unlock(&driver_data.jr_alloc_lock); 302 return ERR_PTR(-ENODEV); 303 } 304 305 list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) { 306 tfm_cnt = atomic_read(&jrpriv->tfm_count); 307 if (tfm_cnt < min_tfm_cnt) { 308 min_tfm_cnt = tfm_cnt; 309 min_jrpriv = jrpriv; 310 } 311 if (!min_tfm_cnt) 312 break; 313 } 314 315 if (min_jrpriv) { 316 atomic_inc(&min_jrpriv->tfm_count); 317 dev = min_jrpriv->dev; 318 } 319 spin_unlock(&driver_data.jr_alloc_lock); 320 321 return dev; 322 } 323 EXPORT_SYMBOL(caam_jr_alloc); 324 325 /** 326 * caam_jr_free() - Free the Job Ring 327 * @rdev - points to the dev that identifies the Job ring to 328 * be released. 329 **/ 330 void caam_jr_free(struct device *rdev) 331 { 332 struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev); 333 334 atomic_dec(&jrpriv->tfm_count); 335 } 336 EXPORT_SYMBOL(caam_jr_free); 337 338 /** 339 * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK, 340 * -EBUSY if the queue is full, -EIO if it cannot map the caller's 341 * descriptor. 342 * @dev: device of the job ring to be used. This device should have 343 * been assigned prior by caam_jr_register(). 344 * @desc: points to a job descriptor that execute our request. All 345 * descriptors (and all referenced data) must be in a DMAable 346 * region, and all data references must be physical addresses 347 * accessible to CAAM (i.e. within a PAMU window granted 348 * to it). 349 * @cbk: pointer to a callback function to be invoked upon completion 350 * of this request. This has the form: 351 * callback(struct device *dev, u32 *desc, u32 stat, void *arg) 352 * where: 353 * @dev: contains the job ring device that processed this 354 * response. 355 * @desc: descriptor that initiated the request, same as 356 * "desc" being argued to caam_jr_enqueue(). 357 * @status: untranslated status received from CAAM. See the 358 * reference manual for a detailed description of 359 * error meaning, or see the JRSTA definitions in the 360 * register header file 361 * @areq: optional pointer to an argument passed with the 362 * original request 363 * @areq: optional pointer to a user argument for use at callback 364 * time. 365 **/ 366 int caam_jr_enqueue(struct device *dev, u32 *desc, 367 void (*cbk)(struct device *dev, u32 *desc, 368 u32 status, void *areq), 369 void *areq) 370 { 371 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 372 struct caam_jrentry_info *head_entry; 373 int head, tail, desc_size; 374 dma_addr_t desc_dma; 375 376 desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32); 377 desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE); 378 if (dma_mapping_error(dev, desc_dma)) { 379 dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n"); 380 return -EIO; 381 } 382 383 spin_lock_bh(&jrp->inplock); 384 385 head = jrp->head; 386 tail = READ_ONCE(jrp->tail); 387 388 if (!jrp->inpring_avail || 389 CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) { 390 spin_unlock_bh(&jrp->inplock); 391 dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE); 392 return -EBUSY; 393 } 394 395 head_entry = &jrp->entinfo[head]; 396 head_entry->desc_addr_virt = desc; 397 head_entry->desc_size = desc_size; 398 head_entry->callbk = (void *)cbk; 399 head_entry->cbkarg = areq; 400 head_entry->desc_addr_dma = desc_dma; 401 402 jrp->inpring[head] = cpu_to_caam_dma(desc_dma); 403 404 /* 405 * Guarantee that the descriptor's DMA address has been written to 406 * the next slot in the ring before the write index is updated, since 407 * other cores may update this index independently. 408 */ 409 smp_wmb(); 410 411 jrp->head = (head + 1) & (JOBR_DEPTH - 1); 412 413 /* 414 * Ensure that all job information has been written before 415 * notifying CAAM that a new job was added to the input ring 416 * using a memory barrier. The wr_reg32() uses api iowrite32() 417 * to do the register write. iowrite32() issues a memory barrier 418 * before the write operation. 419 */ 420 421 wr_reg32(&jrp->rregs->inpring_jobadd, 1); 422 423 jrp->inpring_avail--; 424 if (!jrp->inpring_avail) 425 jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail); 426 427 spin_unlock_bh(&jrp->inplock); 428 429 return 0; 430 } 431 EXPORT_SYMBOL(caam_jr_enqueue); 432 433 /* 434 * Init JobR independent of platform property detection 435 */ 436 static int caam_jr_init(struct device *dev) 437 { 438 struct caam_drv_private_jr *jrp; 439 dma_addr_t inpbusaddr, outbusaddr; 440 int i, error; 441 442 jrp = dev_get_drvdata(dev); 443 444 tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev); 445 446 /* Connect job ring interrupt handler. */ 447 error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED, 448 dev_name(dev), dev); 449 if (error) { 450 dev_err(dev, "can't connect JobR %d interrupt (%d)\n", 451 jrp->ridx, jrp->irq); 452 goto out_kill_deq; 453 } 454 455 error = caam_reset_hw_jr(dev); 456 if (error) 457 goto out_free_irq; 458 459 error = -ENOMEM; 460 jrp->inpring = dma_alloc_coherent(dev, sizeof(*jrp->inpring) * 461 JOBR_DEPTH, &inpbusaddr, GFP_KERNEL); 462 if (!jrp->inpring) 463 goto out_free_irq; 464 465 jrp->outring = dma_alloc_coherent(dev, sizeof(*jrp->outring) * 466 JOBR_DEPTH, &outbusaddr, GFP_KERNEL); 467 if (!jrp->outring) 468 goto out_free_inpring; 469 470 jrp->entinfo = kcalloc(JOBR_DEPTH, sizeof(*jrp->entinfo), GFP_KERNEL); 471 if (!jrp->entinfo) 472 goto out_free_outring; 473 474 for (i = 0; i < JOBR_DEPTH; i++) 475 jrp->entinfo[i].desc_addr_dma = !0; 476 477 /* Setup rings */ 478 jrp->out_ring_read_index = 0; 479 jrp->head = 0; 480 jrp->tail = 0; 481 482 wr_reg64(&jrp->rregs->inpring_base, inpbusaddr); 483 wr_reg64(&jrp->rregs->outring_base, outbusaddr); 484 wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH); 485 wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH); 486 487 jrp->inpring_avail = JOBR_DEPTH; 488 489 spin_lock_init(&jrp->inplock); 490 491 /* Select interrupt coalescing parameters */ 492 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC | 493 (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) | 494 (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT)); 495 496 return 0; 497 498 out_free_outring: 499 dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH, 500 jrp->outring, outbusaddr); 501 out_free_inpring: 502 dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH, 503 jrp->inpring, inpbusaddr); 504 dev_err(dev, "can't allocate job rings for %d\n", jrp->ridx); 505 out_free_irq: 506 free_irq(jrp->irq, dev); 507 out_kill_deq: 508 tasklet_kill(&jrp->irqtask); 509 return error; 510 } 511 512 513 /* 514 * Probe routine for each detected JobR subsystem. 515 */ 516 static int caam_jr_probe(struct platform_device *pdev) 517 { 518 struct device *jrdev; 519 struct device_node *nprop; 520 struct caam_job_ring __iomem *ctrl; 521 struct caam_drv_private_jr *jrpriv; 522 static int total_jobrs; 523 int error; 524 525 jrdev = &pdev->dev; 526 jrpriv = devm_kmalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL); 527 if (!jrpriv) 528 return -ENOMEM; 529 530 dev_set_drvdata(jrdev, jrpriv); 531 532 /* save ring identity relative to detection */ 533 jrpriv->ridx = total_jobrs++; 534 535 nprop = pdev->dev.of_node; 536 /* Get configuration properties from device tree */ 537 /* First, get register page */ 538 ctrl = of_iomap(nprop, 0); 539 if (!ctrl) { 540 dev_err(jrdev, "of_iomap() failed\n"); 541 return -ENOMEM; 542 } 543 544 jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl; 545 546 if (sizeof(dma_addr_t) == sizeof(u64)) { 547 if (caam_dpaa2) 548 error = dma_set_mask_and_coherent(jrdev, 549 DMA_BIT_MASK(49)); 550 else if (of_device_is_compatible(nprop, 551 "fsl,sec-v5.0-job-ring")) 552 error = dma_set_mask_and_coherent(jrdev, 553 DMA_BIT_MASK(40)); 554 else 555 error = dma_set_mask_and_coherent(jrdev, 556 DMA_BIT_MASK(36)); 557 } else { 558 error = dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32)); 559 } 560 if (error) { 561 dev_err(jrdev, "dma_set_mask_and_coherent failed (%d)\n", 562 error); 563 iounmap(ctrl); 564 return error; 565 } 566 567 /* Identify the interrupt */ 568 jrpriv->irq = irq_of_parse_and_map(nprop, 0); 569 570 /* Now do the platform independent part */ 571 error = caam_jr_init(jrdev); /* now turn on hardware */ 572 if (error) { 573 irq_dispose_mapping(jrpriv->irq); 574 iounmap(ctrl); 575 return error; 576 } 577 578 jrpriv->dev = jrdev; 579 spin_lock(&driver_data.jr_alloc_lock); 580 list_add_tail(&jrpriv->list_node, &driver_data.jr_list); 581 spin_unlock(&driver_data.jr_alloc_lock); 582 583 atomic_set(&jrpriv->tfm_count, 0); 584 585 register_algs(jrdev->parent); 586 587 return 0; 588 } 589 590 static const struct of_device_id caam_jr_match[] = { 591 { 592 .compatible = "fsl,sec-v4.0-job-ring", 593 }, 594 { 595 .compatible = "fsl,sec4.0-job-ring", 596 }, 597 {}, 598 }; 599 MODULE_DEVICE_TABLE(of, caam_jr_match); 600 601 static struct platform_driver caam_jr_driver = { 602 .driver = { 603 .name = "caam_jr", 604 .of_match_table = caam_jr_match, 605 }, 606 .probe = caam_jr_probe, 607 .remove = caam_jr_remove, 608 }; 609 610 static int __init jr_driver_init(void) 611 { 612 spin_lock_init(&driver_data.jr_alloc_lock); 613 INIT_LIST_HEAD(&driver_data.jr_list); 614 return platform_driver_register(&caam_jr_driver); 615 } 616 617 static void __exit jr_driver_exit(void) 618 { 619 platform_driver_unregister(&caam_jr_driver); 620 } 621 622 module_init(jr_driver_init); 623 module_exit(jr_driver_exit); 624 625 MODULE_LICENSE("GPL"); 626 MODULE_DESCRIPTION("FSL CAAM JR request backend"); 627 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC"); 628