1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * CAAM/SEC 4.x driver backend 4 * Private/internal definitions between modules 5 * 6 * Copyright 2008-2011 Freescale Semiconductor, Inc. 7 * Copyright 2019 NXP 8 */ 9 10 #ifndef INTERN_H 11 #define INTERN_H 12 13 #include "ctrl.h" 14 15 /* Currently comes from Kconfig param as a ^2 (driver-required) */ 16 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) 17 18 /* Kconfig params for interrupt coalescing if selected (else zero) */ 19 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC 20 #define JOBR_INTC JRCFG_ICEN 21 #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD 22 #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD 23 #else 24 #define JOBR_INTC 0 25 #define JOBR_INTC_TIME_THLD 0 26 #define JOBR_INTC_COUNT_THLD 0 27 #endif 28 29 /* 30 * Storage for tracking each in-process entry moving across a ring 31 * Each entry on an output ring needs one of these 32 */ 33 struct caam_jrentry_info { 34 void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg); 35 void *cbkarg; /* Argument per ring entry */ 36 u32 *desc_addr_virt; /* Stored virt addr for postprocessing */ 37 dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */ 38 u32 desc_size; /* Stored size for postprocessing, header derived */ 39 }; 40 41 /* Private sub-storage for a single JobR */ 42 struct caam_drv_private_jr { 43 struct list_head list_node; /* Job Ring device list */ 44 struct device *dev; 45 int ridx; 46 struct caam_job_ring __iomem *rregs; /* JobR's register space */ 47 struct tasklet_struct irqtask; 48 int irq; /* One per queue */ 49 50 /* Number of scatterlist crypt transforms active on the JobR */ 51 atomic_t tfm_count ____cacheline_aligned; 52 53 /* Job ring info */ 54 struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ 55 spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ 56 u32 inpring_avail; /* Number of free entries in input ring */ 57 int head; /* entinfo (s/w ring) head index */ 58 void *inpring; /* Base of input ring, alloc 59 * DMA-safe */ 60 int out_ring_read_index; /* Output index "tail" */ 61 int tail; /* entinfo (s/w ring) tail index */ 62 void *outring; /* Base of output ring, DMA-safe */ 63 }; 64 65 /* 66 * Driver-private storage for a single CAAM block instance 67 */ 68 struct caam_drv_private { 69 /* Physical-presence section */ 70 struct caam_ctrl __iomem *ctrl; /* controller region */ 71 struct caam_deco __iomem *deco; /* DECO/CCB views */ 72 struct caam_assurance __iomem *assure; 73 struct caam_queue_if __iomem *qi; /* QI control region */ 74 struct caam_job_ring __iomem *jr[4]; /* JobR's register space */ 75 76 struct iommu_domain *domain; 77 78 /* 79 * Detected geometry block. Filled in from device tree if powerpc, 80 * or from register-based version detection code 81 */ 82 u8 total_jobrs; /* Total Job Rings in device */ 83 u8 qi_present; /* Nonzero if QI present in device */ 84 #ifdef CONFIG_CAAM_QI 85 u8 qi_init; /* Nonzero if QI has been initialized */ 86 #endif 87 u8 mc_en; /* Nonzero if MC f/w is active */ 88 int secvio_irq; /* Security violation interrupt number */ 89 int virt_en; /* Virtualization enabled in CAAM */ 90 int era; /* CAAM Era (internal HW revision) */ 91 92 #define RNG4_MAX_HANDLES 2 93 /* RNG4 block */ 94 u32 rng4_sh_init; /* This bitmap shows which of the State 95 Handles of the RNG4 block are initialized 96 by this driver */ 97 98 struct clk_bulk_data *clks; 99 int num_clks; 100 /* 101 * debugfs entries for developer view into driver/device 102 * variables at runtime. 103 */ 104 #ifdef CONFIG_DEBUG_FS 105 struct dentry *dfs_root; 106 struct dentry *ctl; /* controller dir */ 107 struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; 108 #endif 109 }; 110 111 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API 112 113 int caam_algapi_init(struct device *dev); 114 void caam_algapi_exit(void); 115 116 #else 117 118 static inline int caam_algapi_init(struct device *dev) 119 { 120 return 0; 121 } 122 123 static inline void caam_algapi_exit(void) 124 { 125 } 126 127 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */ 128 129 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API 130 131 int caam_algapi_hash_init(struct device *dev); 132 void caam_algapi_hash_exit(void); 133 134 #else 135 136 static inline int caam_algapi_hash_init(struct device *dev) 137 { 138 return 0; 139 } 140 141 static inline void caam_algapi_hash_exit(void) 142 { 143 } 144 145 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */ 146 147 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API 148 149 int caam_pkc_init(struct device *dev); 150 void caam_pkc_exit(void); 151 152 #else 153 154 static inline int caam_pkc_init(struct device *dev) 155 { 156 return 0; 157 } 158 159 static inline void caam_pkc_exit(void) 160 { 161 } 162 163 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */ 164 165 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API 166 167 int caam_rng_init(struct device *dev); 168 void caam_rng_exit(void); 169 170 #else 171 172 static inline int caam_rng_init(struct device *dev) 173 { 174 return 0; 175 } 176 177 static inline void caam_rng_exit(void) 178 { 179 } 180 181 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */ 182 183 #ifdef CONFIG_CAAM_QI 184 185 int caam_qi_algapi_init(struct device *dev); 186 void caam_qi_algapi_exit(void); 187 188 #else 189 190 static inline int caam_qi_algapi_init(struct device *dev) 191 { 192 return 0; 193 } 194 195 static inline void caam_qi_algapi_exit(void) 196 { 197 } 198 199 #endif /* CONFIG_CAAM_QI */ 200 201 #ifdef CONFIG_DEBUG_FS 202 static int caam_debugfs_u64_get(void *data, u64 *val) 203 { 204 *val = caam64_to_cpu(*(u64 *)data); 205 return 0; 206 } 207 208 static int caam_debugfs_u32_get(void *data, u64 *val) 209 { 210 *val = caam32_to_cpu(*(u32 *)data); 211 return 0; 212 } 213 214 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n"); 215 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n"); 216 #endif 217 218 static inline u64 caam_get_dma_mask(struct device *dev) 219 { 220 struct device_node *nprop = dev->of_node; 221 222 if (caam_ptr_sz != sizeof(u64)) 223 return DMA_BIT_MASK(32); 224 225 if (caam_dpaa2) 226 return DMA_BIT_MASK(49); 227 228 if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") || 229 of_device_is_compatible(nprop, "fsl,sec-v5.0")) 230 return DMA_BIT_MASK(40); 231 232 return DMA_BIT_MASK(36); 233 } 234 235 236 #endif /* INTERN_H */ 237