1 /* 2 * CAAM/SEC 4.x driver backend 3 * Private/internal definitions between modules 4 * 5 * Copyright 2008-2011 Freescale Semiconductor, Inc. 6 * 7 */ 8 9 #ifndef INTERN_H 10 #define INTERN_H 11 12 /* Currently comes from Kconfig param as a ^2 (driver-required) */ 13 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) 14 15 /* Kconfig params for interrupt coalescing if selected (else zero) */ 16 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC 17 #define JOBR_INTC JRCFG_ICEN 18 #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD 19 #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD 20 #else 21 #define JOBR_INTC 0 22 #define JOBR_INTC_TIME_THLD 0 23 #define JOBR_INTC_COUNT_THLD 0 24 #endif 25 26 /* 27 * Storage for tracking each in-process entry moving across a ring 28 * Each entry on an output ring needs one of these 29 */ 30 struct caam_jrentry_info { 31 void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg); 32 void *cbkarg; /* Argument per ring entry */ 33 u32 *desc_addr_virt; /* Stored virt addr for postprocessing */ 34 dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */ 35 u32 desc_size; /* Stored size for postprocessing, header derived */ 36 }; 37 38 /* Private sub-storage for a single JobR */ 39 struct caam_drv_private_jr { 40 struct list_head list_node; /* Job Ring device list */ 41 struct device *dev; 42 int ridx; 43 struct caam_job_ring __iomem *rregs; /* JobR's register space */ 44 struct tasklet_struct irqtask; 45 int irq; /* One per queue */ 46 47 /* Number of scatterlist crypt transforms active on the JobR */ 48 atomic_t tfm_count ____cacheline_aligned; 49 50 /* Job ring info */ 51 int ringsize; /* Size of rings (assume input = output) */ 52 struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ 53 spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ 54 int inp_ring_write_index; /* Input index "tail" */ 55 int head; /* entinfo (s/w ring) head index */ 56 dma_addr_t *inpring; /* Base of input ring, alloc DMA-safe */ 57 spinlock_t outlock ____cacheline_aligned; /* Output ring index lock */ 58 int out_ring_read_index; /* Output index "tail" */ 59 int tail; /* entinfo (s/w ring) tail index */ 60 struct jr_outentry *outring; /* Base of output ring, DMA-safe */ 61 }; 62 63 /* 64 * Driver-private storage for a single CAAM block instance 65 */ 66 struct caam_drv_private { 67 #ifdef CONFIG_CAAM_QI 68 struct device *qidev; 69 #endif 70 71 /* Physical-presence section */ 72 struct caam_ctrl __iomem *ctrl; /* controller region */ 73 struct caam_deco __iomem *deco; /* DECO/CCB views */ 74 struct caam_assurance __iomem *assure; 75 struct caam_queue_if __iomem *qi; /* QI control region */ 76 struct caam_job_ring __iomem *jr[4]; /* JobR's register space */ 77 78 /* 79 * Detected geometry block. Filled in from device tree if powerpc, 80 * or from register-based version detection code 81 */ 82 u8 total_jobrs; /* Total Job Rings in device */ 83 u8 qi_present; /* Nonzero if QI present in device */ 84 int secvio_irq; /* Security violation interrupt number */ 85 int virt_en; /* Virtualization enabled in CAAM */ 86 87 #define RNG4_MAX_HANDLES 2 88 /* RNG4 block */ 89 u32 rng4_sh_init; /* This bitmap shows which of the State 90 Handles of the RNG4 block are initialized 91 by this driver */ 92 93 struct clk *caam_ipg; 94 struct clk *caam_mem; 95 struct clk *caam_aclk; 96 struct clk *caam_emi_slow; 97 98 /* 99 * debugfs entries for developer view into driver/device 100 * variables at runtime. 101 */ 102 #ifdef CONFIG_DEBUG_FS 103 struct dentry *dfs_root; 104 struct dentry *ctl; /* controller dir */ 105 struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; 106 struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk; 107 #endif 108 }; 109 110 void caam_jr_algapi_init(struct device *dev); 111 void caam_jr_algapi_remove(struct device *dev); 112 113 #ifdef CONFIG_DEBUG_FS 114 static int caam_debugfs_u64_get(void *data, u64 *val) 115 { 116 *val = caam64_to_cpu(*(u64 *)data); 117 return 0; 118 } 119 120 static int caam_debugfs_u32_get(void *data, u64 *val) 121 { 122 *val = caam32_to_cpu(*(u32 *)data); 123 return 0; 124 } 125 126 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n"); 127 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n"); 128 #endif 129 130 #endif /* INTERN_H */ 131