1 /* 2 * CAAM/SEC 4.x driver backend 3 * Private/internal definitions between modules 4 * 5 * Copyright 2008-2011 Freescale Semiconductor, Inc. 6 * 7 */ 8 9 #ifndef INTERN_H 10 #define INTERN_H 11 12 #define JOBR_UNASSIGNED 0 13 #define JOBR_ASSIGNED 1 14 15 /* Currently comes from Kconfig param as a ^2 (driver-required) */ 16 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) 17 18 /* Kconfig params for interrupt coalescing if selected (else zero) */ 19 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC 20 #define JOBR_INTC JRCFG_ICEN 21 #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD 22 #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD 23 #else 24 #define JOBR_INTC 0 25 #define JOBR_INTC_TIME_THLD 0 26 #define JOBR_INTC_COUNT_THLD 0 27 #endif 28 29 /* 30 * Storage for tracking each in-process entry moving across a ring 31 * Each entry on an output ring needs one of these 32 */ 33 struct caam_jrentry_info { 34 void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg); 35 void *cbkarg; /* Argument per ring entry */ 36 u32 *desc_addr_virt; /* Stored virt addr for postprocessing */ 37 dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */ 38 u32 desc_size; /* Stored size for postprocessing, header derived */ 39 }; 40 41 /* Private sub-storage for a single JobR */ 42 struct caam_drv_private_jr { 43 struct device *parentdev; /* points back to controller dev */ 44 int ridx; 45 struct caam_job_ring __iomem *rregs; /* JobR's register space */ 46 struct tasklet_struct irqtask; 47 int irq; /* One per queue */ 48 int assign; /* busy/free */ 49 50 /* Job ring info */ 51 int ringsize; /* Size of rings (assume input = output) */ 52 struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ 53 spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ 54 int inp_ring_write_index; /* Input index "tail" */ 55 int head; /* entinfo (s/w ring) head index */ 56 dma_addr_t *inpring; /* Base of input ring, alloc DMA-safe */ 57 spinlock_t outlock ____cacheline_aligned; /* Output ring index lock */ 58 int out_ring_read_index; /* Output index "tail" */ 59 int tail; /* entinfo (s/w ring) tail index */ 60 struct jr_outentry *outring; /* Base of output ring, DMA-safe */ 61 }; 62 63 /* 64 * Driver-private storage for a single CAAM block instance 65 */ 66 struct caam_drv_private { 67 68 struct device *dev; 69 struct device **jrdev; /* Alloc'ed array per sub-device */ 70 spinlock_t jr_alloc_lock; 71 struct platform_device *pdev; 72 73 /* Physical-presence section */ 74 struct caam_ctrl *ctrl; /* controller region */ 75 struct caam_deco **deco; /* DECO/CCB views */ 76 struct caam_assurance *ac; 77 struct caam_queue_if *qi; /* QI control region */ 78 79 /* 80 * Detected geometry block. Filled in from device tree if powerpc, 81 * or from register-based version detection code 82 */ 83 u8 total_jobrs; /* Total Job Rings in device */ 84 u8 qi_present; /* Nonzero if QI present in device */ 85 int secvio_irq; /* Security violation interrupt number */ 86 87 /* which jr allocated to scatterlist crypto */ 88 atomic_t tfm_count ____cacheline_aligned; 89 /* list of registered crypto algorithms (mk generic context handle?) */ 90 struct list_head alg_list; 91 /* list of registered hash algorithms (mk generic context handle?) */ 92 struct list_head hash_list; 93 94 /* 95 * debugfs entries for developer view into driver/device 96 * variables at runtime. 97 */ 98 #ifdef CONFIG_DEBUG_FS 99 struct dentry *dfs_root; 100 struct dentry *ctl; /* controller dir */ 101 struct dentry *ctl_rq_dequeued, *ctl_ob_enc_req, *ctl_ib_dec_req; 102 struct dentry *ctl_ob_enc_bytes, *ctl_ob_prot_bytes; 103 struct dentry *ctl_ib_dec_bytes, *ctl_ib_valid_bytes; 104 struct dentry *ctl_faultaddr, *ctl_faultdetail, *ctl_faultstatus; 105 106 struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; 107 struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk; 108 #endif 109 }; 110 111 void caam_jr_algapi_init(struct device *dev); 112 void caam_jr_algapi_remove(struct device *dev); 113 #endif /* INTERN_H */ 114