1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * CAAM/SEC 4.x driver backend 4 * Private/internal definitions between modules 5 * 6 * Copyright 2008-2011 Freescale Semiconductor, Inc. 7 * Copyright 2019 NXP 8 */ 9 10 #ifndef INTERN_H 11 #define INTERN_H 12 13 #include "ctrl.h" 14 15 /* Currently comes from Kconfig param as a ^2 (driver-required) */ 16 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) 17 18 /* Kconfig params for interrupt coalescing if selected (else zero) */ 19 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC 20 #define JOBR_INTC JRCFG_ICEN 21 #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD 22 #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD 23 #else 24 #define JOBR_INTC 0 25 #define JOBR_INTC_TIME_THLD 0 26 #define JOBR_INTC_COUNT_THLD 0 27 #endif 28 29 /* 30 * Storage for tracking each in-process entry moving across a ring 31 * Each entry on an output ring needs one of these 32 */ 33 struct caam_jrentry_info { 34 void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg); 35 void *cbkarg; /* Argument per ring entry */ 36 u32 *desc_addr_virt; /* Stored virt addr for postprocessing */ 37 dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */ 38 u32 desc_size; /* Stored size for postprocessing, header derived */ 39 }; 40 41 /* Private sub-storage for a single JobR */ 42 struct caam_drv_private_jr { 43 struct list_head list_node; /* Job Ring device list */ 44 struct device *dev; 45 int ridx; 46 struct caam_job_ring __iomem *rregs; /* JobR's register space */ 47 struct tasklet_struct irqtask; 48 int irq; /* One per queue */ 49 50 /* Number of scatterlist crypt transforms active on the JobR */ 51 atomic_t tfm_count ____cacheline_aligned; 52 53 /* Job ring info */ 54 struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ 55 spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ 56 u32 inpring_avail; /* Number of free entries in input ring */ 57 int head; /* entinfo (s/w ring) head index */ 58 void *inpring; /* Base of input ring, alloc 59 * DMA-safe */ 60 int out_ring_read_index; /* Output index "tail" */ 61 int tail; /* entinfo (s/w ring) tail index */ 62 void *outring; /* Base of output ring, DMA-safe */ 63 }; 64 65 /* 66 * Driver-private storage for a single CAAM block instance 67 */ 68 struct caam_drv_private { 69 /* Physical-presence section */ 70 struct caam_ctrl __iomem *ctrl; /* controller region */ 71 struct caam_deco __iomem *deco; /* DECO/CCB views */ 72 struct caam_assurance __iomem *assure; 73 struct caam_queue_if __iomem *qi; /* QI control region */ 74 struct caam_job_ring __iomem *jr[4]; /* JobR's register space */ 75 76 struct iommu_domain *domain; 77 78 /* 79 * Detected geometry block. Filled in from device tree if powerpc, 80 * or from register-based version detection code 81 */ 82 u8 total_jobrs; /* Total Job Rings in device */ 83 u8 qi_present; /* Nonzero if QI present in device */ 84 u8 mc_en; /* Nonzero if MC f/w is active */ 85 int secvio_irq; /* Security violation interrupt number */ 86 int virt_en; /* Virtualization enabled in CAAM */ 87 int era; /* CAAM Era (internal HW revision) */ 88 89 #define RNG4_MAX_HANDLES 2 90 /* RNG4 block */ 91 u32 rng4_sh_init; /* This bitmap shows which of the State 92 Handles of the RNG4 block are initialized 93 by this driver */ 94 95 struct clk_bulk_data *clks; 96 int num_clks; 97 /* 98 * debugfs entries for developer view into driver/device 99 * variables at runtime. 100 */ 101 #ifdef CONFIG_DEBUG_FS 102 struct dentry *ctl; /* controller dir */ 103 struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; 104 #endif 105 }; 106 107 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API 108 109 int caam_algapi_init(struct device *dev); 110 void caam_algapi_exit(void); 111 112 #else 113 114 static inline int caam_algapi_init(struct device *dev) 115 { 116 return 0; 117 } 118 119 static inline void caam_algapi_exit(void) 120 { 121 } 122 123 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */ 124 125 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API 126 127 int caam_algapi_hash_init(struct device *dev); 128 void caam_algapi_hash_exit(void); 129 130 #else 131 132 static inline int caam_algapi_hash_init(struct device *dev) 133 { 134 return 0; 135 } 136 137 static inline void caam_algapi_hash_exit(void) 138 { 139 } 140 141 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */ 142 143 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API 144 145 int caam_pkc_init(struct device *dev); 146 void caam_pkc_exit(void); 147 148 #else 149 150 static inline int caam_pkc_init(struct device *dev) 151 { 152 return 0; 153 } 154 155 static inline void caam_pkc_exit(void) 156 { 157 } 158 159 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */ 160 161 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API 162 163 int caam_rng_init(struct device *dev); 164 void caam_rng_exit(void); 165 166 #else 167 168 static inline int caam_rng_init(struct device *dev) 169 { 170 return 0; 171 } 172 173 static inline void caam_rng_exit(void) 174 { 175 } 176 177 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */ 178 179 #ifdef CONFIG_CAAM_QI 180 181 int caam_qi_algapi_init(struct device *dev); 182 void caam_qi_algapi_exit(void); 183 184 #else 185 186 static inline int caam_qi_algapi_init(struct device *dev) 187 { 188 return 0; 189 } 190 191 static inline void caam_qi_algapi_exit(void) 192 { 193 } 194 195 #endif /* CONFIG_CAAM_QI */ 196 197 #ifdef CONFIG_DEBUG_FS 198 static int caam_debugfs_u64_get(void *data, u64 *val) 199 { 200 *val = caam64_to_cpu(*(u64 *)data); 201 return 0; 202 } 203 204 static int caam_debugfs_u32_get(void *data, u64 *val) 205 { 206 *val = caam32_to_cpu(*(u32 *)data); 207 return 0; 208 } 209 210 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n"); 211 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n"); 212 #endif 213 214 static inline u64 caam_get_dma_mask(struct device *dev) 215 { 216 struct device_node *nprop = dev->of_node; 217 218 if (caam_ptr_sz != sizeof(u64)) 219 return DMA_BIT_MASK(32); 220 221 if (caam_dpaa2) 222 return DMA_BIT_MASK(49); 223 224 if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") || 225 of_device_is_compatible(nprop, "fsl,sec-v5.0")) 226 return DMA_BIT_MASK(40); 227 228 return DMA_BIT_MASK(36); 229 } 230 231 232 #endif /* INTERN_H */ 233