xref: /openbmc/linux/drivers/crypto/caam/error.c (revision 7d545e77)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * CAAM Error Reporting
4  *
5  * Copyright 2009-2011 Freescale Semiconductor, Inc.
6  */
7 
8 #include "compat.h"
9 #include "regs.h"
10 #include "desc.h"
11 #include "error.h"
12 
13 #ifdef DEBUG
14 #include <linux/highmem.h>
15 
16 void caam_dump_sg(const char *prefix_str, int prefix_type,
17 		  int rowsize, int groupsize, struct scatterlist *sg,
18 		  size_t tlen, bool ascii)
19 {
20 	struct scatterlist *it;
21 	void *it_page;
22 	size_t len;
23 	void *buf;
24 
25 	for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
26 		/*
27 		 * make sure the scatterlist's page
28 		 * has a valid virtual memory mapping
29 		 */
30 		it_page = kmap_atomic(sg_page(it));
31 		if (unlikely(!it_page)) {
32 			pr_err("caam_dump_sg: kmap failed\n");
33 			return;
34 		}
35 
36 		buf = it_page + it->offset;
37 		len = min_t(size_t, tlen, it->length);
38 		print_hex_dump_debug(prefix_str, prefix_type, rowsize,
39 				     groupsize, buf, len, ascii);
40 		tlen -= len;
41 
42 		kunmap_atomic(it_page);
43 	}
44 }
45 #else
46 void caam_dump_sg(const char *prefix_str, int prefix_type,
47 		  int rowsize, int groupsize, struct scatterlist *sg,
48 		  size_t tlen, bool ascii)
49 {}
50 #endif /* DEBUG */
51 EXPORT_SYMBOL(caam_dump_sg);
52 
53 bool caam_little_end;
54 EXPORT_SYMBOL(caam_little_end);
55 
56 bool caam_imx;
57 EXPORT_SYMBOL(caam_imx);
58 
59 static const struct {
60 	u8 value;
61 	const char *error_text;
62 } desc_error_list[] = {
63 	{ 0x00, "No error." },
64 	{ 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
65 	{ 0x02, "SGT Null Entry Error." },
66 	{ 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
67 	{ 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
68 	{ 0x05, "Reserved." },
69 	{ 0x06, "Invalid KEY Command" },
70 	{ 0x07, "Invalid LOAD Command" },
71 	{ 0x08, "Invalid STORE Command" },
72 	{ 0x09, "Invalid OPERATION Command" },
73 	{ 0x0A, "Invalid FIFO LOAD Command" },
74 	{ 0x0B, "Invalid FIFO STORE Command" },
75 	{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
76 	{ 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
77 	{ 0x0E, "Invalid MATH Command" },
78 	{ 0x0F, "Invalid SIGNATURE Command" },
79 	{ 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
80 	{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
81 	{ 0x12, "Shared Descriptor Header Error" },
82 	{ 0x13, "Header Error. Invalid length or parity, or certain other problems." },
83 	{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
84 	{ 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
85 	{ 0x16, "DMA Error" },
86 	{ 0x17, "Reserved." },
87 	{ 0x1A, "Job failed due to JR reset" },
88 	{ 0x1B, "Job failed due to Fail Mode" },
89 	{ 0x1C, "DECO Watchdog timer timeout error" },
90 	{ 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
91 	{ 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
92 	{ 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
93 	{ 0x20, "DECO has completed a reset initiated via the DRR register" },
94 	{ 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
95 	{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
96 	{ 0x23, "Read Input Frame error" },
97 	{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
98 	{ 0x80, "DNR (do not run) error" },
99 	{ 0x81, "undefined protocol command" },
100 	{ 0x82, "invalid setting in PDB" },
101 	{ 0x83, "Anti-replay LATE error" },
102 	{ 0x84, "Anti-replay REPLAY error" },
103 	{ 0x85, "Sequence number overflow" },
104 	{ 0x86, "Sigver invalid signature" },
105 	{ 0x87, "DSA Sign Illegal test descriptor" },
106 	{ 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
107 	{ 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
108 	{ 0xC1, "Blob Command error: Undefined mode" },
109 	{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
110 	{ 0xC4, "Blob Command error: Black Blob key or input size error" },
111 	{ 0xC5, "Blob Command error: Invalid key destination" },
112 	{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
113 	{ 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
114 	{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
115 };
116 
117 static const struct {
118 	u8 value;
119 	const char *error_text;
120 } qi_error_list[] = {
121 	{ 0x1F, "Job terminated by FQ or ICID flush" },
122 	{ 0x20, "FD format error"},
123 	{ 0x21, "FD command format error"},
124 	{ 0x23, "FL format error"},
125 	{ 0x25, "CRJD specified in FD, but not enabled in FLC"},
126 	{ 0x30, "Max. buffer size too small"},
127 	{ 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
128 	{ 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
129 	{ 0x33, "Size over/underflow (allocate mode)"},
130 	{ 0x34, "Size over/underflow (reuse mode)"},
131 	{ 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
132 	{ 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
133 	{ 0x41, "SBC frame format not supported (allocate mode)"},
134 	{ 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
135 	{ 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
136 	{ 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
137 	{ 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
138 	{ 0x46, "Annotation length exceeds offset (reuse mode)"},
139 	{ 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
140 	{ 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
141 	{ 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
142 	{ 0x51, "Unsupported IF reuse mode"},
143 	{ 0x52, "Unsupported FL use mode"},
144 	{ 0x53, "Unsupported RJD use mode"},
145 	{ 0x54, "Unsupported inline descriptor use mode"},
146 	{ 0xC0, "Table buffer pool 0 depletion"},
147 	{ 0xC1, "Table buffer pool 1 depletion"},
148 	{ 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
149 	{ 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
150 	{ 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
151 	{ 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
152 	{ 0xD0, "FLC read error"},
153 	{ 0xD1, "FL read error"},
154 	{ 0xD2, "FL write error"},
155 	{ 0xD3, "OF SGT write error"},
156 	{ 0xD4, "PTA read error"},
157 	{ 0xD5, "PTA write error"},
158 	{ 0xD6, "OF SGT F-bit write error"},
159 	{ 0xD7, "ASA write error"},
160 	{ 0xE1, "FLC[ICR]=0 ICID error"},
161 	{ 0xE2, "FLC[ICR]=1 ICID error"},
162 	{ 0xE4, "source of ICID flush not trusted (BDI = 0)"},
163 };
164 
165 static const char * const cha_id_list[] = {
166 	"",
167 	"AES",
168 	"DES",
169 	"ARC4",
170 	"MDHA",
171 	"RNG",
172 	"SNOW f8",
173 	"Kasumi f8/9",
174 	"PKHA",
175 	"CRCA",
176 	"SNOW f9",
177 	"ZUCE",
178 	"ZUCA",
179 };
180 
181 static const char * const err_id_list[] = {
182 	"No error.",
183 	"Mode error.",
184 	"Data size error.",
185 	"Key size error.",
186 	"PKHA A memory size error.",
187 	"PKHA B memory size error.",
188 	"Data arrived out of sequence error.",
189 	"PKHA divide-by-zero error.",
190 	"PKHA modulus even error.",
191 	"DES key parity error.",
192 	"ICV check failed.",
193 	"Hardware error.",
194 	"Unsupported CCM AAD size.",
195 	"Class 1 CHA is not reset",
196 	"Invalid CHA combination was selected",
197 	"Invalid CHA selected.",
198 };
199 
200 static const char * const rng_err_id_list[] = {
201 	"",
202 	"",
203 	"",
204 	"Instantiate",
205 	"Not instantiated",
206 	"Test instantiate",
207 	"Prediction resistance",
208 	"Prediction resistance and test request",
209 	"Uninstantiate",
210 	"Secure key generation",
211 };
212 
213 static void report_ccb_status(struct device *jrdev, const u32 status,
214 			      const char *error)
215 {
216 	u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
217 		    JRSTA_CCBERR_CHAID_SHIFT;
218 	u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
219 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
220 		  JRSTA_DECOERR_INDEX_SHIFT;
221 	char *idx_str;
222 	const char *cha_str = "unidentified cha_id value 0x";
223 	char cha_err_code[3] = { 0 };
224 	const char *err_str = "unidentified err_id value 0x";
225 	char err_err_code[3] = { 0 };
226 
227 	if (status & JRSTA_DECOERR_JUMP)
228 		idx_str = "jump tgt desc idx";
229 	else
230 		idx_str = "desc idx";
231 
232 	if (cha_id < ARRAY_SIZE(cha_id_list))
233 		cha_str = cha_id_list[cha_id];
234 	else
235 		snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
236 
237 	if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
238 	    err_id < ARRAY_SIZE(rng_err_id_list) &&
239 	    strlen(rng_err_id_list[err_id])) {
240 		/* RNG-only error */
241 		err_str = rng_err_id_list[err_id];
242 	} else {
243 		err_str = err_id_list[err_id];
244 	}
245 
246 	/*
247 	 * CCB ICV check failures are part of normal operation life;
248 	 * we leave the upper layers to do what they want with them.
249 	 */
250 	if (err_id != JRSTA_CCBERR_ERRID_ICVCHK)
251 		dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n",
252 			status, error, idx_str, idx,
253 			cha_str, cha_err_code,
254 			err_str, err_err_code);
255 }
256 
257 static void report_jump_status(struct device *jrdev, const u32 status,
258 			       const char *error)
259 {
260 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
261 		status, error, __func__);
262 }
263 
264 static void report_deco_status(struct device *jrdev, const u32 status,
265 			       const char *error)
266 {
267 	u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
268 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
269 		  JRSTA_DECOERR_INDEX_SHIFT;
270 	char *idx_str;
271 	const char *err_str = "unidentified error value 0x";
272 	char err_err_code[3] = { 0 };
273 	int i;
274 
275 	if (status & JRSTA_DECOERR_JUMP)
276 		idx_str = "jump tgt desc idx";
277 	else
278 		idx_str = "desc idx";
279 
280 	for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
281 		if (desc_error_list[i].value == err_id)
282 			break;
283 
284 	if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
285 		err_str = desc_error_list[i].error_text;
286 	else
287 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
288 
289 	dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
290 		status, error, idx_str, idx, err_str, err_err_code);
291 }
292 
293 static void report_qi_status(struct device *qidev, const u32 status,
294 			     const char *error)
295 {
296 	u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
297 	const char *err_str = "unidentified error value 0x";
298 	char err_err_code[3] = { 0 };
299 	int i;
300 
301 	for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
302 		if (qi_error_list[i].value == err_id)
303 			break;
304 
305 	if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
306 		err_str = qi_error_list[i].error_text;
307 	else
308 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
309 
310 	dev_err(qidev, "%08x: %s: %s%s\n",
311 		status, error, err_str, err_err_code);
312 }
313 
314 static void report_jr_status(struct device *jrdev, const u32 status,
315 			     const char *error)
316 {
317 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
318 		status, error, __func__);
319 }
320 
321 static void report_cond_code_status(struct device *jrdev, const u32 status,
322 				    const char *error)
323 {
324 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
325 		status, error, __func__);
326 }
327 
328 void caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
329 {
330 	static const struct stat_src {
331 		void (*report_ssed)(struct device *jrdev, const u32 status,
332 				    const char *error);
333 		const char *error;
334 	} status_src[16] = {
335 		{ NULL, "No error" },
336 		{ NULL, NULL },
337 		{ report_ccb_status, "CCB" },
338 		{ report_jump_status, "Jump" },
339 		{ report_deco_status, "DECO" },
340 		{ report_qi_status, "Queue Manager Interface" },
341 		{ report_jr_status, "Job Ring" },
342 		{ report_cond_code_status, "Condition Code" },
343 		{ NULL, NULL },
344 		{ NULL, NULL },
345 		{ NULL, NULL },
346 		{ NULL, NULL },
347 		{ NULL, NULL },
348 		{ NULL, NULL },
349 		{ NULL, NULL },
350 		{ NULL, NULL },
351 	};
352 	u32 ssrc = status >> JRSTA_SSRC_SHIFT;
353 	const char *error = status_src[ssrc].error;
354 
355 	/*
356 	 * If there is an error handling function, call it to report the error.
357 	 * Otherwise print the error source name.
358 	 */
359 	if (status_src[ssrc].report_ssed)
360 		status_src[ssrc].report_ssed(jrdev, status, error);
361 	else if (error)
362 		dev_err(jrdev, "%d: %s\n", ssrc, error);
363 	else
364 		dev_err(jrdev, "%d: unknown error source\n", ssrc);
365 }
366 EXPORT_SYMBOL(caam_strstatus);
367 
368 MODULE_LICENSE("GPL");
369 MODULE_DESCRIPTION("FSL CAAM error reporting");
370 MODULE_AUTHOR("Freescale Semiconductor");
371