1 /* 2 * CAAM control-plane driver backend 3 * Controller-level driver, kernel property detection, initialization 4 * 5 * Copyright 2008-2011 Freescale Semiconductor, Inc. 6 */ 7 8 #include "compat.h" 9 #include "regs.h" 10 #include "intern.h" 11 #include "jr.h" 12 13 static int caam_remove(struct platform_device *pdev) 14 { 15 struct device *ctrldev; 16 struct caam_drv_private *ctrlpriv; 17 struct caam_drv_private_jr *jrpriv; 18 struct caam_full __iomem *topregs; 19 int ring, ret = 0; 20 21 ctrldev = &pdev->dev; 22 ctrlpriv = dev_get_drvdata(ctrldev); 23 topregs = (struct caam_full __iomem *)ctrlpriv->ctrl; 24 25 /* shut down JobRs */ 26 for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) { 27 ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]); 28 jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]); 29 irq_dispose_mapping(jrpriv->irq); 30 } 31 32 /* Shut down debug views */ 33 #ifdef CONFIG_DEBUG_FS 34 debugfs_remove_recursive(ctrlpriv->dfs_root); 35 #endif 36 37 /* Unmap controller region */ 38 iounmap(&topregs->ctrl); 39 40 kfree(ctrlpriv->jrdev); 41 kfree(ctrlpriv); 42 43 return ret; 44 } 45 46 /* Probe routine for CAAM top (controller) level */ 47 static int caam_probe(struct platform_device *pdev) 48 { 49 int d, ring, rspec; 50 struct device *dev; 51 struct device_node *nprop, *np; 52 struct caam_ctrl __iomem *ctrl; 53 struct caam_full __iomem *topregs; 54 struct caam_drv_private *ctrlpriv; 55 struct caam_deco **deco; 56 u32 deconum; 57 #ifdef CONFIG_DEBUG_FS 58 struct caam_perfmon *perfmon; 59 #endif 60 61 ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL); 62 if (!ctrlpriv) 63 return -ENOMEM; 64 65 dev = &pdev->dev; 66 dev_set_drvdata(dev, ctrlpriv); 67 ctrlpriv->pdev = pdev; 68 nprop = pdev->dev.of_node; 69 70 /* Get configuration properties from device tree */ 71 /* First, get register page */ 72 ctrl = of_iomap(nprop, 0); 73 if (ctrl == NULL) { 74 dev_err(dev, "caam: of_iomap() failed\n"); 75 return -ENOMEM; 76 } 77 ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl; 78 79 /* topregs used to derive pointers to CAAM sub-blocks only */ 80 topregs = (struct caam_full __iomem *)ctrl; 81 82 /* Get the IRQ of the controller (for security violations only) */ 83 ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL); 84 85 /* 86 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, 87 * 36-bit pointers in master configuration register 88 */ 89 setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE | 90 (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0)); 91 92 if (sizeof(dma_addr_t) == sizeof(u64)) 93 dma_set_mask(dev, DMA_BIT_MASK(36)); 94 95 /* Find out how many DECOs are present */ 96 deconum = (rd_reg64(&topregs->ctrl.perfmon.cha_num) & 97 CHA_NUM_DECONUM_MASK) >> CHA_NUM_DECONUM_SHIFT; 98 99 ctrlpriv->deco = kmalloc(deconum * sizeof(struct caam_deco *), 100 GFP_KERNEL); 101 102 deco = (struct caam_deco __force **)&topregs->deco; 103 for (d = 0; d < deconum; d++) 104 ctrlpriv->deco[d] = deco[d]; 105 106 /* 107 * Detect and enable JobRs 108 * First, find out how many ring spec'ed, allocate references 109 * for all, then go probe each one. 110 */ 111 rspec = 0; 112 for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") 113 rspec++; 114 ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL); 115 if (ctrlpriv->jrdev == NULL) { 116 iounmap(&topregs->ctrl); 117 return -ENOMEM; 118 } 119 120 ring = 0; 121 ctrlpriv->total_jobrs = 0; 122 for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") { 123 caam_jr_probe(pdev, np, ring); 124 ctrlpriv->total_jobrs++; 125 ring++; 126 } 127 128 /* Check to see if QI present. If so, enable */ 129 ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) & 130 CTPR_QI_MASK); 131 if (ctrlpriv->qi_present) { 132 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi; 133 /* This is all that's required to physically enable QI */ 134 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN); 135 } 136 137 /* If no QI and no rings specified, quit and go home */ 138 if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) { 139 dev_err(dev, "no queues configured, terminating\n"); 140 caam_remove(pdev); 141 return -ENOMEM; 142 } 143 144 /* NOTE: RTIC detection ought to go here, around Si time */ 145 146 /* Initialize queue allocator lock */ 147 spin_lock_init(&ctrlpriv->jr_alloc_lock); 148 149 /* Report "alive" for developer to see */ 150 dev_info(dev, "device ID = 0x%016llx\n", 151 rd_reg64(&topregs->ctrl.perfmon.caam_id)); 152 dev_info(dev, "job rings = %d, qi = %d\n", 153 ctrlpriv->total_jobrs, ctrlpriv->qi_present); 154 155 #ifdef CONFIG_DEBUG_FS 156 /* 157 * FIXME: needs better naming distinction, as some amalgamation of 158 * "caam" and nprop->full_name. The OF name isn't distinctive, 159 * but does separate instances 160 */ 161 perfmon = (struct caam_perfmon __force *)&ctrl->perfmon; 162 163 ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL); 164 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root); 165 166 /* Controller-level - performance monitor counters */ 167 ctrlpriv->ctl_rq_dequeued = 168 debugfs_create_u64("rq_dequeued", 169 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 170 ctrlpriv->ctl, &perfmon->req_dequeued); 171 ctrlpriv->ctl_ob_enc_req = 172 debugfs_create_u64("ob_rq_encrypted", 173 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 174 ctrlpriv->ctl, &perfmon->ob_enc_req); 175 ctrlpriv->ctl_ib_dec_req = 176 debugfs_create_u64("ib_rq_decrypted", 177 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 178 ctrlpriv->ctl, &perfmon->ib_dec_req); 179 ctrlpriv->ctl_ob_enc_bytes = 180 debugfs_create_u64("ob_bytes_encrypted", 181 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 182 ctrlpriv->ctl, &perfmon->ob_enc_bytes); 183 ctrlpriv->ctl_ob_prot_bytes = 184 debugfs_create_u64("ob_bytes_protected", 185 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 186 ctrlpriv->ctl, &perfmon->ob_prot_bytes); 187 ctrlpriv->ctl_ib_dec_bytes = 188 debugfs_create_u64("ib_bytes_decrypted", 189 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 190 ctrlpriv->ctl, &perfmon->ib_dec_bytes); 191 ctrlpriv->ctl_ib_valid_bytes = 192 debugfs_create_u64("ib_bytes_validated", 193 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 194 ctrlpriv->ctl, &perfmon->ib_valid_bytes); 195 196 /* Controller level - global status values */ 197 ctrlpriv->ctl_faultaddr = 198 debugfs_create_u64("fault_addr", 199 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 200 ctrlpriv->ctl, &perfmon->faultaddr); 201 ctrlpriv->ctl_faultdetail = 202 debugfs_create_u32("fault_detail", 203 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 204 ctrlpriv->ctl, &perfmon->faultdetail); 205 ctrlpriv->ctl_faultstatus = 206 debugfs_create_u32("fault_status", 207 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 208 ctrlpriv->ctl, &perfmon->status); 209 210 /* Internal covering keys (useful in non-secure mode only) */ 211 ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0]; 212 ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32); 213 ctrlpriv->ctl_kek = debugfs_create_blob("kek", 214 S_IFCHR | S_IRUSR | 215 S_IRGRP | S_IROTH, 216 ctrlpriv->ctl, 217 &ctrlpriv->ctl_kek_wrap); 218 219 ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0]; 220 ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32); 221 ctrlpriv->ctl_tkek = debugfs_create_blob("tkek", 222 S_IFCHR | S_IRUSR | 223 S_IRGRP | S_IROTH, 224 ctrlpriv->ctl, 225 &ctrlpriv->ctl_tkek_wrap); 226 227 ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0]; 228 ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32); 229 ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk", 230 S_IFCHR | S_IRUSR | 231 S_IRGRP | S_IROTH, 232 ctrlpriv->ctl, 233 &ctrlpriv->ctl_tdsk_wrap); 234 #endif 235 return 0; 236 } 237 238 static struct of_device_id caam_match[] = { 239 { 240 .compatible = "fsl,sec-v4.0", 241 }, 242 {}, 243 }; 244 MODULE_DEVICE_TABLE(of, caam_match); 245 246 static struct platform_driver caam_driver = { 247 .driver = { 248 .name = "caam", 249 .owner = THIS_MODULE, 250 .of_match_table = caam_match, 251 }, 252 .probe = caam_probe, 253 .remove = __devexit_p(caam_remove), 254 }; 255 256 static int __init caam_base_init(void) 257 { 258 return platform_driver_register(&caam_driver); 259 } 260 261 static void __exit caam_base_exit(void) 262 { 263 return platform_driver_unregister(&caam_driver); 264 } 265 266 module_init(caam_base_init); 267 module_exit(caam_base_exit); 268 269 MODULE_LICENSE("GPL"); 270 MODULE_DESCRIPTION("FSL CAAM request backend"); 271 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC"); 272