1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* 3 * caam - Freescale FSL CAAM support for Public Key Cryptography 4 * 5 * Copyright 2016 Freescale Semiconductor, Inc. 6 * Copyright 2018-2019 NXP 7 * 8 * There is no Shared Descriptor for PKC so that the Job Descriptor must carry 9 * all the desired key parameters, input and output pointers. 10 */ 11 #include "compat.h" 12 #include "regs.h" 13 #include "intern.h" 14 #include "jr.h" 15 #include "error.h" 16 #include "desc_constr.h" 17 #include "sg_sw_sec4.h" 18 #include "caampkc.h" 19 20 #define DESC_RSA_PUB_LEN (2 * CAAM_CMD_SZ + SIZEOF_RSA_PUB_PDB) 21 #define DESC_RSA_PRIV_F1_LEN (2 * CAAM_CMD_SZ + \ 22 SIZEOF_RSA_PRIV_F1_PDB) 23 #define DESC_RSA_PRIV_F2_LEN (2 * CAAM_CMD_SZ + \ 24 SIZEOF_RSA_PRIV_F2_PDB) 25 #define DESC_RSA_PRIV_F3_LEN (2 * CAAM_CMD_SZ + \ 26 SIZEOF_RSA_PRIV_F3_PDB) 27 #define CAAM_RSA_MAX_INPUT_SIZE 512 /* for a 4096-bit modulus */ 28 29 /* buffer filled with zeros, used for padding */ 30 static u8 *zero_buffer; 31 32 /* 33 * variable used to avoid double free of resources in case 34 * algorithm registration was unsuccessful 35 */ 36 static bool init_done; 37 38 struct caam_akcipher_alg { 39 struct akcipher_alg akcipher; 40 bool registered; 41 }; 42 43 static void rsa_io_unmap(struct device *dev, struct rsa_edesc *edesc, 44 struct akcipher_request *req) 45 { 46 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 47 48 dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE); 49 dma_unmap_sg(dev, req_ctx->fixup_src, edesc->src_nents, DMA_TO_DEVICE); 50 51 if (edesc->sec4_sg_bytes) 52 dma_unmap_single(dev, edesc->sec4_sg_dma, edesc->sec4_sg_bytes, 53 DMA_TO_DEVICE); 54 } 55 56 static void rsa_pub_unmap(struct device *dev, struct rsa_edesc *edesc, 57 struct akcipher_request *req) 58 { 59 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 60 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 61 struct caam_rsa_key *key = &ctx->key; 62 struct rsa_pub_pdb *pdb = &edesc->pdb.pub; 63 64 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 65 dma_unmap_single(dev, pdb->e_dma, key->e_sz, DMA_TO_DEVICE); 66 } 67 68 static void rsa_priv_f1_unmap(struct device *dev, struct rsa_edesc *edesc, 69 struct akcipher_request *req) 70 { 71 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 72 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 73 struct caam_rsa_key *key = &ctx->key; 74 struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1; 75 76 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 77 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 78 } 79 80 static void rsa_priv_f2_unmap(struct device *dev, struct rsa_edesc *edesc, 81 struct akcipher_request *req) 82 { 83 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 84 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 85 struct caam_rsa_key *key = &ctx->key; 86 struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2; 87 size_t p_sz = key->p_sz; 88 size_t q_sz = key->q_sz; 89 90 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 91 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 92 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 93 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 94 dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL); 95 } 96 97 static void rsa_priv_f3_unmap(struct device *dev, struct rsa_edesc *edesc, 98 struct akcipher_request *req) 99 { 100 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 101 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 102 struct caam_rsa_key *key = &ctx->key; 103 struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3; 104 size_t p_sz = key->p_sz; 105 size_t q_sz = key->q_sz; 106 107 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 108 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 109 dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE); 110 dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE); 111 dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE); 112 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 113 dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL); 114 } 115 116 /* RSA Job Completion handler */ 117 static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context) 118 { 119 struct akcipher_request *req = context; 120 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 121 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 122 struct rsa_edesc *edesc; 123 int ecode = 0; 124 bool has_bklog; 125 126 if (err) 127 ecode = caam_jr_strstatus(dev, err); 128 129 edesc = req_ctx->edesc; 130 has_bklog = edesc->bklog; 131 132 rsa_pub_unmap(dev, edesc, req); 133 rsa_io_unmap(dev, edesc, req); 134 kfree(edesc); 135 136 /* 137 * If no backlog flag, the completion of the request is done 138 * by CAAM, not crypto engine. 139 */ 140 if (!has_bklog) 141 akcipher_request_complete(req, ecode); 142 else 143 crypto_finalize_akcipher_request(jrp->engine, req, ecode); 144 } 145 146 static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err, 147 void *context) 148 { 149 struct akcipher_request *req = context; 150 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 151 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 152 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 153 struct caam_rsa_key *key = &ctx->key; 154 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 155 struct rsa_edesc *edesc; 156 int ecode = 0; 157 bool has_bklog; 158 159 if (err) 160 ecode = caam_jr_strstatus(dev, err); 161 162 edesc = req_ctx->edesc; 163 has_bklog = edesc->bklog; 164 165 switch (key->priv_form) { 166 case FORM1: 167 rsa_priv_f1_unmap(dev, edesc, req); 168 break; 169 case FORM2: 170 rsa_priv_f2_unmap(dev, edesc, req); 171 break; 172 case FORM3: 173 rsa_priv_f3_unmap(dev, edesc, req); 174 } 175 176 rsa_io_unmap(dev, edesc, req); 177 kfree(edesc); 178 179 /* 180 * If no backlog flag, the completion of the request is done 181 * by CAAM, not crypto engine. 182 */ 183 if (!has_bklog) 184 akcipher_request_complete(req, ecode); 185 else 186 crypto_finalize_akcipher_request(jrp->engine, req, ecode); 187 } 188 189 /** 190 * caam_rsa_count_leading_zeros - Count leading zeros, need it to strip, 191 * from a given scatterlist 192 * 193 * @sgl : scatterlist to count zeros from 194 * @nbytes: number of zeros, in bytes, to strip 195 * @flags : operation flags 196 */ 197 static int caam_rsa_count_leading_zeros(struct scatterlist *sgl, 198 unsigned int nbytes, 199 unsigned int flags) 200 { 201 struct sg_mapping_iter miter; 202 int lzeros, ents; 203 unsigned int len; 204 unsigned int tbytes = nbytes; 205 const u8 *buff; 206 207 ents = sg_nents_for_len(sgl, nbytes); 208 if (ents < 0) 209 return ents; 210 211 sg_miter_start(&miter, sgl, ents, SG_MITER_FROM_SG | flags); 212 213 lzeros = 0; 214 len = 0; 215 while (nbytes > 0) { 216 /* do not strip more than given bytes */ 217 while (len && !*buff && lzeros < nbytes) { 218 lzeros++; 219 len--; 220 buff++; 221 } 222 223 if (len && *buff) 224 break; 225 226 sg_miter_next(&miter); 227 buff = miter.addr; 228 len = miter.length; 229 230 nbytes -= lzeros; 231 lzeros = 0; 232 } 233 234 miter.consumed = lzeros; 235 sg_miter_stop(&miter); 236 nbytes -= lzeros; 237 238 return tbytes - nbytes; 239 } 240 241 static struct rsa_edesc *rsa_edesc_alloc(struct akcipher_request *req, 242 size_t desclen) 243 { 244 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 245 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 246 struct device *dev = ctx->dev; 247 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 248 struct caam_rsa_key *key = &ctx->key; 249 struct rsa_edesc *edesc; 250 gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? 251 GFP_KERNEL : GFP_ATOMIC; 252 int sg_flags = (flags == GFP_ATOMIC) ? SG_MITER_ATOMIC : 0; 253 int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes; 254 int src_nents, dst_nents; 255 int mapped_src_nents, mapped_dst_nents; 256 unsigned int diff_size = 0; 257 int lzeros; 258 259 if (req->src_len > key->n_sz) { 260 /* 261 * strip leading zeros and 262 * return the number of zeros to skip 263 */ 264 lzeros = caam_rsa_count_leading_zeros(req->src, req->src_len - 265 key->n_sz, sg_flags); 266 if (lzeros < 0) 267 return ERR_PTR(lzeros); 268 269 req_ctx->fixup_src = scatterwalk_ffwd(req_ctx->src, req->src, 270 lzeros); 271 req_ctx->fixup_src_len = req->src_len - lzeros; 272 } else { 273 /* 274 * input src is less then n key modulus, 275 * so there will be zero padding 276 */ 277 diff_size = key->n_sz - req->src_len; 278 req_ctx->fixup_src = req->src; 279 req_ctx->fixup_src_len = req->src_len; 280 } 281 282 src_nents = sg_nents_for_len(req_ctx->fixup_src, 283 req_ctx->fixup_src_len); 284 dst_nents = sg_nents_for_len(req->dst, req->dst_len); 285 286 mapped_src_nents = dma_map_sg(dev, req_ctx->fixup_src, src_nents, 287 DMA_TO_DEVICE); 288 if (unlikely(!mapped_src_nents)) { 289 dev_err(dev, "unable to map source\n"); 290 return ERR_PTR(-ENOMEM); 291 } 292 mapped_dst_nents = dma_map_sg(dev, req->dst, dst_nents, 293 DMA_FROM_DEVICE); 294 if (unlikely(!mapped_dst_nents)) { 295 dev_err(dev, "unable to map destination\n"); 296 goto src_fail; 297 } 298 299 if (!diff_size && mapped_src_nents == 1) 300 sec4_sg_len = 0; /* no need for an input hw s/g table */ 301 else 302 sec4_sg_len = mapped_src_nents + !!diff_size; 303 sec4_sg_index = sec4_sg_len; 304 305 if (mapped_dst_nents > 1) 306 sec4_sg_len += pad_sg_nents(mapped_dst_nents); 307 else 308 sec4_sg_len = pad_sg_nents(sec4_sg_len); 309 310 sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry); 311 312 /* allocate space for base edesc, hw desc commands and link tables */ 313 edesc = kzalloc(sizeof(*edesc) + desclen + sec4_sg_bytes, 314 GFP_DMA | flags); 315 if (!edesc) 316 goto dst_fail; 317 318 edesc->sec4_sg = (void *)edesc + sizeof(*edesc) + desclen; 319 if (diff_size) 320 dma_to_sec4_sg_one(edesc->sec4_sg, ctx->padding_dma, diff_size, 321 0); 322 323 if (sec4_sg_index) 324 sg_to_sec4_sg_last(req_ctx->fixup_src, req_ctx->fixup_src_len, 325 edesc->sec4_sg + !!diff_size, 0); 326 327 if (mapped_dst_nents > 1) 328 sg_to_sec4_sg_last(req->dst, req->dst_len, 329 edesc->sec4_sg + sec4_sg_index, 0); 330 331 /* Save nents for later use in Job Descriptor */ 332 edesc->src_nents = src_nents; 333 edesc->dst_nents = dst_nents; 334 335 req_ctx->edesc = edesc; 336 337 if (!sec4_sg_bytes) 338 return edesc; 339 340 edesc->mapped_src_nents = mapped_src_nents; 341 edesc->mapped_dst_nents = mapped_dst_nents; 342 343 edesc->sec4_sg_dma = dma_map_single(dev, edesc->sec4_sg, 344 sec4_sg_bytes, DMA_TO_DEVICE); 345 if (dma_mapping_error(dev, edesc->sec4_sg_dma)) { 346 dev_err(dev, "unable to map S/G table\n"); 347 goto sec4_sg_fail; 348 } 349 350 edesc->sec4_sg_bytes = sec4_sg_bytes; 351 352 print_hex_dump_debug("caampkc sec4_sg@" __stringify(__LINE__) ": ", 353 DUMP_PREFIX_ADDRESS, 16, 4, edesc->sec4_sg, 354 edesc->sec4_sg_bytes, 1); 355 356 return edesc; 357 358 sec4_sg_fail: 359 kfree(edesc); 360 dst_fail: 361 dma_unmap_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE); 362 src_fail: 363 dma_unmap_sg(dev, req_ctx->fixup_src, src_nents, DMA_TO_DEVICE); 364 return ERR_PTR(-ENOMEM); 365 } 366 367 static int akcipher_do_one_req(struct crypto_engine *engine, void *areq) 368 { 369 struct akcipher_request *req = container_of(areq, 370 struct akcipher_request, 371 base); 372 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 373 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 374 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 375 struct device *jrdev = ctx->dev; 376 u32 *desc = req_ctx->edesc->hw_desc; 377 int ret; 378 379 req_ctx->edesc->bklog = true; 380 381 ret = caam_jr_enqueue(jrdev, desc, req_ctx->akcipher_op_done, req); 382 383 if (ret == -ENOSPC && engine->retry_support) 384 return ret; 385 386 if (ret != -EINPROGRESS) { 387 rsa_pub_unmap(jrdev, req_ctx->edesc, req); 388 rsa_io_unmap(jrdev, req_ctx->edesc, req); 389 kfree(req_ctx->edesc); 390 } else { 391 ret = 0; 392 } 393 394 return ret; 395 } 396 397 static int set_rsa_pub_pdb(struct akcipher_request *req, 398 struct rsa_edesc *edesc) 399 { 400 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 401 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 402 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 403 struct caam_rsa_key *key = &ctx->key; 404 struct device *dev = ctx->dev; 405 struct rsa_pub_pdb *pdb = &edesc->pdb.pub; 406 int sec4_sg_index = 0; 407 408 pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); 409 if (dma_mapping_error(dev, pdb->n_dma)) { 410 dev_err(dev, "Unable to map RSA modulus memory\n"); 411 return -ENOMEM; 412 } 413 414 pdb->e_dma = dma_map_single(dev, key->e, key->e_sz, DMA_TO_DEVICE); 415 if (dma_mapping_error(dev, pdb->e_dma)) { 416 dev_err(dev, "Unable to map RSA public exponent memory\n"); 417 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 418 return -ENOMEM; 419 } 420 421 if (edesc->mapped_src_nents > 1) { 422 pdb->sgf |= RSA_PDB_SGF_F; 423 pdb->f_dma = edesc->sec4_sg_dma; 424 sec4_sg_index += edesc->mapped_src_nents; 425 } else { 426 pdb->f_dma = sg_dma_address(req_ctx->fixup_src); 427 } 428 429 if (edesc->mapped_dst_nents > 1) { 430 pdb->sgf |= RSA_PDB_SGF_G; 431 pdb->g_dma = edesc->sec4_sg_dma + 432 sec4_sg_index * sizeof(struct sec4_sg_entry); 433 } else { 434 pdb->g_dma = sg_dma_address(req->dst); 435 } 436 437 pdb->sgf |= (key->e_sz << RSA_PDB_E_SHIFT) | key->n_sz; 438 pdb->f_len = req_ctx->fixup_src_len; 439 440 return 0; 441 } 442 443 static int set_rsa_priv_f1_pdb(struct akcipher_request *req, 444 struct rsa_edesc *edesc) 445 { 446 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 447 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 448 struct caam_rsa_key *key = &ctx->key; 449 struct device *dev = ctx->dev; 450 struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1; 451 int sec4_sg_index = 0; 452 453 pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); 454 if (dma_mapping_error(dev, pdb->n_dma)) { 455 dev_err(dev, "Unable to map modulus memory\n"); 456 return -ENOMEM; 457 } 458 459 pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE); 460 if (dma_mapping_error(dev, pdb->d_dma)) { 461 dev_err(dev, "Unable to map RSA private exponent memory\n"); 462 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 463 return -ENOMEM; 464 } 465 466 if (edesc->mapped_src_nents > 1) { 467 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 468 pdb->g_dma = edesc->sec4_sg_dma; 469 sec4_sg_index += edesc->mapped_src_nents; 470 471 } else { 472 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 473 474 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 475 } 476 477 if (edesc->mapped_dst_nents > 1) { 478 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 479 pdb->f_dma = edesc->sec4_sg_dma + 480 sec4_sg_index * sizeof(struct sec4_sg_entry); 481 } else { 482 pdb->f_dma = sg_dma_address(req->dst); 483 } 484 485 pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz; 486 487 return 0; 488 } 489 490 static int set_rsa_priv_f2_pdb(struct akcipher_request *req, 491 struct rsa_edesc *edesc) 492 { 493 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 494 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 495 struct caam_rsa_key *key = &ctx->key; 496 struct device *dev = ctx->dev; 497 struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2; 498 int sec4_sg_index = 0; 499 size_t p_sz = key->p_sz; 500 size_t q_sz = key->q_sz; 501 502 pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE); 503 if (dma_mapping_error(dev, pdb->d_dma)) { 504 dev_err(dev, "Unable to map RSA private exponent memory\n"); 505 return -ENOMEM; 506 } 507 508 pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE); 509 if (dma_mapping_error(dev, pdb->p_dma)) { 510 dev_err(dev, "Unable to map RSA prime factor p memory\n"); 511 goto unmap_d; 512 } 513 514 pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE); 515 if (dma_mapping_error(dev, pdb->q_dma)) { 516 dev_err(dev, "Unable to map RSA prime factor q memory\n"); 517 goto unmap_p; 518 } 519 520 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); 521 if (dma_mapping_error(dev, pdb->tmp1_dma)) { 522 dev_err(dev, "Unable to map RSA tmp1 memory\n"); 523 goto unmap_q; 524 } 525 526 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); 527 if (dma_mapping_error(dev, pdb->tmp2_dma)) { 528 dev_err(dev, "Unable to map RSA tmp2 memory\n"); 529 goto unmap_tmp1; 530 } 531 532 if (edesc->mapped_src_nents > 1) { 533 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 534 pdb->g_dma = edesc->sec4_sg_dma; 535 sec4_sg_index += edesc->mapped_src_nents; 536 } else { 537 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 538 539 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 540 } 541 542 if (edesc->mapped_dst_nents > 1) { 543 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 544 pdb->f_dma = edesc->sec4_sg_dma + 545 sec4_sg_index * sizeof(struct sec4_sg_entry); 546 } else { 547 pdb->f_dma = sg_dma_address(req->dst); 548 } 549 550 pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz; 551 pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz; 552 553 return 0; 554 555 unmap_tmp1: 556 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 557 unmap_q: 558 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 559 unmap_p: 560 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 561 unmap_d: 562 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 563 564 return -ENOMEM; 565 } 566 567 static int set_rsa_priv_f3_pdb(struct akcipher_request *req, 568 struct rsa_edesc *edesc) 569 { 570 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 571 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 572 struct caam_rsa_key *key = &ctx->key; 573 struct device *dev = ctx->dev; 574 struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3; 575 int sec4_sg_index = 0; 576 size_t p_sz = key->p_sz; 577 size_t q_sz = key->q_sz; 578 579 pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE); 580 if (dma_mapping_error(dev, pdb->p_dma)) { 581 dev_err(dev, "Unable to map RSA prime factor p memory\n"); 582 return -ENOMEM; 583 } 584 585 pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE); 586 if (dma_mapping_error(dev, pdb->q_dma)) { 587 dev_err(dev, "Unable to map RSA prime factor q memory\n"); 588 goto unmap_p; 589 } 590 591 pdb->dp_dma = dma_map_single(dev, key->dp, p_sz, DMA_TO_DEVICE); 592 if (dma_mapping_error(dev, pdb->dp_dma)) { 593 dev_err(dev, "Unable to map RSA exponent dp memory\n"); 594 goto unmap_q; 595 } 596 597 pdb->dq_dma = dma_map_single(dev, key->dq, q_sz, DMA_TO_DEVICE); 598 if (dma_mapping_error(dev, pdb->dq_dma)) { 599 dev_err(dev, "Unable to map RSA exponent dq memory\n"); 600 goto unmap_dp; 601 } 602 603 pdb->c_dma = dma_map_single(dev, key->qinv, p_sz, DMA_TO_DEVICE); 604 if (dma_mapping_error(dev, pdb->c_dma)) { 605 dev_err(dev, "Unable to map RSA CRT coefficient qinv memory\n"); 606 goto unmap_dq; 607 } 608 609 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); 610 if (dma_mapping_error(dev, pdb->tmp1_dma)) { 611 dev_err(dev, "Unable to map RSA tmp1 memory\n"); 612 goto unmap_qinv; 613 } 614 615 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); 616 if (dma_mapping_error(dev, pdb->tmp2_dma)) { 617 dev_err(dev, "Unable to map RSA tmp2 memory\n"); 618 goto unmap_tmp1; 619 } 620 621 if (edesc->mapped_src_nents > 1) { 622 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 623 pdb->g_dma = edesc->sec4_sg_dma; 624 sec4_sg_index += edesc->mapped_src_nents; 625 } else { 626 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 627 628 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 629 } 630 631 if (edesc->mapped_dst_nents > 1) { 632 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 633 pdb->f_dma = edesc->sec4_sg_dma + 634 sec4_sg_index * sizeof(struct sec4_sg_entry); 635 } else { 636 pdb->f_dma = sg_dma_address(req->dst); 637 } 638 639 pdb->sgf |= key->n_sz; 640 pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz; 641 642 return 0; 643 644 unmap_tmp1: 645 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 646 unmap_qinv: 647 dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE); 648 unmap_dq: 649 dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE); 650 unmap_dp: 651 dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE); 652 unmap_q: 653 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 654 unmap_p: 655 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 656 657 return -ENOMEM; 658 } 659 660 static int akcipher_enqueue_req(struct device *jrdev, 661 void (*cbk)(struct device *jrdev, u32 *desc, 662 u32 err, void *context), 663 struct akcipher_request *req) 664 { 665 struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev); 666 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 667 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 668 struct caam_rsa_key *key = &ctx->key; 669 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 670 struct rsa_edesc *edesc = req_ctx->edesc; 671 u32 *desc = edesc->hw_desc; 672 int ret; 673 674 req_ctx->akcipher_op_done = cbk; 675 /* 676 * Only the backlog request are sent to crypto-engine since the others 677 * can be handled by CAAM, if free, especially since JR has up to 1024 678 * entries (more than the 10 entries from crypto-engine). 679 */ 680 if (req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG) 681 ret = crypto_transfer_akcipher_request_to_engine(jrpriv->engine, 682 req); 683 else 684 ret = caam_jr_enqueue(jrdev, desc, cbk, req); 685 686 if ((ret != -EINPROGRESS) && (ret != -EBUSY)) { 687 switch (key->priv_form) { 688 case FORM1: 689 rsa_priv_f1_unmap(jrdev, edesc, req); 690 break; 691 case FORM2: 692 rsa_priv_f2_unmap(jrdev, edesc, req); 693 break; 694 case FORM3: 695 rsa_priv_f3_unmap(jrdev, edesc, req); 696 break; 697 default: 698 rsa_pub_unmap(jrdev, edesc, req); 699 } 700 rsa_io_unmap(jrdev, edesc, req); 701 kfree(edesc); 702 } 703 704 return ret; 705 } 706 707 static int caam_rsa_enc(struct akcipher_request *req) 708 { 709 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 710 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 711 struct caam_rsa_key *key = &ctx->key; 712 struct device *jrdev = ctx->dev; 713 struct rsa_edesc *edesc; 714 int ret; 715 716 if (unlikely(!key->n || !key->e)) 717 return -EINVAL; 718 719 if (req->dst_len < key->n_sz) { 720 req->dst_len = key->n_sz; 721 dev_err(jrdev, "Output buffer length less than parameter n\n"); 722 return -EOVERFLOW; 723 } 724 725 /* Allocate extended descriptor */ 726 edesc = rsa_edesc_alloc(req, DESC_RSA_PUB_LEN); 727 if (IS_ERR(edesc)) 728 return PTR_ERR(edesc); 729 730 /* Set RSA Encrypt Protocol Data Block */ 731 ret = set_rsa_pub_pdb(req, edesc); 732 if (ret) 733 goto init_fail; 734 735 /* Initialize Job Descriptor */ 736 init_rsa_pub_desc(edesc->hw_desc, &edesc->pdb.pub); 737 738 return akcipher_enqueue_req(jrdev, rsa_pub_done, req); 739 740 init_fail: 741 rsa_io_unmap(jrdev, edesc, req); 742 kfree(edesc); 743 return ret; 744 } 745 746 static int caam_rsa_dec_priv_f1(struct akcipher_request *req) 747 { 748 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 749 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 750 struct device *jrdev = ctx->dev; 751 struct rsa_edesc *edesc; 752 int ret; 753 754 /* Allocate extended descriptor */ 755 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F1_LEN); 756 if (IS_ERR(edesc)) 757 return PTR_ERR(edesc); 758 759 /* Set RSA Decrypt Protocol Data Block - Private Key Form #1 */ 760 ret = set_rsa_priv_f1_pdb(req, edesc); 761 if (ret) 762 goto init_fail; 763 764 /* Initialize Job Descriptor */ 765 init_rsa_priv_f1_desc(edesc->hw_desc, &edesc->pdb.priv_f1); 766 767 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 768 769 init_fail: 770 rsa_io_unmap(jrdev, edesc, req); 771 kfree(edesc); 772 return ret; 773 } 774 775 static int caam_rsa_dec_priv_f2(struct akcipher_request *req) 776 { 777 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 778 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 779 struct device *jrdev = ctx->dev; 780 struct rsa_edesc *edesc; 781 int ret; 782 783 /* Allocate extended descriptor */ 784 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F2_LEN); 785 if (IS_ERR(edesc)) 786 return PTR_ERR(edesc); 787 788 /* Set RSA Decrypt Protocol Data Block - Private Key Form #2 */ 789 ret = set_rsa_priv_f2_pdb(req, edesc); 790 if (ret) 791 goto init_fail; 792 793 /* Initialize Job Descriptor */ 794 init_rsa_priv_f2_desc(edesc->hw_desc, &edesc->pdb.priv_f2); 795 796 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 797 798 init_fail: 799 rsa_io_unmap(jrdev, edesc, req); 800 kfree(edesc); 801 return ret; 802 } 803 804 static int caam_rsa_dec_priv_f3(struct akcipher_request *req) 805 { 806 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 807 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 808 struct device *jrdev = ctx->dev; 809 struct rsa_edesc *edesc; 810 int ret; 811 812 /* Allocate extended descriptor */ 813 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F3_LEN); 814 if (IS_ERR(edesc)) 815 return PTR_ERR(edesc); 816 817 /* Set RSA Decrypt Protocol Data Block - Private Key Form #3 */ 818 ret = set_rsa_priv_f3_pdb(req, edesc); 819 if (ret) 820 goto init_fail; 821 822 /* Initialize Job Descriptor */ 823 init_rsa_priv_f3_desc(edesc->hw_desc, &edesc->pdb.priv_f3); 824 825 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 826 827 init_fail: 828 rsa_io_unmap(jrdev, edesc, req); 829 kfree(edesc); 830 return ret; 831 } 832 833 static int caam_rsa_dec(struct akcipher_request *req) 834 { 835 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 836 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 837 struct caam_rsa_key *key = &ctx->key; 838 int ret; 839 840 if (unlikely(!key->n || !key->d)) 841 return -EINVAL; 842 843 if (req->dst_len < key->n_sz) { 844 req->dst_len = key->n_sz; 845 dev_err(ctx->dev, "Output buffer length less than parameter n\n"); 846 return -EOVERFLOW; 847 } 848 849 if (key->priv_form == FORM3) 850 ret = caam_rsa_dec_priv_f3(req); 851 else if (key->priv_form == FORM2) 852 ret = caam_rsa_dec_priv_f2(req); 853 else 854 ret = caam_rsa_dec_priv_f1(req); 855 856 return ret; 857 } 858 859 static void caam_rsa_free_key(struct caam_rsa_key *key) 860 { 861 kfree_sensitive(key->d); 862 kfree_sensitive(key->p); 863 kfree_sensitive(key->q); 864 kfree_sensitive(key->dp); 865 kfree_sensitive(key->dq); 866 kfree_sensitive(key->qinv); 867 kfree_sensitive(key->tmp1); 868 kfree_sensitive(key->tmp2); 869 kfree(key->e); 870 kfree(key->n); 871 memset(key, 0, sizeof(*key)); 872 } 873 874 static void caam_rsa_drop_leading_zeros(const u8 **ptr, size_t *nbytes) 875 { 876 while (!**ptr && *nbytes) { 877 (*ptr)++; 878 (*nbytes)--; 879 } 880 } 881 882 /** 883 * caam_read_rsa_crt - Used for reading dP, dQ, qInv CRT members. 884 * dP, dQ and qInv could decode to less than corresponding p, q length, as the 885 * BER-encoding requires that the minimum number of bytes be used to encode the 886 * integer. dP, dQ, qInv decoded values have to be zero-padded to appropriate 887 * length. 888 * 889 * @ptr : pointer to {dP, dQ, qInv} CRT member 890 * @nbytes: length in bytes of {dP, dQ, qInv} CRT member 891 * @dstlen: length in bytes of corresponding p or q prime factor 892 */ 893 static u8 *caam_read_rsa_crt(const u8 *ptr, size_t nbytes, size_t dstlen) 894 { 895 u8 *dst; 896 897 caam_rsa_drop_leading_zeros(&ptr, &nbytes); 898 if (!nbytes) 899 return NULL; 900 901 dst = kzalloc(dstlen, GFP_DMA | GFP_KERNEL); 902 if (!dst) 903 return NULL; 904 905 memcpy(dst + (dstlen - nbytes), ptr, nbytes); 906 907 return dst; 908 } 909 910 /** 911 * caam_read_raw_data - Read a raw byte stream as a positive integer. 912 * The function skips buffer's leading zeros, copies the remained data 913 * to a buffer allocated in the GFP_DMA | GFP_KERNEL zone and returns 914 * the address of the new buffer. 915 * 916 * @buf : The data to read 917 * @nbytes: The amount of data to read 918 */ 919 static inline u8 *caam_read_raw_data(const u8 *buf, size_t *nbytes) 920 { 921 922 caam_rsa_drop_leading_zeros(&buf, nbytes); 923 if (!*nbytes) 924 return NULL; 925 926 return kmemdup(buf, *nbytes, GFP_DMA | GFP_KERNEL); 927 } 928 929 static int caam_rsa_check_key_length(unsigned int len) 930 { 931 if (len > 4096) 932 return -EINVAL; 933 return 0; 934 } 935 936 static int caam_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, 937 unsigned int keylen) 938 { 939 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 940 struct rsa_key raw_key = {NULL}; 941 struct caam_rsa_key *rsa_key = &ctx->key; 942 int ret; 943 944 /* Free the old RSA key if any */ 945 caam_rsa_free_key(rsa_key); 946 947 ret = rsa_parse_pub_key(&raw_key, key, keylen); 948 if (ret) 949 return ret; 950 951 /* Copy key in DMA zone */ 952 rsa_key->e = kmemdup(raw_key.e, raw_key.e_sz, GFP_DMA | GFP_KERNEL); 953 if (!rsa_key->e) 954 goto err; 955 956 /* 957 * Skip leading zeros and copy the positive integer to a buffer 958 * allocated in the GFP_DMA | GFP_KERNEL zone. The decryption descriptor 959 * expects a positive integer for the RSA modulus and uses its length as 960 * decryption output length. 961 */ 962 rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz); 963 if (!rsa_key->n) 964 goto err; 965 966 if (caam_rsa_check_key_length(raw_key.n_sz << 3)) { 967 caam_rsa_free_key(rsa_key); 968 return -EINVAL; 969 } 970 971 rsa_key->e_sz = raw_key.e_sz; 972 rsa_key->n_sz = raw_key.n_sz; 973 974 return 0; 975 err: 976 caam_rsa_free_key(rsa_key); 977 return -ENOMEM; 978 } 979 980 static void caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx, 981 struct rsa_key *raw_key) 982 { 983 struct caam_rsa_key *rsa_key = &ctx->key; 984 size_t p_sz = raw_key->p_sz; 985 size_t q_sz = raw_key->q_sz; 986 987 rsa_key->p = caam_read_raw_data(raw_key->p, &p_sz); 988 if (!rsa_key->p) 989 return; 990 rsa_key->p_sz = p_sz; 991 992 rsa_key->q = caam_read_raw_data(raw_key->q, &q_sz); 993 if (!rsa_key->q) 994 goto free_p; 995 rsa_key->q_sz = q_sz; 996 997 rsa_key->tmp1 = kzalloc(raw_key->p_sz, GFP_DMA | GFP_KERNEL); 998 if (!rsa_key->tmp1) 999 goto free_q; 1000 1001 rsa_key->tmp2 = kzalloc(raw_key->q_sz, GFP_DMA | GFP_KERNEL); 1002 if (!rsa_key->tmp2) 1003 goto free_tmp1; 1004 1005 rsa_key->priv_form = FORM2; 1006 1007 rsa_key->dp = caam_read_rsa_crt(raw_key->dp, raw_key->dp_sz, p_sz); 1008 if (!rsa_key->dp) 1009 goto free_tmp2; 1010 1011 rsa_key->dq = caam_read_rsa_crt(raw_key->dq, raw_key->dq_sz, q_sz); 1012 if (!rsa_key->dq) 1013 goto free_dp; 1014 1015 rsa_key->qinv = caam_read_rsa_crt(raw_key->qinv, raw_key->qinv_sz, 1016 q_sz); 1017 if (!rsa_key->qinv) 1018 goto free_dq; 1019 1020 rsa_key->priv_form = FORM3; 1021 1022 return; 1023 1024 free_dq: 1025 kfree_sensitive(rsa_key->dq); 1026 free_dp: 1027 kfree_sensitive(rsa_key->dp); 1028 free_tmp2: 1029 kfree_sensitive(rsa_key->tmp2); 1030 free_tmp1: 1031 kfree_sensitive(rsa_key->tmp1); 1032 free_q: 1033 kfree_sensitive(rsa_key->q); 1034 free_p: 1035 kfree_sensitive(rsa_key->p); 1036 } 1037 1038 static int caam_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, 1039 unsigned int keylen) 1040 { 1041 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 1042 struct rsa_key raw_key = {NULL}; 1043 struct caam_rsa_key *rsa_key = &ctx->key; 1044 int ret; 1045 1046 /* Free the old RSA key if any */ 1047 caam_rsa_free_key(rsa_key); 1048 1049 ret = rsa_parse_priv_key(&raw_key, key, keylen); 1050 if (ret) 1051 return ret; 1052 1053 /* Copy key in DMA zone */ 1054 rsa_key->d = kmemdup(raw_key.d, raw_key.d_sz, GFP_DMA | GFP_KERNEL); 1055 if (!rsa_key->d) 1056 goto err; 1057 1058 rsa_key->e = kmemdup(raw_key.e, raw_key.e_sz, GFP_DMA | GFP_KERNEL); 1059 if (!rsa_key->e) 1060 goto err; 1061 1062 /* 1063 * Skip leading zeros and copy the positive integer to a buffer 1064 * allocated in the GFP_DMA | GFP_KERNEL zone. The decryption descriptor 1065 * expects a positive integer for the RSA modulus and uses its length as 1066 * decryption output length. 1067 */ 1068 rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz); 1069 if (!rsa_key->n) 1070 goto err; 1071 1072 if (caam_rsa_check_key_length(raw_key.n_sz << 3)) { 1073 caam_rsa_free_key(rsa_key); 1074 return -EINVAL; 1075 } 1076 1077 rsa_key->d_sz = raw_key.d_sz; 1078 rsa_key->e_sz = raw_key.e_sz; 1079 rsa_key->n_sz = raw_key.n_sz; 1080 1081 caam_rsa_set_priv_key_form(ctx, &raw_key); 1082 1083 return 0; 1084 1085 err: 1086 caam_rsa_free_key(rsa_key); 1087 return -ENOMEM; 1088 } 1089 1090 static unsigned int caam_rsa_max_size(struct crypto_akcipher *tfm) 1091 { 1092 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 1093 1094 return ctx->key.n_sz; 1095 } 1096 1097 /* Per session pkc's driver context creation function */ 1098 static int caam_rsa_init_tfm(struct crypto_akcipher *tfm) 1099 { 1100 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 1101 1102 ctx->dev = caam_jr_alloc(); 1103 1104 if (IS_ERR(ctx->dev)) { 1105 pr_err("Job Ring Device allocation for transform failed\n"); 1106 return PTR_ERR(ctx->dev); 1107 } 1108 1109 ctx->padding_dma = dma_map_single(ctx->dev, zero_buffer, 1110 CAAM_RSA_MAX_INPUT_SIZE - 1, 1111 DMA_TO_DEVICE); 1112 if (dma_mapping_error(ctx->dev, ctx->padding_dma)) { 1113 dev_err(ctx->dev, "unable to map padding\n"); 1114 caam_jr_free(ctx->dev); 1115 return -ENOMEM; 1116 } 1117 1118 ctx->enginectx.op.do_one_request = akcipher_do_one_req; 1119 1120 return 0; 1121 } 1122 1123 /* Per session pkc's driver context cleanup function */ 1124 static void caam_rsa_exit_tfm(struct crypto_akcipher *tfm) 1125 { 1126 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); 1127 struct caam_rsa_key *key = &ctx->key; 1128 1129 dma_unmap_single(ctx->dev, ctx->padding_dma, CAAM_RSA_MAX_INPUT_SIZE - 1130 1, DMA_TO_DEVICE); 1131 caam_rsa_free_key(key); 1132 caam_jr_free(ctx->dev); 1133 } 1134 1135 static struct caam_akcipher_alg caam_rsa = { 1136 .akcipher = { 1137 .encrypt = caam_rsa_enc, 1138 .decrypt = caam_rsa_dec, 1139 .set_pub_key = caam_rsa_set_pub_key, 1140 .set_priv_key = caam_rsa_set_priv_key, 1141 .max_size = caam_rsa_max_size, 1142 .init = caam_rsa_init_tfm, 1143 .exit = caam_rsa_exit_tfm, 1144 .reqsize = sizeof(struct caam_rsa_req_ctx), 1145 .base = { 1146 .cra_name = "rsa", 1147 .cra_driver_name = "rsa-caam", 1148 .cra_priority = 3000, 1149 .cra_module = THIS_MODULE, 1150 .cra_ctxsize = sizeof(struct caam_rsa_ctx), 1151 }, 1152 } 1153 }; 1154 1155 /* Public Key Cryptography module initialization handler */ 1156 int caam_pkc_init(struct device *ctrldev) 1157 { 1158 struct caam_drv_private *priv = dev_get_drvdata(ctrldev); 1159 u32 pk_inst, pkha; 1160 int err; 1161 init_done = false; 1162 1163 /* Determine public key hardware accelerator presence. */ 1164 if (priv->era < 10) { 1165 pk_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & 1166 CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT; 1167 } else { 1168 pkha = rd_reg32(&priv->ctrl->vreg.pkha); 1169 pk_inst = pkha & CHA_VER_NUM_MASK; 1170 1171 /* 1172 * Newer CAAMs support partially disabled functionality. If this is the 1173 * case, the number is non-zero, but this bit is set to indicate that 1174 * no encryption or decryption is supported. Only signing and verifying 1175 * is supported. 1176 */ 1177 if (pkha & CHA_VER_MISC_PKHA_NO_CRYPT) 1178 pk_inst = 0; 1179 } 1180 1181 /* Do not register algorithms if PKHA is not present. */ 1182 if (!pk_inst) 1183 return 0; 1184 1185 /* allocate zero buffer, used for padding input */ 1186 zero_buffer = kzalloc(CAAM_RSA_MAX_INPUT_SIZE - 1, GFP_DMA | 1187 GFP_KERNEL); 1188 if (!zero_buffer) 1189 return -ENOMEM; 1190 1191 err = crypto_register_akcipher(&caam_rsa.akcipher); 1192 1193 if (err) { 1194 kfree(zero_buffer); 1195 dev_warn(ctrldev, "%s alg registration failed\n", 1196 caam_rsa.akcipher.base.cra_driver_name); 1197 } else { 1198 init_done = true; 1199 caam_rsa.registered = true; 1200 dev_info(ctrldev, "caam pkc algorithms registered in /proc/crypto\n"); 1201 } 1202 1203 return err; 1204 } 1205 1206 void caam_pkc_exit(void) 1207 { 1208 if (!init_done) 1209 return; 1210 1211 if (caam_rsa.registered) 1212 crypto_unregister_akcipher(&caam_rsa.akcipher); 1213 1214 kfree(zero_buffer); 1215 } 1216