xref: /openbmc/linux/drivers/crypto/caam/Kconfig (revision f20c7d91)
1# SPDX-License-Identifier: GPL-2.0
2config CRYPTO_DEV_FSL_CAAM_COMMON
3	tristate
4
5config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
6	tristate
7
8config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
9	tristate
10
11config CRYPTO_DEV_FSL_CAAM
12	tristate "Freescale CAAM-Multicore platform driver backend"
13	depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE
14	select SOC_BUS
15	select CRYPTO_DEV_FSL_CAAM_COMMON
16	imply FSL_MC_BUS
17	help
18	  Enables the driver module for Freescale's Cryptographic Accelerator
19	  and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
20	  This module creates job ring devices, and configures h/w
21	  to operate as a DPAA component automatically, depending
22	  on h/w feature availability.
23
24	  To compile this driver as a module, choose M here: the module
25	  will be called caam.
26
27if CRYPTO_DEV_FSL_CAAM
28
29config CRYPTO_DEV_FSL_CAAM_DEBUG
30	bool "Enable debug output in CAAM driver"
31	help
32	  Selecting this will enable printing of various debug
33	  information in the CAAM driver.
34
35menuconfig CRYPTO_DEV_FSL_CAAM_JR
36	tristate "Freescale CAAM Job Ring driver backend"
37	select CRYPTO_ENGINE
38	default y
39	help
40	  Enables the driver module for Job Rings which are part of
41	  Freescale's Cryptographic Accelerator
42	  and Assurance Module (CAAM). This module adds a job ring operation
43	  interface.
44
45	  To compile this driver as a module, choose M here: the module
46	  will be called caam_jr.
47
48if CRYPTO_DEV_FSL_CAAM_JR
49
50config CRYPTO_DEV_FSL_CAAM_RINGSIZE
51	int "Job Ring size"
52	range 2 9
53	default "9"
54	help
55	  Select size of Job Rings as a power of 2, within the
56	  range 2-9 (ring size 4-512).
57	  Examples:
58		2 => 4
59		3 => 8
60		4 => 16
61		5 => 32
62		6 => 64
63		7 => 128
64		8 => 256
65		9 => 512
66
67config CRYPTO_DEV_FSL_CAAM_INTC
68	bool "Job Ring interrupt coalescing"
69	help
70	  Enable the Job Ring's interrupt coalescing feature.
71
72	  Note: the driver already provides adequate
73	  interrupt coalescing in software.
74
75config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
76	int "Job Ring interrupt coalescing count threshold"
77	depends on CRYPTO_DEV_FSL_CAAM_INTC
78	range 1 255
79	default 255
80	help
81	  Select number of descriptor completions to queue before
82	  raising an interrupt, in the range 1-255. Note that a selection
83	  of 1 functionally defeats the coalescing feature, and a selection
84	  equal or greater than the job ring size will force timeouts.
85
86config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
87	int "Job Ring interrupt coalescing timer threshold"
88	depends on CRYPTO_DEV_FSL_CAAM_INTC
89	range 1 65535
90	default 2048
91	help
92	  Select number of bus clocks/64 to timeout in the case that one or
93	  more descriptor completions are queued without reaching the count
94	  threshold. Range is 1-65535.
95
96config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
97	bool "Register algorithm implementations with the Crypto API"
98	default y
99	select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
100	select CRYPTO_AEAD
101	select CRYPTO_AUTHENC
102	select CRYPTO_SKCIPHER
103	select CRYPTO_LIB_DES
104	help
105	  Selecting this will offload crypto for users of the
106	  scatterlist crypto API (such as the linux native IPSec
107	  stack) to the SEC4 via job ring.
108
109config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI
110	bool "Queue Interface as Crypto API backend"
111	depends on FSL_DPAA && NET
112	default y
113	select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
114	select CRYPTO_AUTHENC
115	select CRYPTO_SKCIPHER
116	select CRYPTO_DES
117	help
118	  Selecting this will use CAAM Queue Interface (QI) for sending
119	  & receiving crypto jobs to/from CAAM. This gives better performance
120	  than job ring interface when the number of cores are more than the
121	  number of job rings assigned to the kernel. The number of portals
122	  assigned to the kernel should also be more than the number of
123	  job rings.
124
125config CRYPTO_DEV_FSL_CAAM_AHASH_API
126	bool "Register hash algorithm implementations with Crypto API"
127	default y
128	select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
129	select CRYPTO_HASH
130	help
131	  Selecting this will offload ahash for users of the
132	  scatterlist crypto API to the SEC4 via job ring.
133
134config CRYPTO_DEV_FSL_CAAM_PKC_API
135	bool "Register public key cryptography implementations with Crypto API"
136	default y
137	select CRYPTO_RSA
138	help
139	  Selecting this will allow SEC Public key support for RSA.
140	  Supported cryptographic primitives: encryption, decryption,
141	  signature and verification.
142
143config CRYPTO_DEV_FSL_CAAM_RNG_API
144	bool "Register caam device for hwrng API"
145	default y
146	select CRYPTO_RNG
147	select HW_RANDOM
148	help
149	  Selecting this will register the SEC4 hardware rng to
150	  the hw_random API for suppying the kernel entropy pool.
151
152endif # CRYPTO_DEV_FSL_CAAM_JR
153
154endif # CRYPTO_DEV_FSL_CAAM
155
156config CRYPTO_DEV_FSL_DPAA2_CAAM
157	tristate "QorIQ DPAA2 CAAM (DPSECI) driver"
158	depends on FSL_MC_DPIO
159	depends on NETDEVICES
160	select CRYPTO_DEV_FSL_CAAM_COMMON
161	select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
162	select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
163	select CRYPTO_SKCIPHER
164	select CRYPTO_AUTHENC
165	select CRYPTO_AEAD
166	select CRYPTO_HASH
167	select CRYPTO_DES
168	help
169	  CAAM driver for QorIQ Data Path Acceleration Architecture 2.
170	  It handles DPSECI DPAA2 objects that sit on the Management Complex
171	  (MC) fsl-mc bus.
172
173	  To compile this as a module, choose M here: the module
174	  will be called dpaa2_caam.
175