1# SPDX-License-Identifier: GPL-2.0 2config CRYPTO_DEV_FSL_CAAM_COMMON 3 tristate 4 5config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC 6 tristate 7 8config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC 9 tristate 10 11config CRYPTO_DEV_FSL_CAAM 12 tristate "Freescale CAAM-Multicore platform driver backend" 13 depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE 14 select SOC_BUS 15 select CRYPTO_DEV_FSL_CAAM_COMMON 16 imply FSL_MC_BUS 17 help 18 Enables the driver module for Freescale's Cryptographic Accelerator 19 and Assurance Module (CAAM), also known as the SEC version 4 (SEC4). 20 This module creates job ring devices, and configures h/w 21 to operate as a DPAA component automatically, depending 22 on h/w feature availability. 23 24 To compile this driver as a module, choose M here: the module 25 will be called caam. 26 27if CRYPTO_DEV_FSL_CAAM 28 29config CRYPTO_DEV_FSL_CAAM_DEBUG 30 bool "Enable debug output in CAAM driver" 31 help 32 Selecting this will enable printing of various debug 33 information in the CAAM driver. 34 35menuconfig CRYPTO_DEV_FSL_CAAM_JR 36 tristate "Freescale CAAM Job Ring driver backend" 37 select CRYPTO_ENGINE 38 default y 39 help 40 Enables the driver module for Job Rings which are part of 41 Freescale's Cryptographic Accelerator 42 and Assurance Module (CAAM). This module adds a job ring operation 43 interface. 44 45 To compile this driver as a module, choose M here: the module 46 will be called caam_jr. 47 48if CRYPTO_DEV_FSL_CAAM_JR 49 50config CRYPTO_DEV_FSL_CAAM_RINGSIZE 51 int "Job Ring size" 52 range 2 9 53 default "9" 54 help 55 Select size of Job Rings as a power of 2, within the 56 range 2-9 (ring size 4-512). 57 Examples: 58 2 => 4 59 3 => 8 60 4 => 16 61 5 => 32 62 6 => 64 63 7 => 128 64 8 => 256 65 9 => 512 66 67config CRYPTO_DEV_FSL_CAAM_INTC 68 bool "Job Ring interrupt coalescing" 69 help 70 Enable the Job Ring's interrupt coalescing feature. 71 72 Note: the driver already provides adequate 73 interrupt coalescing in software. 74 75config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD 76 int "Job Ring interrupt coalescing count threshold" 77 depends on CRYPTO_DEV_FSL_CAAM_INTC 78 range 1 255 79 default 255 80 help 81 Select number of descriptor completions to queue before 82 raising an interrupt, in the range 1-255. Note that a selection 83 of 1 functionally defeats the coalescing feature, and a selection 84 equal or greater than the job ring size will force timeouts. 85 86config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD 87 int "Job Ring interrupt coalescing timer threshold" 88 depends on CRYPTO_DEV_FSL_CAAM_INTC 89 range 1 65535 90 default 2048 91 help 92 Select number of bus clocks/64 to timeout in the case that one or 93 more descriptor completions are queued without reaching the count 94 threshold. Range is 1-65535. 95 96config CRYPTO_DEV_FSL_CAAM_CRYPTO_API 97 bool "Register algorithm implementations with the Crypto API" 98 default y 99 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC 100 select CRYPTO_AEAD 101 select CRYPTO_AUTHENC 102 select CRYPTO_SKCIPHER 103 select CRYPTO_LIB_DES 104 select CRYPTO_XTS 105 help 106 Selecting this will offload crypto for users of the 107 scatterlist crypto API (such as the linux native IPSec 108 stack) to the SEC4 via job ring. 109 110config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI 111 bool "Queue Interface as Crypto API backend" 112 depends on FSL_DPAA && NET 113 default y 114 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC 115 select CRYPTO_AUTHENC 116 select CRYPTO_SKCIPHER 117 select CRYPTO_DES 118 help 119 Selecting this will use CAAM Queue Interface (QI) for sending 120 & receiving crypto jobs to/from CAAM. This gives better performance 121 than job ring interface when the number of cores are more than the 122 number of job rings assigned to the kernel. The number of portals 123 assigned to the kernel should also be more than the number of 124 job rings. 125 126config CRYPTO_DEV_FSL_CAAM_AHASH_API 127 bool "Register hash algorithm implementations with Crypto API" 128 default y 129 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC 130 select CRYPTO_HASH 131 help 132 Selecting this will offload ahash for users of the 133 scatterlist crypto API to the SEC4 via job ring. 134 135config CRYPTO_DEV_FSL_CAAM_PKC_API 136 bool "Register public key cryptography implementations with Crypto API" 137 default y 138 select CRYPTO_RSA 139 help 140 Selecting this will allow SEC Public key support for RSA. 141 Supported cryptographic primitives: encryption, decryption, 142 signature and verification. 143 144config CRYPTO_DEV_FSL_CAAM_RNG_API 145 bool "Register caam device for hwrng API" 146 default y 147 select CRYPTO_RNG 148 select HW_RANDOM 149 help 150 Selecting this will register the SEC4 hardware rng to 151 the hw_random API for supplying the kernel entropy pool. 152 153endif # CRYPTO_DEV_FSL_CAAM_JR 154 155endif # CRYPTO_DEV_FSL_CAAM 156 157config CRYPTO_DEV_FSL_DPAA2_CAAM 158 tristate "QorIQ DPAA2 CAAM (DPSECI) driver" 159 depends on FSL_MC_DPIO 160 depends on NETDEVICES 161 select CRYPTO_DEV_FSL_CAAM_COMMON 162 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC 163 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC 164 select CRYPTO_SKCIPHER 165 select CRYPTO_AUTHENC 166 select CRYPTO_AEAD 167 select CRYPTO_HASH 168 select CRYPTO_DES 169 help 170 CAAM driver for QorIQ Data Path Acceleration Architecture 2. 171 It handles DPSECI DPAA2 objects that sit on the Management Complex 172 (MC) fsl-mc bus. 173 174 To compile this as a module, choose M here: the module 175 will be called dpaa2_caam. 176