1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2016 Broadcom 4 */ 5 6 /* 7 * This file contains the definition of SPU messages. There are currently two 8 * SPU message formats: SPU-M and SPU2. The hardware uses different values to 9 * identify the same things in SPU-M vs SPU2. So this file defines values that 10 * are hardware independent. Software can use these values for any version of 11 * SPU hardware. These values are used in APIs in spu.c. Functions internal to 12 * spu.c and spu2.c convert these to hardware-specific values. 13 */ 14 15 #ifndef _SPU_H 16 #define _SPU_H 17 18 #include <linux/types.h> 19 #include <linux/scatterlist.h> 20 #include <crypto/sha.h> 21 22 enum spu_cipher_alg { 23 CIPHER_ALG_NONE = 0x0, 24 CIPHER_ALG_RC4 = 0x1, 25 CIPHER_ALG_DES = 0x2, 26 CIPHER_ALG_3DES = 0x3, 27 CIPHER_ALG_AES = 0x4, 28 CIPHER_ALG_LAST = 0x5 29 }; 30 31 enum spu_cipher_mode { 32 CIPHER_MODE_NONE = 0x0, 33 CIPHER_MODE_ECB = 0x0, 34 CIPHER_MODE_CBC = 0x1, 35 CIPHER_MODE_OFB = 0x2, 36 CIPHER_MODE_CFB = 0x3, 37 CIPHER_MODE_CTR = 0x4, 38 CIPHER_MODE_CCM = 0x5, 39 CIPHER_MODE_GCM = 0x6, 40 CIPHER_MODE_XTS = 0x7, 41 CIPHER_MODE_LAST = 0x8 42 }; 43 44 enum spu_cipher_type { 45 CIPHER_TYPE_NONE = 0x0, 46 CIPHER_TYPE_DES = 0x0, 47 CIPHER_TYPE_3DES = 0x0, 48 CIPHER_TYPE_INIT = 0x0, /* used for ARC4 */ 49 CIPHER_TYPE_AES128 = 0x0, 50 CIPHER_TYPE_AES192 = 0x1, 51 CIPHER_TYPE_UPDT = 0x1, /* used for ARC4 */ 52 CIPHER_TYPE_AES256 = 0x2, 53 }; 54 55 enum hash_alg { 56 HASH_ALG_NONE = 0x0, 57 HASH_ALG_MD5 = 0x1, 58 HASH_ALG_SHA1 = 0x2, 59 HASH_ALG_SHA224 = 0x3, 60 HASH_ALG_SHA256 = 0x4, 61 HASH_ALG_AES = 0x5, 62 HASH_ALG_SHA384 = 0x6, 63 HASH_ALG_SHA512 = 0x7, 64 /* Keep SHA3 algorithms at the end always */ 65 HASH_ALG_SHA3_224 = 0x8, 66 HASH_ALG_SHA3_256 = 0x9, 67 HASH_ALG_SHA3_384 = 0xa, 68 HASH_ALG_SHA3_512 = 0xb, 69 HASH_ALG_LAST 70 }; 71 72 enum hash_mode { 73 HASH_MODE_NONE = 0x0, 74 HASH_MODE_HASH = 0x0, 75 HASH_MODE_XCBC = 0x0, 76 HASH_MODE_CMAC = 0x1, 77 HASH_MODE_CTXT = 0x1, 78 HASH_MODE_HMAC = 0x2, 79 HASH_MODE_RABIN = 0x4, 80 HASH_MODE_FHMAC = 0x6, 81 HASH_MODE_CCM = 0x5, 82 HASH_MODE_GCM = 0x6, 83 }; 84 85 enum hash_type { 86 HASH_TYPE_NONE = 0x0, 87 HASH_TYPE_FULL = 0x0, 88 HASH_TYPE_INIT = 0x1, 89 HASH_TYPE_UPDT = 0x2, 90 HASH_TYPE_FIN = 0x3, 91 HASH_TYPE_AES128 = 0x0, 92 HASH_TYPE_AES192 = 0x1, 93 HASH_TYPE_AES256 = 0x2 94 }; 95 96 enum aead_type { 97 AES_CCM, 98 AES_GCM, 99 AUTHENC, 100 AEAD_TYPE_LAST 101 }; 102 103 extern char *hash_alg_name[HASH_ALG_LAST]; 104 extern char *aead_alg_name[AEAD_TYPE_LAST]; 105 106 struct spu_request_opts { 107 bool is_inbound; 108 bool auth_first; 109 bool is_aead; 110 bool is_esp; 111 bool bd_suppress; 112 bool is_rfc4543; 113 }; 114 115 struct spu_cipher_parms { 116 enum spu_cipher_alg alg; 117 enum spu_cipher_mode mode; 118 enum spu_cipher_type type; 119 u8 *key_buf; 120 u16 key_len; 121 /* iv_buf and iv_len include salt, if applicable */ 122 u8 *iv_buf; 123 u16 iv_len; 124 }; 125 126 struct spu_hash_parms { 127 enum hash_alg alg; 128 enum hash_mode mode; 129 enum hash_type type; 130 u8 digestsize; 131 u8 *key_buf; 132 u16 key_len; 133 u16 prebuf_len; 134 /* length of hash pad. signed, needs to handle roll-overs */ 135 int pad_len; 136 }; 137 138 struct spu_aead_parms { 139 u32 assoc_size; 140 u16 iv_len; /* length of IV field between assoc data and data */ 141 u8 aad_pad_len; /* For AES GCM/CCM, length of padding after AAD */ 142 u8 data_pad_len;/* For AES GCM/CCM, length of padding after data */ 143 bool return_iv; /* True if SPU should return an IV */ 144 u32 ret_iv_len; /* Length in bytes of returned IV */ 145 u32 ret_iv_off; /* Offset into full IV if partial IV returned */ 146 }; 147 148 /************** SPU sizes ***************/ 149 150 #define SPU_RX_STATUS_LEN 4 151 152 /* Max length of padding for 4-byte alignment of STATUS field */ 153 #define SPU_STAT_PAD_MAX 4 154 155 /* Max length of pad fragment. 4 is for 4-byte alignment of STATUS field */ 156 #define SPU_PAD_LEN_MAX (SPU_GCM_CCM_ALIGN + MAX_HASH_BLOCK_SIZE + \ 157 SPU_STAT_PAD_MAX) 158 159 /* GCM and CCM require 16-byte alignment */ 160 #define SPU_GCM_CCM_ALIGN 16 161 162 /* Length up SUPDT field in SPU response message for RC4 */ 163 #define SPU_SUPDT_LEN 260 164 165 /* SPU status error codes. These used as common error codes across all 166 * SPU variants. 167 */ 168 #define SPU_INVALID_ICV 1 169 170 /* Indicates no limit to the length of the payload in a SPU message */ 171 #define SPU_MAX_PAYLOAD_INF 0xFFFFFFFF 172 173 /* Size of XTS tweak ("i" parameter), in bytes */ 174 #define SPU_XTS_TWEAK_SIZE 16 175 176 /* CCM B_0 field definitions, common for SPU-M and SPU2 */ 177 #define CCM_B0_ADATA 0x40 178 #define CCM_B0_ADATA_SHIFT 6 179 #define CCM_B0_M_PRIME 0x38 180 #define CCM_B0_M_PRIME_SHIFT 3 181 #define CCM_B0_L_PRIME 0x07 182 #define CCM_B0_L_PRIME_SHIFT 0 183 #define CCM_ESP_L_VALUE 4 184 185 /** 186 * spu_req_incl_icv() - Return true if SPU request message should include the 187 * ICV as a separate buffer. 188 * @cipher_mode: the cipher mode being requested 189 * @is_encrypt: true if encrypting. false if decrypting. 190 * 191 * Return: true if ICV to be included as separate buffer 192 */ 193 static __always_inline bool spu_req_incl_icv(enum spu_cipher_mode cipher_mode, 194 bool is_encrypt) 195 { 196 if ((cipher_mode == CIPHER_MODE_GCM) && !is_encrypt) 197 return true; 198 if ((cipher_mode == CIPHER_MODE_CCM) && !is_encrypt) 199 return true; 200 201 return false; 202 } 203 204 static __always_inline u32 spu_real_db_size(u32 assoc_size, 205 u32 aead_iv_buf_len, 206 u32 prebuf_len, 207 u32 data_size, 208 u32 aad_pad_len, 209 u32 gcm_pad_len, 210 u32 hash_pad_len) 211 { 212 return assoc_size + aead_iv_buf_len + prebuf_len + data_size + 213 aad_pad_len + gcm_pad_len + hash_pad_len; 214 } 215 216 /************** SPU Functions Prototypes **************/ 217 218 void spum_dump_msg_hdr(u8 *buf, unsigned int buf_len); 219 220 u32 spum_ns2_ctx_max_payload(enum spu_cipher_alg cipher_alg, 221 enum spu_cipher_mode cipher_mode, 222 unsigned int blocksize); 223 u32 spum_nsp_ctx_max_payload(enum spu_cipher_alg cipher_alg, 224 enum spu_cipher_mode cipher_mode, 225 unsigned int blocksize); 226 u32 spum_payload_length(u8 *spu_hdr); 227 u16 spum_response_hdr_len(u16 auth_key_len, u16 enc_key_len, bool is_hash); 228 u16 spum_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode, 229 u32 chunksize, u16 hash_block_size); 230 u32 spum_gcm_ccm_pad_len(enum spu_cipher_mode cipher_mode, 231 unsigned int data_size); 232 u32 spum_assoc_resp_len(enum spu_cipher_mode cipher_mode, 233 unsigned int assoc_len, unsigned int iv_len, 234 bool is_encrypt); 235 u8 spum_aead_ivlen(enum spu_cipher_mode cipher_mode, u16 iv_len); 236 bool spu_req_incl_icv(enum spu_cipher_mode cipher_mode, bool is_encrypt); 237 enum hash_type spum_hash_type(u32 src_sent); 238 u32 spum_digest_size(u32 alg_digest_size, enum hash_alg alg, 239 enum hash_type htype); 240 241 u32 spum_create_request(u8 *spu_hdr, 242 struct spu_request_opts *req_opts, 243 struct spu_cipher_parms *cipher_parms, 244 struct spu_hash_parms *hash_parms, 245 struct spu_aead_parms *aead_parms, 246 unsigned int data_size); 247 248 u16 spum_cipher_req_init(u8 *spu_hdr, struct spu_cipher_parms *cipher_parms); 249 250 void spum_cipher_req_finish(u8 *spu_hdr, 251 u16 spu_req_hdr_len, 252 unsigned int is_inbound, 253 struct spu_cipher_parms *cipher_parms, 254 unsigned int data_size); 255 256 void spum_request_pad(u8 *pad_start, 257 u32 gcm_padding, 258 u32 hash_pad_len, 259 enum hash_alg auth_alg, 260 enum hash_mode auth_mode, 261 unsigned int total_sent, u32 status_padding); 262 263 u8 spum_xts_tweak_in_payload(void); 264 u8 spum_tx_status_len(void); 265 u8 spum_rx_status_len(void); 266 int spum_status_process(u8 *statp); 267 268 void spum_ccm_update_iv(unsigned int digestsize, 269 struct spu_cipher_parms *cipher_parms, 270 unsigned int assoclen, 271 unsigned int chunksize, 272 bool is_encrypt, 273 bool is_esp); 274 u32 spum_wordalign_padlen(u32 data_size); 275 #endif 276