1 /* 2 * Copyright 2016 Broadcom 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License, version 2, as 6 * published by the Free Software Foundation (the "GPL"). 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License version 2 (GPLv2) for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * version 2 (GPLv2) along with this source code. 15 */ 16 17 #include <linux/err.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/errno.h> 21 #include <linux/kernel.h> 22 #include <linux/interrupt.h> 23 #include <linux/platform_device.h> 24 #include <linux/scatterlist.h> 25 #include <linux/crypto.h> 26 #include <linux/kthread.h> 27 #include <linux/rtnetlink.h> 28 #include <linux/sched.h> 29 #include <linux/of_address.h> 30 #include <linux/of_device.h> 31 #include <linux/io.h> 32 #include <linux/bitops.h> 33 34 #include <crypto/algapi.h> 35 #include <crypto/aead.h> 36 #include <crypto/internal/aead.h> 37 #include <crypto/aes.h> 38 #include <crypto/des.h> 39 #include <crypto/hmac.h> 40 #include <crypto/sha.h> 41 #include <crypto/md5.h> 42 #include <crypto/authenc.h> 43 #include <crypto/skcipher.h> 44 #include <crypto/hash.h> 45 #include <crypto/sha3.h> 46 47 #include "util.h" 48 #include "cipher.h" 49 #include "spu.h" 50 #include "spum.h" 51 #include "spu2.h" 52 53 /* ================= Device Structure ================== */ 54 55 struct device_private iproc_priv; 56 57 /* ==================== Parameters ===================== */ 58 59 int flow_debug_logging; 60 module_param(flow_debug_logging, int, 0644); 61 MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging"); 62 63 int packet_debug_logging; 64 module_param(packet_debug_logging, int, 0644); 65 MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging"); 66 67 int debug_logging_sleep; 68 module_param(debug_logging_sleep, int, 0644); 69 MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep"); 70 71 /* 72 * The value of these module parameters is used to set the priority for each 73 * algo type when this driver registers algos with the kernel crypto API. 74 * To use a priority other than the default, set the priority in the insmod or 75 * modprobe. Changing the module priority after init time has no effect. 76 * 77 * The default priorities are chosen to be lower (less preferred) than ARMv8 CE 78 * algos, but more preferred than generic software algos. 79 */ 80 static int cipher_pri = 150; 81 module_param(cipher_pri, int, 0644); 82 MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos"); 83 84 static int hash_pri = 100; 85 module_param(hash_pri, int, 0644); 86 MODULE_PARM_DESC(hash_pri, "Priority for hash algos"); 87 88 static int aead_pri = 150; 89 module_param(aead_pri, int, 0644); 90 MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos"); 91 92 /* A type 3 BCM header, expected to precede the SPU header for SPU-M. 93 * Bits 3 and 4 in the first byte encode the channel number (the dma ringset). 94 * 0x60 - ring 0 95 * 0x68 - ring 1 96 * 0x70 - ring 2 97 * 0x78 - ring 3 98 */ 99 char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 }; 100 /* 101 * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN 102 * is set dynamically after reading SPU type from device tree. 103 */ 104 #define BCM_HDR_LEN iproc_priv.bcm_hdr_len 105 106 /* min and max time to sleep before retrying when mbox queue is full. usec */ 107 #define MBOX_SLEEP_MIN 800 108 #define MBOX_SLEEP_MAX 1000 109 110 /** 111 * select_channel() - Select a SPU channel to handle a crypto request. Selects 112 * channel in round robin order. 113 * 114 * Return: channel index 115 */ 116 static u8 select_channel(void) 117 { 118 u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan); 119 120 return chan_idx % iproc_priv.spu.num_chan; 121 } 122 123 /** 124 * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to 125 * receive a SPU response message for an ablkcipher request. Includes buffers to 126 * catch SPU message headers and the response data. 127 * @mssg: mailbox message containing the receive sg 128 * @rctx: crypto request context 129 * @rx_frag_num: number of scatterlist elements required to hold the 130 * SPU response message 131 * @chunksize: Number of bytes of response data expected 132 * @stat_pad_len: Number of bytes required to pad the STAT field to 133 * a 4-byte boundary 134 * 135 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 136 * when the request completes, whether the request is handled successfully or 137 * there is an error. 138 * 139 * Returns: 140 * 0 if successful 141 * < 0 if an error 142 */ 143 static int 144 spu_ablkcipher_rx_sg_create(struct brcm_message *mssg, 145 struct iproc_reqctx_s *rctx, 146 u8 rx_frag_num, 147 unsigned int chunksize, u32 stat_pad_len) 148 { 149 struct spu_hw *spu = &iproc_priv.spu; 150 struct scatterlist *sg; /* used to build sgs in mbox message */ 151 struct iproc_ctx_s *ctx = rctx->ctx; 152 u32 datalen; /* Number of bytes of response data expected */ 153 154 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist), 155 rctx->gfp); 156 if (!mssg->spu.dst) 157 return -ENOMEM; 158 159 sg = mssg->spu.dst; 160 sg_init_table(sg, rx_frag_num); 161 /* Space for SPU message header */ 162 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len); 163 164 /* If XTS tweak in payload, add buffer to receive encrypted tweak */ 165 if ((ctx->cipher.mode == CIPHER_MODE_XTS) && 166 spu->spu_xts_tweak_in_payload()) 167 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, 168 SPU_XTS_TWEAK_SIZE); 169 170 /* Copy in each dst sg entry from request, up to chunksize */ 171 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip, 172 rctx->dst_nents, chunksize); 173 if (datalen < chunksize) { 174 pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u", 175 __func__, chunksize, datalen); 176 return -EFAULT; 177 } 178 179 if (ctx->cipher.alg == CIPHER_ALG_RC4) 180 /* Add buffer to catch 260-byte SUPDT field for RC4 */ 181 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN); 182 183 if (stat_pad_len) 184 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len); 185 186 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN); 187 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len()); 188 189 return 0; 190 } 191 192 /** 193 * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to 194 * send a SPU request message for an ablkcipher request. Includes SPU message 195 * headers and the request data. 196 * @mssg: mailbox message containing the transmit sg 197 * @rctx: crypto request context 198 * @tx_frag_num: number of scatterlist elements required to construct the 199 * SPU request message 200 * @chunksize: Number of bytes of request data 201 * @pad_len: Number of pad bytes 202 * 203 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 204 * when the request completes, whether the request is handled successfully or 205 * there is an error. 206 * 207 * Returns: 208 * 0 if successful 209 * < 0 if an error 210 */ 211 static int 212 spu_ablkcipher_tx_sg_create(struct brcm_message *mssg, 213 struct iproc_reqctx_s *rctx, 214 u8 tx_frag_num, unsigned int chunksize, u32 pad_len) 215 { 216 struct spu_hw *spu = &iproc_priv.spu; 217 struct scatterlist *sg; /* used to build sgs in mbox message */ 218 struct iproc_ctx_s *ctx = rctx->ctx; 219 u32 datalen; /* Number of bytes of response data expected */ 220 u32 stat_len; 221 222 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist), 223 rctx->gfp); 224 if (unlikely(!mssg->spu.src)) 225 return -ENOMEM; 226 227 sg = mssg->spu.src; 228 sg_init_table(sg, tx_frag_num); 229 230 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr, 231 BCM_HDR_LEN + ctx->spu_req_hdr_len); 232 233 /* if XTS tweak in payload, copy from IV (where crypto API puts it) */ 234 if ((ctx->cipher.mode == CIPHER_MODE_XTS) && 235 spu->spu_xts_tweak_in_payload()) 236 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE); 237 238 /* Copy in each src sg entry from request, up to chunksize */ 239 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip, 240 rctx->src_nents, chunksize); 241 if (unlikely(datalen < chunksize)) { 242 pr_err("%s(): failed to copy src sg to mbox msg", 243 __func__); 244 return -EFAULT; 245 } 246 247 if (pad_len) 248 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len); 249 250 stat_len = spu->spu_tx_status_len(); 251 if (stat_len) { 252 memset(rctx->msg_buf.tx_stat, 0, stat_len); 253 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len); 254 } 255 return 0; 256 } 257 258 static int mailbox_send_message(struct brcm_message *mssg, u32 flags, 259 u8 chan_idx) 260 { 261 int err; 262 int retry_cnt = 0; 263 struct device *dev = &(iproc_priv.pdev->dev); 264 265 err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg); 266 if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) { 267 while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) { 268 /* 269 * Mailbox queue is full. Since MAY_SLEEP is set, assume 270 * not in atomic context and we can wait and try again. 271 */ 272 retry_cnt++; 273 usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX); 274 err = mbox_send_message(iproc_priv.mbox[chan_idx], 275 mssg); 276 atomic_inc(&iproc_priv.mb_no_spc); 277 } 278 } 279 if (err < 0) { 280 atomic_inc(&iproc_priv.mb_send_fail); 281 return err; 282 } 283 284 /* Check error returned by mailbox controller */ 285 err = mssg->error; 286 if (unlikely(err < 0)) { 287 dev_err(dev, "message error %d", err); 288 /* Signal txdone for mailbox channel */ 289 } 290 291 /* Signal txdone for mailbox channel */ 292 mbox_client_txdone(iproc_priv.mbox[chan_idx], err); 293 return err; 294 } 295 296 /** 297 * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in 298 * a single SPU request message, starting at the current position in the request 299 * data. 300 * @rctx: Crypto request context 301 * 302 * This may be called on the crypto API thread, or, when a request is so large 303 * it must be broken into multiple SPU messages, on the thread used to invoke 304 * the response callback. When requests are broken into multiple SPU 305 * messages, we assume subsequent messages depend on previous results, and 306 * thus always wait for previous results before submitting the next message. 307 * Because requests are submitted in lock step like this, there is no need 308 * to synchronize access to request data structures. 309 * 310 * Return: -EINPROGRESS: request has been accepted and result will be returned 311 * asynchronously 312 * Any other value indicates an error 313 */ 314 static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx) 315 { 316 struct spu_hw *spu = &iproc_priv.spu; 317 struct crypto_async_request *areq = rctx->parent; 318 struct ablkcipher_request *req = 319 container_of(areq, struct ablkcipher_request, base); 320 struct iproc_ctx_s *ctx = rctx->ctx; 321 struct spu_cipher_parms cipher_parms; 322 int err = 0; 323 unsigned int chunksize = 0; /* Num bytes of request to submit */ 324 int remaining = 0; /* Bytes of request still to process */ 325 int chunk_start; /* Beginning of data for current SPU msg */ 326 327 /* IV or ctr value to use in this SPU msg */ 328 u8 local_iv_ctr[MAX_IV_SIZE]; 329 u32 stat_pad_len; /* num bytes to align status field */ 330 u32 pad_len; /* total length of all padding */ 331 bool update_key = false; 332 struct brcm_message *mssg; /* mailbox message */ 333 334 /* number of entries in src and dst sg in mailbox message. */ 335 u8 rx_frag_num = 2; /* response header and STATUS */ 336 u8 tx_frag_num = 1; /* request header */ 337 338 flow_log("%s\n", __func__); 339 340 cipher_parms.alg = ctx->cipher.alg; 341 cipher_parms.mode = ctx->cipher.mode; 342 cipher_parms.type = ctx->cipher_type; 343 cipher_parms.key_len = ctx->enckeylen; 344 cipher_parms.key_buf = ctx->enckey; 345 cipher_parms.iv_buf = local_iv_ctr; 346 cipher_parms.iv_len = rctx->iv_ctr_len; 347 348 mssg = &rctx->mb_mssg; 349 chunk_start = rctx->src_sent; 350 remaining = rctx->total_todo - chunk_start; 351 352 /* determine the chunk we are breaking off and update the indexes */ 353 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) && 354 (remaining > ctx->max_payload)) 355 chunksize = ctx->max_payload; 356 else 357 chunksize = remaining; 358 359 rctx->src_sent += chunksize; 360 rctx->total_sent = rctx->src_sent; 361 362 /* Count number of sg entries to be included in this request */ 363 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize); 364 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize); 365 366 if ((ctx->cipher.mode == CIPHER_MODE_CBC) && 367 rctx->is_encrypt && chunk_start) 368 /* 369 * Encrypting non-first first chunk. Copy last block of 370 * previous result to IV for this chunk. 371 */ 372 sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr, 373 rctx->iv_ctr_len, 374 chunk_start - rctx->iv_ctr_len); 375 376 if (rctx->iv_ctr_len) { 377 /* get our local copy of the iv */ 378 __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr, 379 rctx->iv_ctr_len); 380 381 /* generate the next IV if possible */ 382 if ((ctx->cipher.mode == CIPHER_MODE_CBC) && 383 !rctx->is_encrypt) { 384 /* 385 * CBC Decrypt: next IV is the last ciphertext block in 386 * this chunk 387 */ 388 sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr, 389 rctx->iv_ctr_len, 390 rctx->src_sent - rctx->iv_ctr_len); 391 } else if (ctx->cipher.mode == CIPHER_MODE_CTR) { 392 /* 393 * The SPU hardware increments the counter once for 394 * each AES block of 16 bytes. So update the counter 395 * for the next chunk, if there is one. Note that for 396 * this chunk, the counter has already been copied to 397 * local_iv_ctr. We can assume a block size of 16, 398 * because we only support CTR mode for AES, not for 399 * any other cipher alg. 400 */ 401 add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4); 402 } 403 } 404 405 if (ctx->cipher.alg == CIPHER_ALG_RC4) { 406 rx_frag_num++; 407 if (chunk_start) { 408 /* 409 * for non-first RC4 chunks, use SUPDT from previous 410 * response as key for this chunk. 411 */ 412 cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak; 413 update_key = true; 414 cipher_parms.type = CIPHER_TYPE_UPDT; 415 } else if (!rctx->is_encrypt) { 416 /* 417 * First RC4 chunk. For decrypt, key in pre-built msg 418 * header may have been changed if encrypt required 419 * multiple chunks. So revert the key to the 420 * ctx->enckey value. 421 */ 422 update_key = true; 423 cipher_parms.type = CIPHER_TYPE_INIT; 424 } 425 } 426 427 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF) 428 flow_log("max_payload infinite\n"); 429 else 430 flow_log("max_payload %u\n", ctx->max_payload); 431 432 flow_log("sent:%u start:%u remains:%u size:%u\n", 433 rctx->src_sent, chunk_start, remaining, chunksize); 434 435 /* Copy SPU header template created at setkey time */ 436 memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr, 437 sizeof(rctx->msg_buf.bcm_spu_req_hdr)); 438 439 /* 440 * Pass SUPDT field as key. Key field in finish() call is only used 441 * when update_key has been set above for RC4. Will be ignored in 442 * all other cases. 443 */ 444 spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN, 445 ctx->spu_req_hdr_len, !(rctx->is_encrypt), 446 &cipher_parms, update_key, chunksize); 447 448 atomic64_add(chunksize, &iproc_priv.bytes_out); 449 450 stat_pad_len = spu->spu_wordalign_padlen(chunksize); 451 if (stat_pad_len) 452 rx_frag_num++; 453 pad_len = stat_pad_len; 454 if (pad_len) { 455 tx_frag_num++; 456 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0, 457 0, ctx->auth.alg, ctx->auth.mode, 458 rctx->total_sent, stat_pad_len); 459 } 460 461 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN, 462 ctx->spu_req_hdr_len); 463 packet_log("payload:\n"); 464 dump_sg(rctx->src_sg, rctx->src_skip, chunksize); 465 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len); 466 467 /* 468 * Build mailbox message containing SPU request msg and rx buffers 469 * to catch response message 470 */ 471 memset(mssg, 0, sizeof(*mssg)); 472 mssg->type = BRCM_MESSAGE_SPU; 473 mssg->ctx = rctx; /* Will be returned in response */ 474 475 /* Create rx scatterlist to catch result */ 476 rx_frag_num += rctx->dst_nents; 477 478 if ((ctx->cipher.mode == CIPHER_MODE_XTS) && 479 spu->spu_xts_tweak_in_payload()) 480 rx_frag_num++; /* extra sg to insert tweak */ 481 482 err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize, 483 stat_pad_len); 484 if (err) 485 return err; 486 487 /* Create tx scatterlist containing SPU request message */ 488 tx_frag_num += rctx->src_nents; 489 if (spu->spu_tx_status_len()) 490 tx_frag_num++; 491 492 if ((ctx->cipher.mode == CIPHER_MODE_XTS) && 493 spu->spu_xts_tweak_in_payload()) 494 tx_frag_num++; /* extra sg to insert tweak */ 495 496 err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize, 497 pad_len); 498 if (err) 499 return err; 500 501 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx); 502 if (unlikely(err < 0)) 503 return err; 504 505 return -EINPROGRESS; 506 } 507 508 /** 509 * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the 510 * total received count for the request and updates global stats. 511 * @rctx: Crypto request context 512 */ 513 static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx) 514 { 515 struct spu_hw *spu = &iproc_priv.spu; 516 #ifdef DEBUG 517 struct crypto_async_request *areq = rctx->parent; 518 struct ablkcipher_request *req = ablkcipher_request_cast(areq); 519 #endif 520 struct iproc_ctx_s *ctx = rctx->ctx; 521 u32 payload_len; 522 523 /* See how much data was returned */ 524 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr); 525 526 /* 527 * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the 528 * encrypted tweak ("i") value; we don't count those. 529 */ 530 if ((ctx->cipher.mode == CIPHER_MODE_XTS) && 531 spu->spu_xts_tweak_in_payload() && 532 (payload_len >= SPU_XTS_TWEAK_SIZE)) 533 payload_len -= SPU_XTS_TWEAK_SIZE; 534 535 atomic64_add(payload_len, &iproc_priv.bytes_in); 536 537 flow_log("%s() offset: %u, bd_len: %u BD:\n", 538 __func__, rctx->total_received, payload_len); 539 540 dump_sg(req->dst, rctx->total_received, payload_len); 541 if (ctx->cipher.alg == CIPHER_ALG_RC4) 542 packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak, 543 SPU_SUPDT_LEN); 544 545 rctx->total_received += payload_len; 546 if (rctx->total_received == rctx->total_todo) { 547 atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]); 548 atomic_inc( 549 &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]); 550 } 551 } 552 553 /** 554 * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to 555 * receive a SPU response message for an ahash request. 556 * @mssg: mailbox message containing the receive sg 557 * @rctx: crypto request context 558 * @rx_frag_num: number of scatterlist elements required to hold the 559 * SPU response message 560 * @digestsize: length of hash digest, in bytes 561 * @stat_pad_len: Number of bytes required to pad the STAT field to 562 * a 4-byte boundary 563 * 564 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 565 * when the request completes, whether the request is handled successfully or 566 * there is an error. 567 * 568 * Return: 569 * 0 if successful 570 * < 0 if an error 571 */ 572 static int 573 spu_ahash_rx_sg_create(struct brcm_message *mssg, 574 struct iproc_reqctx_s *rctx, 575 u8 rx_frag_num, unsigned int digestsize, 576 u32 stat_pad_len) 577 { 578 struct spu_hw *spu = &iproc_priv.spu; 579 struct scatterlist *sg; /* used to build sgs in mbox message */ 580 struct iproc_ctx_s *ctx = rctx->ctx; 581 582 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist), 583 rctx->gfp); 584 if (!mssg->spu.dst) 585 return -ENOMEM; 586 587 sg = mssg->spu.dst; 588 sg_init_table(sg, rx_frag_num); 589 /* Space for SPU message header */ 590 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len); 591 592 /* Space for digest */ 593 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize); 594 595 if (stat_pad_len) 596 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len); 597 598 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN); 599 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len()); 600 return 0; 601 } 602 603 /** 604 * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send 605 * a SPU request message for an ahash request. Includes SPU message headers and 606 * the request data. 607 * @mssg: mailbox message containing the transmit sg 608 * @rctx: crypto request context 609 * @tx_frag_num: number of scatterlist elements required to construct the 610 * SPU request message 611 * @spu_hdr_len: length in bytes of SPU message header 612 * @hash_carry_len: Number of bytes of data carried over from previous req 613 * @new_data_len: Number of bytes of new request data 614 * @pad_len: Number of pad bytes 615 * 616 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 617 * when the request completes, whether the request is handled successfully or 618 * there is an error. 619 * 620 * Return: 621 * 0 if successful 622 * < 0 if an error 623 */ 624 static int 625 spu_ahash_tx_sg_create(struct brcm_message *mssg, 626 struct iproc_reqctx_s *rctx, 627 u8 tx_frag_num, 628 u32 spu_hdr_len, 629 unsigned int hash_carry_len, 630 unsigned int new_data_len, u32 pad_len) 631 { 632 struct spu_hw *spu = &iproc_priv.spu; 633 struct scatterlist *sg; /* used to build sgs in mbox message */ 634 u32 datalen; /* Number of bytes of response data expected */ 635 u32 stat_len; 636 637 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist), 638 rctx->gfp); 639 if (!mssg->spu.src) 640 return -ENOMEM; 641 642 sg = mssg->spu.src; 643 sg_init_table(sg, tx_frag_num); 644 645 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr, 646 BCM_HDR_LEN + spu_hdr_len); 647 648 if (hash_carry_len) 649 sg_set_buf(sg++, rctx->hash_carry, hash_carry_len); 650 651 if (new_data_len) { 652 /* Copy in each src sg entry from request, up to chunksize */ 653 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip, 654 rctx->src_nents, new_data_len); 655 if (datalen < new_data_len) { 656 pr_err("%s(): failed to copy src sg to mbox msg", 657 __func__); 658 return -EFAULT; 659 } 660 } 661 662 if (pad_len) 663 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len); 664 665 stat_len = spu->spu_tx_status_len(); 666 if (stat_len) { 667 memset(rctx->msg_buf.tx_stat, 0, stat_len); 668 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len); 669 } 670 671 return 0; 672 } 673 674 /** 675 * handle_ahash_req() - Process an asynchronous hash request from the crypto 676 * API. 677 * @rctx: Crypto request context 678 * 679 * Builds a SPU request message embedded in a mailbox message and submits the 680 * mailbox message on a selected mailbox channel. The SPU request message is 681 * constructed as a scatterlist, including entries from the crypto API's 682 * src scatterlist to avoid copying the data to be hashed. This function is 683 * called either on the thread from the crypto API, or, in the case that the 684 * crypto API request is too large to fit in a single SPU request message, 685 * on the thread that invokes the receive callback with a response message. 686 * Because some operations require the response from one chunk before the next 687 * chunk can be submitted, we always wait for the response for the previous 688 * chunk before submitting the next chunk. Because requests are submitted in 689 * lock step like this, there is no need to synchronize access to request data 690 * structures. 691 * 692 * Return: 693 * -EINPROGRESS: request has been submitted to SPU and response will be 694 * returned asynchronously 695 * -EAGAIN: non-final request included a small amount of data, which for 696 * efficiency we did not submit to the SPU, but instead stored 697 * to be submitted to the SPU with the next part of the request 698 * other: an error code 699 */ 700 static int handle_ahash_req(struct iproc_reqctx_s *rctx) 701 { 702 struct spu_hw *spu = &iproc_priv.spu; 703 struct crypto_async_request *areq = rctx->parent; 704 struct ahash_request *req = ahash_request_cast(areq); 705 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); 706 struct crypto_tfm *tfm = crypto_ahash_tfm(ahash); 707 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm); 708 struct iproc_ctx_s *ctx = rctx->ctx; 709 710 /* number of bytes still to be hashed in this req */ 711 unsigned int nbytes_to_hash = 0; 712 int err = 0; 713 unsigned int chunksize = 0; /* length of hash carry + new data */ 714 /* 715 * length of new data, not from hash carry, to be submitted in 716 * this hw request 717 */ 718 unsigned int new_data_len; 719 720 unsigned int __maybe_unused chunk_start = 0; 721 u32 db_size; /* Length of data field, incl gcm and hash padding */ 722 int pad_len = 0; /* total pad len, including gcm, hash, stat padding */ 723 u32 data_pad_len = 0; /* length of GCM/CCM padding */ 724 u32 stat_pad_len = 0; /* length of padding to align STATUS word */ 725 struct brcm_message *mssg; /* mailbox message */ 726 struct spu_request_opts req_opts; 727 struct spu_cipher_parms cipher_parms; 728 struct spu_hash_parms hash_parms; 729 struct spu_aead_parms aead_parms; 730 unsigned int local_nbuf; 731 u32 spu_hdr_len; 732 unsigned int digestsize; 733 u16 rem = 0; 734 735 /* 736 * number of entries in src and dst sg. Always includes SPU msg header. 737 * rx always includes a buffer to catch digest and STATUS. 738 */ 739 u8 rx_frag_num = 3; 740 u8 tx_frag_num = 1; 741 742 flow_log("total_todo %u, total_sent %u\n", 743 rctx->total_todo, rctx->total_sent); 744 745 memset(&req_opts, 0, sizeof(req_opts)); 746 memset(&cipher_parms, 0, sizeof(cipher_parms)); 747 memset(&hash_parms, 0, sizeof(hash_parms)); 748 memset(&aead_parms, 0, sizeof(aead_parms)); 749 750 req_opts.bd_suppress = true; 751 hash_parms.alg = ctx->auth.alg; 752 hash_parms.mode = ctx->auth.mode; 753 hash_parms.type = HASH_TYPE_NONE; 754 hash_parms.key_buf = (u8 *)ctx->authkey; 755 hash_parms.key_len = ctx->authkeylen; 756 757 /* 758 * For hash algorithms below assignment looks bit odd but 759 * it's needed for AES-XCBC and AES-CMAC hash algorithms 760 * to differentiate between 128, 192, 256 bit key values. 761 * Based on the key values, hash algorithm is selected. 762 * For example for 128 bit key, hash algorithm is AES-128. 763 */ 764 cipher_parms.type = ctx->cipher_type; 765 766 mssg = &rctx->mb_mssg; 767 chunk_start = rctx->src_sent; 768 769 /* 770 * Compute the amount remaining to hash. This may include data 771 * carried over from previous requests. 772 */ 773 nbytes_to_hash = rctx->total_todo - rctx->total_sent; 774 chunksize = nbytes_to_hash; 775 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) && 776 (chunksize > ctx->max_payload)) 777 chunksize = ctx->max_payload; 778 779 /* 780 * If this is not a final request and the request data is not a multiple 781 * of a full block, then simply park the extra data and prefix it to the 782 * data for the next request. 783 */ 784 if (!rctx->is_final) { 785 u8 *dest = rctx->hash_carry + rctx->hash_carry_len; 786 u16 new_len; /* len of data to add to hash carry */ 787 788 rem = chunksize % blocksize; /* remainder */ 789 if (rem) { 790 /* chunksize not a multiple of blocksize */ 791 chunksize -= rem; 792 if (chunksize == 0) { 793 /* Don't have a full block to submit to hw */ 794 new_len = rem - rctx->hash_carry_len; 795 sg_copy_part_to_buf(req->src, dest, new_len, 796 rctx->src_sent); 797 rctx->hash_carry_len = rem; 798 flow_log("Exiting with hash carry len: %u\n", 799 rctx->hash_carry_len); 800 packet_dump(" buf: ", 801 rctx->hash_carry, 802 rctx->hash_carry_len); 803 return -EAGAIN; 804 } 805 } 806 } 807 808 /* if we have hash carry, then prefix it to the data in this request */ 809 local_nbuf = rctx->hash_carry_len; 810 rctx->hash_carry_len = 0; 811 if (local_nbuf) 812 tx_frag_num++; 813 new_data_len = chunksize - local_nbuf; 814 815 /* Count number of sg entries to be used in this request */ 816 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, 817 new_data_len); 818 819 /* AES hashing keeps key size in type field, so need to copy it here */ 820 if (hash_parms.alg == HASH_ALG_AES) 821 hash_parms.type = (enum hash_type)cipher_parms.type; 822 else 823 hash_parms.type = spu->spu_hash_type(rctx->total_sent); 824 825 digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg, 826 hash_parms.type); 827 hash_parms.digestsize = digestsize; 828 829 /* update the indexes */ 830 rctx->total_sent += chunksize; 831 /* if you sent a prebuf then that wasn't from this req->src */ 832 rctx->src_sent += new_data_len; 833 834 if ((rctx->total_sent == rctx->total_todo) && rctx->is_final) 835 hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg, 836 hash_parms.mode, 837 chunksize, 838 blocksize); 839 840 /* 841 * If a non-first chunk, then include the digest returned from the 842 * previous chunk so that hw can add to it (except for AES types). 843 */ 844 if ((hash_parms.type == HASH_TYPE_UPDT) && 845 (hash_parms.alg != HASH_ALG_AES)) { 846 hash_parms.key_buf = rctx->incr_hash; 847 hash_parms.key_len = digestsize; 848 } 849 850 atomic64_add(chunksize, &iproc_priv.bytes_out); 851 852 flow_log("%s() final: %u nbuf: %u ", 853 __func__, rctx->is_final, local_nbuf); 854 855 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF) 856 flow_log("max_payload infinite\n"); 857 else 858 flow_log("max_payload %u\n", ctx->max_payload); 859 860 flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize); 861 862 /* Prepend SPU header with type 3 BCM header */ 863 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN); 864 865 hash_parms.prebuf_len = local_nbuf; 866 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr + 867 BCM_HDR_LEN, 868 &req_opts, &cipher_parms, 869 &hash_parms, &aead_parms, 870 new_data_len); 871 872 if (spu_hdr_len == 0) { 873 pr_err("Failed to create SPU request header\n"); 874 return -EFAULT; 875 } 876 877 /* 878 * Determine total length of padding required. Put all padding in one 879 * buffer. 880 */ 881 data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize); 882 db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len, 883 0, 0, hash_parms.pad_len); 884 if (spu->spu_tx_status_len()) 885 stat_pad_len = spu->spu_wordalign_padlen(db_size); 886 if (stat_pad_len) 887 rx_frag_num++; 888 pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len; 889 if (pad_len) { 890 tx_frag_num++; 891 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len, 892 hash_parms.pad_len, ctx->auth.alg, 893 ctx->auth.mode, rctx->total_sent, 894 stat_pad_len); 895 } 896 897 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN, 898 spu_hdr_len); 899 packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf); 900 flow_log("Data:\n"); 901 dump_sg(rctx->src_sg, rctx->src_skip, new_data_len); 902 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len); 903 904 /* 905 * Build mailbox message containing SPU request msg and rx buffers 906 * to catch response message 907 */ 908 memset(mssg, 0, sizeof(*mssg)); 909 mssg->type = BRCM_MESSAGE_SPU; 910 mssg->ctx = rctx; /* Will be returned in response */ 911 912 /* Create rx scatterlist to catch result */ 913 err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize, 914 stat_pad_len); 915 if (err) 916 return err; 917 918 /* Create tx scatterlist containing SPU request message */ 919 tx_frag_num += rctx->src_nents; 920 if (spu->spu_tx_status_len()) 921 tx_frag_num++; 922 err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len, 923 local_nbuf, new_data_len, pad_len); 924 if (err) 925 return err; 926 927 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx); 928 if (unlikely(err < 0)) 929 return err; 930 931 return -EINPROGRESS; 932 } 933 934 /** 935 * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash 936 * for an HMAC request. 937 * @req: The HMAC request from the crypto API 938 * @ctx: The session context 939 * 940 * Return: 0 if synchronous hash operation successful 941 * -EINVAL if the hash algo is unrecognized 942 * any other value indicates an error 943 */ 944 static int spu_hmac_outer_hash(struct ahash_request *req, 945 struct iproc_ctx_s *ctx) 946 { 947 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); 948 unsigned int blocksize = 949 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash)); 950 int rc; 951 952 switch (ctx->auth.alg) { 953 case HASH_ALG_MD5: 954 rc = do_shash("md5", req->result, ctx->opad, blocksize, 955 req->result, ctx->digestsize, NULL, 0); 956 break; 957 case HASH_ALG_SHA1: 958 rc = do_shash("sha1", req->result, ctx->opad, blocksize, 959 req->result, ctx->digestsize, NULL, 0); 960 break; 961 case HASH_ALG_SHA224: 962 rc = do_shash("sha224", req->result, ctx->opad, blocksize, 963 req->result, ctx->digestsize, NULL, 0); 964 break; 965 case HASH_ALG_SHA256: 966 rc = do_shash("sha256", req->result, ctx->opad, blocksize, 967 req->result, ctx->digestsize, NULL, 0); 968 break; 969 case HASH_ALG_SHA384: 970 rc = do_shash("sha384", req->result, ctx->opad, blocksize, 971 req->result, ctx->digestsize, NULL, 0); 972 break; 973 case HASH_ALG_SHA512: 974 rc = do_shash("sha512", req->result, ctx->opad, blocksize, 975 req->result, ctx->digestsize, NULL, 0); 976 break; 977 default: 978 pr_err("%s() Error : unknown hmac type\n", __func__); 979 rc = -EINVAL; 980 } 981 return rc; 982 } 983 984 /** 985 * ahash_req_done() - Process a hash result from the SPU hardware. 986 * @rctx: Crypto request context 987 * 988 * Return: 0 if successful 989 * < 0 if an error 990 */ 991 static int ahash_req_done(struct iproc_reqctx_s *rctx) 992 { 993 struct spu_hw *spu = &iproc_priv.spu; 994 struct crypto_async_request *areq = rctx->parent; 995 struct ahash_request *req = ahash_request_cast(areq); 996 struct iproc_ctx_s *ctx = rctx->ctx; 997 int err; 998 999 memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize); 1000 1001 if (spu->spu_type == SPU_TYPE_SPUM) { 1002 /* byte swap the output from the UPDT function to network byte 1003 * order 1004 */ 1005 if (ctx->auth.alg == HASH_ALG_MD5) { 1006 __swab32s((u32 *)req->result); 1007 __swab32s(((u32 *)req->result) + 1); 1008 __swab32s(((u32 *)req->result) + 2); 1009 __swab32s(((u32 *)req->result) + 3); 1010 __swab32s(((u32 *)req->result) + 4); 1011 } 1012 } 1013 1014 flow_dump(" digest ", req->result, ctx->digestsize); 1015 1016 /* if this an HMAC then do the outer hash */ 1017 if (rctx->is_sw_hmac) { 1018 err = spu_hmac_outer_hash(req, ctx); 1019 if (err < 0) 1020 return err; 1021 flow_dump(" hmac: ", req->result, ctx->digestsize); 1022 } 1023 1024 if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) { 1025 atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]); 1026 atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]); 1027 } else { 1028 atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]); 1029 atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]); 1030 } 1031 1032 return 0; 1033 } 1034 1035 /** 1036 * handle_ahash_resp() - Process a SPU response message for a hash request. 1037 * Checks if the entire crypto API request has been processed, and if so, 1038 * invokes post processing on the result. 1039 * @rctx: Crypto request context 1040 */ 1041 static void handle_ahash_resp(struct iproc_reqctx_s *rctx) 1042 { 1043 struct iproc_ctx_s *ctx = rctx->ctx; 1044 #ifdef DEBUG 1045 struct crypto_async_request *areq = rctx->parent; 1046 struct ahash_request *req = ahash_request_cast(areq); 1047 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); 1048 unsigned int blocksize = 1049 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash)); 1050 #endif 1051 /* 1052 * Save hash to use as input to next op if incremental. Might be copying 1053 * too much, but that's easier than figuring out actual digest size here 1054 */ 1055 memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE); 1056 1057 flow_log("%s() blocksize:%u digestsize:%u\n", 1058 __func__, blocksize, ctx->digestsize); 1059 1060 atomic64_add(ctx->digestsize, &iproc_priv.bytes_in); 1061 1062 if (rctx->is_final && (rctx->total_sent == rctx->total_todo)) 1063 ahash_req_done(rctx); 1064 } 1065 1066 /** 1067 * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive 1068 * a SPU response message for an AEAD request. Includes buffers to catch SPU 1069 * message headers and the response data. 1070 * @mssg: mailbox message containing the receive sg 1071 * @rctx: crypto request context 1072 * @rx_frag_num: number of scatterlist elements required to hold the 1073 * SPU response message 1074 * @assoc_len: Length of associated data included in the crypto request 1075 * @ret_iv_len: Length of IV returned in response 1076 * @resp_len: Number of bytes of response data expected to be written to 1077 * dst buffer from crypto API 1078 * @digestsize: Length of hash digest, in bytes 1079 * @stat_pad_len: Number of bytes required to pad the STAT field to 1080 * a 4-byte boundary 1081 * 1082 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 1083 * when the request completes, whether the request is handled successfully or 1084 * there is an error. 1085 * 1086 * Returns: 1087 * 0 if successful 1088 * < 0 if an error 1089 */ 1090 static int spu_aead_rx_sg_create(struct brcm_message *mssg, 1091 struct aead_request *req, 1092 struct iproc_reqctx_s *rctx, 1093 u8 rx_frag_num, 1094 unsigned int assoc_len, 1095 u32 ret_iv_len, unsigned int resp_len, 1096 unsigned int digestsize, u32 stat_pad_len) 1097 { 1098 struct spu_hw *spu = &iproc_priv.spu; 1099 struct scatterlist *sg; /* used to build sgs in mbox message */ 1100 struct iproc_ctx_s *ctx = rctx->ctx; 1101 u32 datalen; /* Number of bytes of response data expected */ 1102 u32 assoc_buf_len; 1103 u8 data_padlen = 0; 1104 1105 if (ctx->is_rfc4543) { 1106 /* RFC4543: only pad after data, not after AAD */ 1107 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, 1108 assoc_len + resp_len); 1109 assoc_buf_len = assoc_len; 1110 } else { 1111 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, 1112 resp_len); 1113 assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode, 1114 assoc_len, ret_iv_len, 1115 rctx->is_encrypt); 1116 } 1117 1118 if (ctx->cipher.mode == CIPHER_MODE_CCM) 1119 /* ICV (after data) must be in the next 32-bit word for CCM */ 1120 data_padlen += spu->spu_wordalign_padlen(assoc_buf_len + 1121 resp_len + 1122 data_padlen); 1123 1124 if (data_padlen) 1125 /* have to catch gcm pad in separate buffer */ 1126 rx_frag_num++; 1127 1128 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist), 1129 rctx->gfp); 1130 if (!mssg->spu.dst) 1131 return -ENOMEM; 1132 1133 sg = mssg->spu.dst; 1134 sg_init_table(sg, rx_frag_num); 1135 1136 /* Space for SPU message header */ 1137 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len); 1138 1139 if (assoc_buf_len) { 1140 /* 1141 * Don't write directly to req->dst, because SPU may pad the 1142 * assoc data in the response 1143 */ 1144 memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len); 1145 sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len); 1146 } 1147 1148 if (resp_len) { 1149 /* 1150 * Copy in each dst sg entry from request, up to chunksize. 1151 * dst sg catches just the data. digest caught in separate buf. 1152 */ 1153 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip, 1154 rctx->dst_nents, resp_len); 1155 if (datalen < (resp_len)) { 1156 pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u", 1157 __func__, resp_len, datalen); 1158 return -EFAULT; 1159 } 1160 } 1161 1162 /* If GCM/CCM data is padded, catch padding in separate buffer */ 1163 if (data_padlen) { 1164 memset(rctx->msg_buf.a.gcmpad, 0, data_padlen); 1165 sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen); 1166 } 1167 1168 /* Always catch ICV in separate buffer */ 1169 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize); 1170 1171 flow_log("stat_pad_len %u\n", stat_pad_len); 1172 if (stat_pad_len) { 1173 memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len); 1174 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len); 1175 } 1176 1177 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN); 1178 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len()); 1179 1180 return 0; 1181 } 1182 1183 /** 1184 * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a 1185 * SPU request message for an AEAD request. Includes SPU message headers and the 1186 * request data. 1187 * @mssg: mailbox message containing the transmit sg 1188 * @rctx: crypto request context 1189 * @tx_frag_num: number of scatterlist elements required to construct the 1190 * SPU request message 1191 * @spu_hdr_len: length of SPU message header in bytes 1192 * @assoc: crypto API associated data scatterlist 1193 * @assoc_len: length of associated data 1194 * @assoc_nents: number of scatterlist entries containing assoc data 1195 * @aead_iv_len: length of AEAD IV, if included 1196 * @chunksize: Number of bytes of request data 1197 * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM. 1198 * @pad_len: Number of pad bytes 1199 * @incl_icv: If true, write separate ICV buffer after data and 1200 * any padding 1201 * 1202 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup() 1203 * when the request completes, whether the request is handled successfully or 1204 * there is an error. 1205 * 1206 * Return: 1207 * 0 if successful 1208 * < 0 if an error 1209 */ 1210 static int spu_aead_tx_sg_create(struct brcm_message *mssg, 1211 struct iproc_reqctx_s *rctx, 1212 u8 tx_frag_num, 1213 u32 spu_hdr_len, 1214 struct scatterlist *assoc, 1215 unsigned int assoc_len, 1216 int assoc_nents, 1217 unsigned int aead_iv_len, 1218 unsigned int chunksize, 1219 u32 aad_pad_len, u32 pad_len, bool incl_icv) 1220 { 1221 struct spu_hw *spu = &iproc_priv.spu; 1222 struct scatterlist *sg; /* used to build sgs in mbox message */ 1223 struct scatterlist *assoc_sg = assoc; 1224 struct iproc_ctx_s *ctx = rctx->ctx; 1225 u32 datalen; /* Number of bytes of data to write */ 1226 u32 written; /* Number of bytes of data written */ 1227 u32 assoc_offset = 0; 1228 u32 stat_len; 1229 1230 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist), 1231 rctx->gfp); 1232 if (!mssg->spu.src) 1233 return -ENOMEM; 1234 1235 sg = mssg->spu.src; 1236 sg_init_table(sg, tx_frag_num); 1237 1238 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr, 1239 BCM_HDR_LEN + spu_hdr_len); 1240 1241 if (assoc_len) { 1242 /* Copy in each associated data sg entry from request */ 1243 written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset, 1244 assoc_nents, assoc_len); 1245 if (written < assoc_len) { 1246 pr_err("%s(): failed to copy assoc sg to mbox msg", 1247 __func__); 1248 return -EFAULT; 1249 } 1250 } 1251 1252 if (aead_iv_len) 1253 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len); 1254 1255 if (aad_pad_len) { 1256 memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len); 1257 sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len); 1258 } 1259 1260 datalen = chunksize; 1261 if ((chunksize > ctx->digestsize) && incl_icv) 1262 datalen -= ctx->digestsize; 1263 if (datalen) { 1264 /* For aead, a single msg should consume the entire src sg */ 1265 written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip, 1266 rctx->src_nents, datalen); 1267 if (written < datalen) { 1268 pr_err("%s(): failed to copy src sg to mbox msg", 1269 __func__); 1270 return -EFAULT; 1271 } 1272 } 1273 1274 if (pad_len) { 1275 memset(rctx->msg_buf.spu_req_pad, 0, pad_len); 1276 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len); 1277 } 1278 1279 if (incl_icv) 1280 sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize); 1281 1282 stat_len = spu->spu_tx_status_len(); 1283 if (stat_len) { 1284 memset(rctx->msg_buf.tx_stat, 0, stat_len); 1285 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len); 1286 } 1287 return 0; 1288 } 1289 1290 /** 1291 * handle_aead_req() - Submit a SPU request message for the next chunk of the 1292 * current AEAD request. 1293 * @rctx: Crypto request context 1294 * 1295 * Unlike other operation types, we assume the length of the request fits in 1296 * a single SPU request message. aead_enqueue() makes sure this is true. 1297 * Comments for other op types regarding threads applies here as well. 1298 * 1299 * Unlike incremental hash ops, where the spu returns the entire hash for 1300 * truncated algs like sha-224, the SPU returns just the truncated hash in 1301 * response to aead requests. So digestsize is always ctx->digestsize here. 1302 * 1303 * Return: -EINPROGRESS: crypto request has been accepted and result will be 1304 * returned asynchronously 1305 * Any other value indicates an error 1306 */ 1307 static int handle_aead_req(struct iproc_reqctx_s *rctx) 1308 { 1309 struct spu_hw *spu = &iproc_priv.spu; 1310 struct crypto_async_request *areq = rctx->parent; 1311 struct aead_request *req = container_of(areq, 1312 struct aead_request, base); 1313 struct iproc_ctx_s *ctx = rctx->ctx; 1314 int err; 1315 unsigned int chunksize; 1316 unsigned int resp_len; 1317 u32 spu_hdr_len; 1318 u32 db_size; 1319 u32 stat_pad_len; 1320 u32 pad_len; 1321 struct brcm_message *mssg; /* mailbox message */ 1322 struct spu_request_opts req_opts; 1323 struct spu_cipher_parms cipher_parms; 1324 struct spu_hash_parms hash_parms; 1325 struct spu_aead_parms aead_parms; 1326 int assoc_nents = 0; 1327 bool incl_icv = false; 1328 unsigned int digestsize = ctx->digestsize; 1329 1330 /* number of entries in src and dst sg. Always includes SPU msg header. 1331 */ 1332 u8 rx_frag_num = 2; /* and STATUS */ 1333 u8 tx_frag_num = 1; 1334 1335 /* doing the whole thing at once */ 1336 chunksize = rctx->total_todo; 1337 1338 flow_log("%s: chunksize %u\n", __func__, chunksize); 1339 1340 memset(&req_opts, 0, sizeof(req_opts)); 1341 memset(&hash_parms, 0, sizeof(hash_parms)); 1342 memset(&aead_parms, 0, sizeof(aead_parms)); 1343 1344 req_opts.is_inbound = !(rctx->is_encrypt); 1345 req_opts.auth_first = ctx->auth_first; 1346 req_opts.is_aead = true; 1347 req_opts.is_esp = ctx->is_esp; 1348 1349 cipher_parms.alg = ctx->cipher.alg; 1350 cipher_parms.mode = ctx->cipher.mode; 1351 cipher_parms.type = ctx->cipher_type; 1352 cipher_parms.key_buf = ctx->enckey; 1353 cipher_parms.key_len = ctx->enckeylen; 1354 cipher_parms.iv_buf = rctx->msg_buf.iv_ctr; 1355 cipher_parms.iv_len = rctx->iv_ctr_len; 1356 1357 hash_parms.alg = ctx->auth.alg; 1358 hash_parms.mode = ctx->auth.mode; 1359 hash_parms.type = HASH_TYPE_NONE; 1360 hash_parms.key_buf = (u8 *)ctx->authkey; 1361 hash_parms.key_len = ctx->authkeylen; 1362 hash_parms.digestsize = digestsize; 1363 1364 if ((ctx->auth.alg == HASH_ALG_SHA224) && 1365 (ctx->authkeylen < SHA224_DIGEST_SIZE)) 1366 hash_parms.key_len = SHA224_DIGEST_SIZE; 1367 1368 aead_parms.assoc_size = req->assoclen; 1369 if (ctx->is_esp && !ctx->is_rfc4543) { 1370 /* 1371 * 8-byte IV is included assoc data in request. SPU2 1372 * expects AAD to include just SPI and seqno. So 1373 * subtract off the IV len. 1374 */ 1375 aead_parms.assoc_size -= GCM_RFC4106_IV_SIZE; 1376 1377 if (rctx->is_encrypt) { 1378 aead_parms.return_iv = true; 1379 aead_parms.ret_iv_len = GCM_RFC4106_IV_SIZE; 1380 aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE; 1381 } 1382 } else { 1383 aead_parms.ret_iv_len = 0; 1384 } 1385 1386 /* 1387 * Count number of sg entries from the crypto API request that are to 1388 * be included in this mailbox message. For dst sg, don't count space 1389 * for digest. Digest gets caught in a separate buffer and copied back 1390 * to dst sg when processing response. 1391 */ 1392 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize); 1393 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize); 1394 if (aead_parms.assoc_size) 1395 assoc_nents = spu_sg_count(rctx->assoc, 0, 1396 aead_parms.assoc_size); 1397 1398 mssg = &rctx->mb_mssg; 1399 1400 rctx->total_sent = chunksize; 1401 rctx->src_sent = chunksize; 1402 if (spu->spu_assoc_resp_len(ctx->cipher.mode, 1403 aead_parms.assoc_size, 1404 aead_parms.ret_iv_len, 1405 rctx->is_encrypt)) 1406 rx_frag_num++; 1407 1408 aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode, 1409 rctx->iv_ctr_len); 1410 1411 if (ctx->auth.alg == HASH_ALG_AES) 1412 hash_parms.type = (enum hash_type)ctx->cipher_type; 1413 1414 /* General case AAD padding (CCM and RFC4543 special cases below) */ 1415 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, 1416 aead_parms.assoc_size); 1417 1418 /* General case data padding (CCM decrypt special case below) */ 1419 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, 1420 chunksize); 1421 1422 if (ctx->cipher.mode == CIPHER_MODE_CCM) { 1423 /* 1424 * for CCM, AAD len + 2 (rather than AAD len) needs to be 1425 * 128-bit aligned 1426 */ 1427 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len( 1428 ctx->cipher.mode, 1429 aead_parms.assoc_size + 2); 1430 1431 /* 1432 * And when decrypting CCM, need to pad without including 1433 * size of ICV which is tacked on to end of chunk 1434 */ 1435 if (!rctx->is_encrypt) 1436 aead_parms.data_pad_len = 1437 spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, 1438 chunksize - digestsize); 1439 1440 /* CCM also requires software to rewrite portions of IV: */ 1441 spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen, 1442 chunksize, rctx->is_encrypt, 1443 ctx->is_esp); 1444 } 1445 1446 if (ctx->is_rfc4543) { 1447 /* 1448 * RFC4543: data is included in AAD, so don't pad after AAD 1449 * and pad data based on both AAD + data size 1450 */ 1451 aead_parms.aad_pad_len = 0; 1452 if (!rctx->is_encrypt) 1453 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len( 1454 ctx->cipher.mode, 1455 aead_parms.assoc_size + chunksize - 1456 digestsize); 1457 else 1458 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len( 1459 ctx->cipher.mode, 1460 aead_parms.assoc_size + chunksize); 1461 1462 req_opts.is_rfc4543 = true; 1463 } 1464 1465 if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) { 1466 incl_icv = true; 1467 tx_frag_num++; 1468 /* Copy ICV from end of src scatterlist to digest buf */ 1469 sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize, 1470 req->assoclen + rctx->total_sent - 1471 digestsize); 1472 } 1473 1474 atomic64_add(chunksize, &iproc_priv.bytes_out); 1475 1476 flow_log("%s()-sent chunksize:%u\n", __func__, chunksize); 1477 1478 /* Prepend SPU header with type 3 BCM header */ 1479 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN); 1480 1481 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr + 1482 BCM_HDR_LEN, &req_opts, 1483 &cipher_parms, &hash_parms, 1484 &aead_parms, chunksize); 1485 1486 /* Determine total length of padding. Put all padding in one buffer. */ 1487 db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0, 1488 chunksize, aead_parms.aad_pad_len, 1489 aead_parms.data_pad_len, 0); 1490 1491 stat_pad_len = spu->spu_wordalign_padlen(db_size); 1492 1493 if (stat_pad_len) 1494 rx_frag_num++; 1495 pad_len = aead_parms.data_pad_len + stat_pad_len; 1496 if (pad_len) { 1497 tx_frag_num++; 1498 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 1499 aead_parms.data_pad_len, 0, 1500 ctx->auth.alg, ctx->auth.mode, 1501 rctx->total_sent, stat_pad_len); 1502 } 1503 1504 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN, 1505 spu_hdr_len); 1506 dump_sg(rctx->assoc, 0, aead_parms.assoc_size); 1507 packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len); 1508 packet_log("BD:\n"); 1509 dump_sg(rctx->src_sg, rctx->src_skip, chunksize); 1510 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len); 1511 1512 /* 1513 * Build mailbox message containing SPU request msg and rx buffers 1514 * to catch response message 1515 */ 1516 memset(mssg, 0, sizeof(*mssg)); 1517 mssg->type = BRCM_MESSAGE_SPU; 1518 mssg->ctx = rctx; /* Will be returned in response */ 1519 1520 /* Create rx scatterlist to catch result */ 1521 rx_frag_num += rctx->dst_nents; 1522 resp_len = chunksize; 1523 1524 /* 1525 * Always catch ICV in separate buffer. Have to for GCM/CCM because of 1526 * padding. Have to for SHA-224 and other truncated SHAs because SPU 1527 * sends entire digest back. 1528 */ 1529 rx_frag_num++; 1530 1531 if (((ctx->cipher.mode == CIPHER_MODE_GCM) || 1532 (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) { 1533 /* 1534 * Input is ciphertxt plus ICV, but ICV not incl 1535 * in output. 1536 */ 1537 resp_len -= ctx->digestsize; 1538 if (resp_len == 0) 1539 /* no rx frags to catch output data */ 1540 rx_frag_num -= rctx->dst_nents; 1541 } 1542 1543 err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num, 1544 aead_parms.assoc_size, 1545 aead_parms.ret_iv_len, resp_len, digestsize, 1546 stat_pad_len); 1547 if (err) 1548 return err; 1549 1550 /* Create tx scatterlist containing SPU request message */ 1551 tx_frag_num += rctx->src_nents; 1552 tx_frag_num += assoc_nents; 1553 if (aead_parms.aad_pad_len) 1554 tx_frag_num++; 1555 if (aead_parms.iv_len) 1556 tx_frag_num++; 1557 if (spu->spu_tx_status_len()) 1558 tx_frag_num++; 1559 err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len, 1560 rctx->assoc, aead_parms.assoc_size, 1561 assoc_nents, aead_parms.iv_len, chunksize, 1562 aead_parms.aad_pad_len, pad_len, incl_icv); 1563 if (err) 1564 return err; 1565 1566 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx); 1567 if (unlikely(err < 0)) 1568 return err; 1569 1570 return -EINPROGRESS; 1571 } 1572 1573 /** 1574 * handle_aead_resp() - Process a SPU response message for an AEAD request. 1575 * @rctx: Crypto request context 1576 */ 1577 static void handle_aead_resp(struct iproc_reqctx_s *rctx) 1578 { 1579 struct spu_hw *spu = &iproc_priv.spu; 1580 struct crypto_async_request *areq = rctx->parent; 1581 struct aead_request *req = container_of(areq, 1582 struct aead_request, base); 1583 struct iproc_ctx_s *ctx = rctx->ctx; 1584 u32 payload_len; 1585 unsigned int icv_offset; 1586 u32 result_len; 1587 1588 /* See how much data was returned */ 1589 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr); 1590 flow_log("payload_len %u\n", payload_len); 1591 1592 /* only count payload */ 1593 atomic64_add(payload_len, &iproc_priv.bytes_in); 1594 1595 if (req->assoclen) 1596 packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad, 1597 req->assoclen); 1598 1599 /* 1600 * Copy the ICV back to the destination 1601 * buffer. In decrypt case, SPU gives us back the digest, but crypto 1602 * API doesn't expect ICV in dst buffer. 1603 */ 1604 result_len = req->cryptlen; 1605 if (rctx->is_encrypt) { 1606 icv_offset = req->assoclen + rctx->total_sent; 1607 packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize); 1608 flow_log("copying ICV to dst sg at offset %u\n", icv_offset); 1609 sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest, 1610 ctx->digestsize, icv_offset); 1611 result_len += ctx->digestsize; 1612 } 1613 1614 packet_log("response data: "); 1615 dump_sg(req->dst, req->assoclen, result_len); 1616 1617 atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]); 1618 if (ctx->cipher.alg == CIPHER_ALG_AES) { 1619 if (ctx->cipher.mode == CIPHER_MODE_CCM) 1620 atomic_inc(&iproc_priv.aead_cnt[AES_CCM]); 1621 else if (ctx->cipher.mode == CIPHER_MODE_GCM) 1622 atomic_inc(&iproc_priv.aead_cnt[AES_GCM]); 1623 else 1624 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]); 1625 } else { 1626 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]); 1627 } 1628 } 1629 1630 /** 1631 * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request 1632 * @rctx: request context 1633 * 1634 * Mailbox scatterlists are allocated for each chunk. So free them after 1635 * processing each chunk. 1636 */ 1637 static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx) 1638 { 1639 /* mailbox message used to tx request */ 1640 struct brcm_message *mssg = &rctx->mb_mssg; 1641 1642 kfree(mssg->spu.src); 1643 kfree(mssg->spu.dst); 1644 memset(mssg, 0, sizeof(struct brcm_message)); 1645 } 1646 1647 /** 1648 * finish_req() - Used to invoke the complete callback from the requester when 1649 * a request has been handled asynchronously. 1650 * @rctx: Request context 1651 * @err: Indicates whether the request was successful or not 1652 * 1653 * Ensures that cleanup has been done for request 1654 */ 1655 static void finish_req(struct iproc_reqctx_s *rctx, int err) 1656 { 1657 struct crypto_async_request *areq = rctx->parent; 1658 1659 flow_log("%s() err:%d\n\n", __func__, err); 1660 1661 /* No harm done if already called */ 1662 spu_chunk_cleanup(rctx); 1663 1664 if (areq) 1665 areq->complete(areq, err); 1666 } 1667 1668 /** 1669 * spu_rx_callback() - Callback from mailbox framework with a SPU response. 1670 * @cl: mailbox client structure for SPU driver 1671 * @msg: mailbox message containing SPU response 1672 */ 1673 static void spu_rx_callback(struct mbox_client *cl, void *msg) 1674 { 1675 struct spu_hw *spu = &iproc_priv.spu; 1676 struct brcm_message *mssg = msg; 1677 struct iproc_reqctx_s *rctx; 1678 int err = 0; 1679 1680 rctx = mssg->ctx; 1681 if (unlikely(!rctx)) { 1682 /* This is fatal */ 1683 pr_err("%s(): no request context", __func__); 1684 err = -EFAULT; 1685 goto cb_finish; 1686 } 1687 1688 /* process the SPU status */ 1689 err = spu->spu_status_process(rctx->msg_buf.rx_stat); 1690 if (err != 0) { 1691 if (err == SPU_INVALID_ICV) 1692 atomic_inc(&iproc_priv.bad_icv); 1693 err = -EBADMSG; 1694 goto cb_finish; 1695 } 1696 1697 /* Process the SPU response message */ 1698 switch (rctx->ctx->alg->type) { 1699 case CRYPTO_ALG_TYPE_ABLKCIPHER: 1700 handle_ablkcipher_resp(rctx); 1701 break; 1702 case CRYPTO_ALG_TYPE_AHASH: 1703 handle_ahash_resp(rctx); 1704 break; 1705 case CRYPTO_ALG_TYPE_AEAD: 1706 handle_aead_resp(rctx); 1707 break; 1708 default: 1709 err = -EINVAL; 1710 goto cb_finish; 1711 } 1712 1713 /* 1714 * If this response does not complete the request, then send the next 1715 * request chunk. 1716 */ 1717 if (rctx->total_sent < rctx->total_todo) { 1718 /* Deallocate anything specific to previous chunk */ 1719 spu_chunk_cleanup(rctx); 1720 1721 switch (rctx->ctx->alg->type) { 1722 case CRYPTO_ALG_TYPE_ABLKCIPHER: 1723 err = handle_ablkcipher_req(rctx); 1724 break; 1725 case CRYPTO_ALG_TYPE_AHASH: 1726 err = handle_ahash_req(rctx); 1727 if (err == -EAGAIN) 1728 /* 1729 * we saved data in hash carry, but tell crypto 1730 * API we successfully completed request. 1731 */ 1732 err = 0; 1733 break; 1734 case CRYPTO_ALG_TYPE_AEAD: 1735 err = handle_aead_req(rctx); 1736 break; 1737 default: 1738 err = -EINVAL; 1739 } 1740 1741 if (err == -EINPROGRESS) 1742 /* Successfully submitted request for next chunk */ 1743 return; 1744 } 1745 1746 cb_finish: 1747 finish_req(rctx, err); 1748 } 1749 1750 /* ==================== Kernel Cryptographic API ==================== */ 1751 1752 /** 1753 * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request. 1754 * @req: Crypto API request 1755 * @encrypt: true if encrypting; false if decrypting 1756 * 1757 * Return: -EINPROGRESS if request accepted and result will be returned 1758 * asynchronously 1759 * < 0 if an error 1760 */ 1761 static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt) 1762 { 1763 struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req); 1764 struct iproc_ctx_s *ctx = 1765 crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req)); 1766 int err; 1767 1768 flow_log("%s() enc:%u\n", __func__, encrypt); 1769 1770 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 1771 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 1772 rctx->parent = &req->base; 1773 rctx->is_encrypt = encrypt; 1774 rctx->bd_suppress = false; 1775 rctx->total_todo = req->nbytes; 1776 rctx->src_sent = 0; 1777 rctx->total_sent = 0; 1778 rctx->total_received = 0; 1779 rctx->ctx = ctx; 1780 1781 /* Initialize current position in src and dst scatterlists */ 1782 rctx->src_sg = req->src; 1783 rctx->src_nents = 0; 1784 rctx->src_skip = 0; 1785 rctx->dst_sg = req->dst; 1786 rctx->dst_nents = 0; 1787 rctx->dst_skip = 0; 1788 1789 if (ctx->cipher.mode == CIPHER_MODE_CBC || 1790 ctx->cipher.mode == CIPHER_MODE_CTR || 1791 ctx->cipher.mode == CIPHER_MODE_OFB || 1792 ctx->cipher.mode == CIPHER_MODE_XTS || 1793 ctx->cipher.mode == CIPHER_MODE_GCM || 1794 ctx->cipher.mode == CIPHER_MODE_CCM) { 1795 rctx->iv_ctr_len = 1796 crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req)); 1797 memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len); 1798 } else { 1799 rctx->iv_ctr_len = 0; 1800 } 1801 1802 /* Choose a SPU to process this request */ 1803 rctx->chan_idx = select_channel(); 1804 err = handle_ablkcipher_req(rctx); 1805 if (err != -EINPROGRESS) 1806 /* synchronous result */ 1807 spu_chunk_cleanup(rctx); 1808 1809 return err; 1810 } 1811 1812 static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key, 1813 unsigned int keylen) 1814 { 1815 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher); 1816 u32 tmp[DES_EXPKEY_WORDS]; 1817 1818 if (keylen == DES_KEY_SIZE) { 1819 if (des_ekey(tmp, key) == 0) { 1820 if (crypto_ablkcipher_get_flags(cipher) & 1821 CRYPTO_TFM_REQ_FORBID_WEAK_KEYS) { 1822 u32 flags = CRYPTO_TFM_RES_WEAK_KEY; 1823 1824 crypto_ablkcipher_set_flags(cipher, flags); 1825 return -EINVAL; 1826 } 1827 } 1828 1829 ctx->cipher_type = CIPHER_TYPE_DES; 1830 } else { 1831 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); 1832 return -EINVAL; 1833 } 1834 return 0; 1835 } 1836 1837 static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key, 1838 unsigned int keylen) 1839 { 1840 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher); 1841 1842 if (keylen == (DES_KEY_SIZE * 3)) { 1843 u32 flags; 1844 int ret; 1845 1846 flags = crypto_ablkcipher_get_flags(cipher); 1847 ret = __des3_verify_key(&flags, key); 1848 if (unlikely(ret)) { 1849 crypto_ablkcipher_set_flags(cipher, flags); 1850 return ret; 1851 } 1852 1853 ctx->cipher_type = CIPHER_TYPE_3DES; 1854 } else { 1855 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); 1856 return -EINVAL; 1857 } 1858 return 0; 1859 } 1860 1861 static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key, 1862 unsigned int keylen) 1863 { 1864 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher); 1865 1866 if (ctx->cipher.mode == CIPHER_MODE_XTS) 1867 /* XTS includes two keys of equal length */ 1868 keylen = keylen / 2; 1869 1870 switch (keylen) { 1871 case AES_KEYSIZE_128: 1872 ctx->cipher_type = CIPHER_TYPE_AES128; 1873 break; 1874 case AES_KEYSIZE_192: 1875 ctx->cipher_type = CIPHER_TYPE_AES192; 1876 break; 1877 case AES_KEYSIZE_256: 1878 ctx->cipher_type = CIPHER_TYPE_AES256; 1879 break; 1880 default: 1881 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); 1882 return -EINVAL; 1883 } 1884 WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) && 1885 ((ctx->max_payload % AES_BLOCK_SIZE) != 0)); 1886 return 0; 1887 } 1888 1889 static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key, 1890 unsigned int keylen) 1891 { 1892 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher); 1893 int i; 1894 1895 ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE; 1896 1897 ctx->enckey[0] = 0x00; /* 0x00 */ 1898 ctx->enckey[1] = 0x00; /* i */ 1899 ctx->enckey[2] = 0x00; /* 0x00 */ 1900 ctx->enckey[3] = 0x00; /* j */ 1901 for (i = 0; i < ARC4_MAX_KEY_SIZE; i++) 1902 ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen]; 1903 1904 ctx->cipher_type = CIPHER_TYPE_INIT; 1905 1906 return 0; 1907 } 1908 1909 static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key, 1910 unsigned int keylen) 1911 { 1912 struct spu_hw *spu = &iproc_priv.spu; 1913 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher); 1914 struct spu_cipher_parms cipher_parms; 1915 u32 alloc_len = 0; 1916 int err; 1917 1918 flow_log("ablkcipher_setkey() keylen: %d\n", keylen); 1919 flow_dump(" key: ", key, keylen); 1920 1921 switch (ctx->cipher.alg) { 1922 case CIPHER_ALG_DES: 1923 err = des_setkey(cipher, key, keylen); 1924 break; 1925 case CIPHER_ALG_3DES: 1926 err = threedes_setkey(cipher, key, keylen); 1927 break; 1928 case CIPHER_ALG_AES: 1929 err = aes_setkey(cipher, key, keylen); 1930 break; 1931 case CIPHER_ALG_RC4: 1932 err = rc4_setkey(cipher, key, keylen); 1933 break; 1934 default: 1935 pr_err("%s() Error: unknown cipher alg\n", __func__); 1936 err = -EINVAL; 1937 } 1938 if (err) 1939 return err; 1940 1941 /* RC4 already populated ctx->enkey */ 1942 if (ctx->cipher.alg != CIPHER_ALG_RC4) { 1943 memcpy(ctx->enckey, key, keylen); 1944 ctx->enckeylen = keylen; 1945 } 1946 /* SPU needs XTS keys in the reverse order the crypto API presents */ 1947 if ((ctx->cipher.alg == CIPHER_ALG_AES) && 1948 (ctx->cipher.mode == CIPHER_MODE_XTS)) { 1949 unsigned int xts_keylen = keylen / 2; 1950 1951 memcpy(ctx->enckey, key + xts_keylen, xts_keylen); 1952 memcpy(ctx->enckey + xts_keylen, key, xts_keylen); 1953 } 1954 1955 if (spu->spu_type == SPU_TYPE_SPUM) 1956 alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN; 1957 else if (spu->spu_type == SPU_TYPE_SPU2) 1958 alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN; 1959 memset(ctx->bcm_spu_req_hdr, 0, alloc_len); 1960 cipher_parms.iv_buf = NULL; 1961 cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher); 1962 flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len); 1963 1964 cipher_parms.alg = ctx->cipher.alg; 1965 cipher_parms.mode = ctx->cipher.mode; 1966 cipher_parms.type = ctx->cipher_type; 1967 cipher_parms.key_buf = ctx->enckey; 1968 cipher_parms.key_len = ctx->enckeylen; 1969 1970 /* Prepend SPU request message with BCM header */ 1971 memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN); 1972 ctx->spu_req_hdr_len = 1973 spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN, 1974 &cipher_parms); 1975 1976 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 1977 ctx->enckeylen, 1978 false); 1979 1980 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]); 1981 1982 return 0; 1983 } 1984 1985 static int ablkcipher_encrypt(struct ablkcipher_request *req) 1986 { 1987 flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes); 1988 1989 return ablkcipher_enqueue(req, true); 1990 } 1991 1992 static int ablkcipher_decrypt(struct ablkcipher_request *req) 1993 { 1994 flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes); 1995 return ablkcipher_enqueue(req, false); 1996 } 1997 1998 static int ahash_enqueue(struct ahash_request *req) 1999 { 2000 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2001 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2002 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2003 int err = 0; 2004 const char *alg_name; 2005 2006 flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes); 2007 2008 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 2009 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 2010 rctx->parent = &req->base; 2011 rctx->ctx = ctx; 2012 rctx->bd_suppress = true; 2013 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message)); 2014 2015 /* Initialize position in src scatterlist */ 2016 rctx->src_sg = req->src; 2017 rctx->src_skip = 0; 2018 rctx->src_nents = 0; 2019 rctx->dst_sg = NULL; 2020 rctx->dst_skip = 0; 2021 rctx->dst_nents = 0; 2022 2023 /* SPU2 hardware does not compute hash of zero length data */ 2024 if ((rctx->is_final == 1) && (rctx->total_todo == 0) && 2025 (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) { 2026 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm)); 2027 flow_log("Doing %sfinal %s zero-len hash request in software\n", 2028 rctx->is_final ? "" : "non-", alg_name); 2029 err = do_shash((unsigned char *)alg_name, req->result, 2030 NULL, 0, NULL, 0, ctx->authkey, 2031 ctx->authkeylen); 2032 if (err < 0) 2033 flow_log("Hash request failed with error %d\n", err); 2034 return err; 2035 } 2036 /* Choose a SPU to process this request */ 2037 rctx->chan_idx = select_channel(); 2038 2039 err = handle_ahash_req(rctx); 2040 if (err != -EINPROGRESS) 2041 /* synchronous result */ 2042 spu_chunk_cleanup(rctx); 2043 2044 if (err == -EAGAIN) 2045 /* 2046 * we saved data in hash carry, but tell crypto API 2047 * we successfully completed request. 2048 */ 2049 err = 0; 2050 2051 return err; 2052 } 2053 2054 static int __ahash_init(struct ahash_request *req) 2055 { 2056 struct spu_hw *spu = &iproc_priv.spu; 2057 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2058 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2059 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2060 2061 flow_log("%s()\n", __func__); 2062 2063 /* Initialize the context */ 2064 rctx->hash_carry_len = 0; 2065 rctx->is_final = 0; 2066 2067 rctx->total_todo = 0; 2068 rctx->src_sent = 0; 2069 rctx->total_sent = 0; 2070 rctx->total_received = 0; 2071 2072 ctx->digestsize = crypto_ahash_digestsize(tfm); 2073 /* If we add a hash whose digest is larger, catch it here. */ 2074 WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE); 2075 2076 rctx->is_sw_hmac = false; 2077 2078 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0, 2079 true); 2080 2081 return 0; 2082 } 2083 2084 /** 2085 * spu_no_incr_hash() - Determine whether incremental hashing is supported. 2086 * @ctx: Crypto session context 2087 * 2088 * SPU-2 does not support incremental hashing (we'll have to revisit and 2089 * condition based on chip revision or device tree entry if future versions do 2090 * support incremental hash) 2091 * 2092 * SPU-M also doesn't support incremental hashing of AES-XCBC 2093 * 2094 * Return: true if incremental hashing is not supported 2095 * false otherwise 2096 */ 2097 bool spu_no_incr_hash(struct iproc_ctx_s *ctx) 2098 { 2099 struct spu_hw *spu = &iproc_priv.spu; 2100 2101 if (spu->spu_type == SPU_TYPE_SPU2) 2102 return true; 2103 2104 if ((ctx->auth.alg == HASH_ALG_AES) && 2105 (ctx->auth.mode == HASH_MODE_XCBC)) 2106 return true; 2107 2108 /* Otherwise, incremental hashing is supported */ 2109 return false; 2110 } 2111 2112 static int ahash_init(struct ahash_request *req) 2113 { 2114 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2115 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2116 const char *alg_name; 2117 struct crypto_shash *hash; 2118 int ret; 2119 gfp_t gfp; 2120 2121 if (spu_no_incr_hash(ctx)) { 2122 /* 2123 * If we get an incremental hashing request and it's not 2124 * supported by the hardware, we need to handle it in software 2125 * by calling synchronous hash functions. 2126 */ 2127 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm)); 2128 hash = crypto_alloc_shash(alg_name, 0, 0); 2129 if (IS_ERR(hash)) { 2130 ret = PTR_ERR(hash); 2131 goto err; 2132 } 2133 2134 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 2135 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 2136 ctx->shash = kmalloc(sizeof(*ctx->shash) + 2137 crypto_shash_descsize(hash), gfp); 2138 if (!ctx->shash) { 2139 ret = -ENOMEM; 2140 goto err_hash; 2141 } 2142 ctx->shash->tfm = hash; 2143 2144 /* Set the key using data we already have from setkey */ 2145 if (ctx->authkeylen > 0) { 2146 ret = crypto_shash_setkey(hash, ctx->authkey, 2147 ctx->authkeylen); 2148 if (ret) 2149 goto err_shash; 2150 } 2151 2152 /* Initialize hash w/ this key and other params */ 2153 ret = crypto_shash_init(ctx->shash); 2154 if (ret) 2155 goto err_shash; 2156 } else { 2157 /* Otherwise call the internal function which uses SPU hw */ 2158 ret = __ahash_init(req); 2159 } 2160 2161 return ret; 2162 2163 err_shash: 2164 kfree(ctx->shash); 2165 err_hash: 2166 crypto_free_shash(hash); 2167 err: 2168 return ret; 2169 } 2170 2171 static int __ahash_update(struct ahash_request *req) 2172 { 2173 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2174 2175 flow_log("ahash_update() nbytes:%u\n", req->nbytes); 2176 2177 if (!req->nbytes) 2178 return 0; 2179 rctx->total_todo += req->nbytes; 2180 rctx->src_sent = 0; 2181 2182 return ahash_enqueue(req); 2183 } 2184 2185 static int ahash_update(struct ahash_request *req) 2186 { 2187 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2188 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2189 u8 *tmpbuf; 2190 int ret; 2191 int nents; 2192 gfp_t gfp; 2193 2194 if (spu_no_incr_hash(ctx)) { 2195 /* 2196 * If we get an incremental hashing request and it's not 2197 * supported by the hardware, we need to handle it in software 2198 * by calling synchronous hash functions. 2199 */ 2200 if (req->src) 2201 nents = sg_nents(req->src); 2202 else 2203 return -EINVAL; 2204 2205 /* Copy data from req scatterlist to tmp buffer */ 2206 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 2207 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 2208 tmpbuf = kmalloc(req->nbytes, gfp); 2209 if (!tmpbuf) 2210 return -ENOMEM; 2211 2212 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) != 2213 req->nbytes) { 2214 kfree(tmpbuf); 2215 return -EINVAL; 2216 } 2217 2218 /* Call synchronous update */ 2219 ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes); 2220 kfree(tmpbuf); 2221 } else { 2222 /* Otherwise call the internal function which uses SPU hw */ 2223 ret = __ahash_update(req); 2224 } 2225 2226 return ret; 2227 } 2228 2229 static int __ahash_final(struct ahash_request *req) 2230 { 2231 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2232 2233 flow_log("ahash_final() nbytes:%u\n", req->nbytes); 2234 2235 rctx->is_final = 1; 2236 2237 return ahash_enqueue(req); 2238 } 2239 2240 static int ahash_final(struct ahash_request *req) 2241 { 2242 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2243 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2244 int ret; 2245 2246 if (spu_no_incr_hash(ctx)) { 2247 /* 2248 * If we get an incremental hashing request and it's not 2249 * supported by the hardware, we need to handle it in software 2250 * by calling synchronous hash functions. 2251 */ 2252 ret = crypto_shash_final(ctx->shash, req->result); 2253 2254 /* Done with hash, can deallocate it now */ 2255 crypto_free_shash(ctx->shash->tfm); 2256 kfree(ctx->shash); 2257 2258 } else { 2259 /* Otherwise call the internal function which uses SPU hw */ 2260 ret = __ahash_final(req); 2261 } 2262 2263 return ret; 2264 } 2265 2266 static int __ahash_finup(struct ahash_request *req) 2267 { 2268 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2269 2270 flow_log("ahash_finup() nbytes:%u\n", req->nbytes); 2271 2272 rctx->total_todo += req->nbytes; 2273 rctx->src_sent = 0; 2274 rctx->is_final = 1; 2275 2276 return ahash_enqueue(req); 2277 } 2278 2279 static int ahash_finup(struct ahash_request *req) 2280 { 2281 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2282 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2283 u8 *tmpbuf; 2284 int ret; 2285 int nents; 2286 gfp_t gfp; 2287 2288 if (spu_no_incr_hash(ctx)) { 2289 /* 2290 * If we get an incremental hashing request and it's not 2291 * supported by the hardware, we need to handle it in software 2292 * by calling synchronous hash functions. 2293 */ 2294 if (req->src) { 2295 nents = sg_nents(req->src); 2296 } else { 2297 ret = -EINVAL; 2298 goto ahash_finup_exit; 2299 } 2300 2301 /* Copy data from req scatterlist to tmp buffer */ 2302 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 2303 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 2304 tmpbuf = kmalloc(req->nbytes, gfp); 2305 if (!tmpbuf) { 2306 ret = -ENOMEM; 2307 goto ahash_finup_exit; 2308 } 2309 2310 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) != 2311 req->nbytes) { 2312 ret = -EINVAL; 2313 goto ahash_finup_free; 2314 } 2315 2316 /* Call synchronous update */ 2317 ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes, 2318 req->result); 2319 } else { 2320 /* Otherwise call the internal function which uses SPU hw */ 2321 return __ahash_finup(req); 2322 } 2323 ahash_finup_free: 2324 kfree(tmpbuf); 2325 2326 ahash_finup_exit: 2327 /* Done with hash, can deallocate it now */ 2328 crypto_free_shash(ctx->shash->tfm); 2329 kfree(ctx->shash); 2330 return ret; 2331 } 2332 2333 static int ahash_digest(struct ahash_request *req) 2334 { 2335 int err = 0; 2336 2337 flow_log("ahash_digest() nbytes:%u\n", req->nbytes); 2338 2339 /* whole thing at once */ 2340 err = __ahash_init(req); 2341 if (!err) 2342 err = __ahash_finup(req); 2343 2344 return err; 2345 } 2346 2347 static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key, 2348 unsigned int keylen) 2349 { 2350 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash); 2351 2352 flow_log("%s() ahash:%p key:%p keylen:%u\n", 2353 __func__, ahash, key, keylen); 2354 flow_dump(" key: ", key, keylen); 2355 2356 if (ctx->auth.alg == HASH_ALG_AES) { 2357 switch (keylen) { 2358 case AES_KEYSIZE_128: 2359 ctx->cipher_type = CIPHER_TYPE_AES128; 2360 break; 2361 case AES_KEYSIZE_192: 2362 ctx->cipher_type = CIPHER_TYPE_AES192; 2363 break; 2364 case AES_KEYSIZE_256: 2365 ctx->cipher_type = CIPHER_TYPE_AES256; 2366 break; 2367 default: 2368 pr_err("%s() Error: Invalid key length\n", __func__); 2369 return -EINVAL; 2370 } 2371 } else { 2372 pr_err("%s() Error: unknown hash alg\n", __func__); 2373 return -EINVAL; 2374 } 2375 memcpy(ctx->authkey, key, keylen); 2376 ctx->authkeylen = keylen; 2377 2378 return 0; 2379 } 2380 2381 static int ahash_export(struct ahash_request *req, void *out) 2382 { 2383 const struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2384 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out; 2385 2386 spu_exp->total_todo = rctx->total_todo; 2387 spu_exp->total_sent = rctx->total_sent; 2388 spu_exp->is_sw_hmac = rctx->is_sw_hmac; 2389 memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry)); 2390 spu_exp->hash_carry_len = rctx->hash_carry_len; 2391 memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash)); 2392 2393 return 0; 2394 } 2395 2396 static int ahash_import(struct ahash_request *req, const void *in) 2397 { 2398 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2399 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in; 2400 2401 rctx->total_todo = spu_exp->total_todo; 2402 rctx->total_sent = spu_exp->total_sent; 2403 rctx->is_sw_hmac = spu_exp->is_sw_hmac; 2404 memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry)); 2405 rctx->hash_carry_len = spu_exp->hash_carry_len; 2406 memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash)); 2407 2408 return 0; 2409 } 2410 2411 static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key, 2412 unsigned int keylen) 2413 { 2414 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash); 2415 unsigned int blocksize = 2416 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash)); 2417 unsigned int digestsize = crypto_ahash_digestsize(ahash); 2418 unsigned int index; 2419 int rc; 2420 2421 flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n", 2422 __func__, ahash, key, keylen, blocksize, digestsize); 2423 flow_dump(" key: ", key, keylen); 2424 2425 if (keylen > blocksize) { 2426 switch (ctx->auth.alg) { 2427 case HASH_ALG_MD5: 2428 rc = do_shash("md5", ctx->authkey, key, keylen, NULL, 2429 0, NULL, 0); 2430 break; 2431 case HASH_ALG_SHA1: 2432 rc = do_shash("sha1", ctx->authkey, key, keylen, NULL, 2433 0, NULL, 0); 2434 break; 2435 case HASH_ALG_SHA224: 2436 rc = do_shash("sha224", ctx->authkey, key, keylen, NULL, 2437 0, NULL, 0); 2438 break; 2439 case HASH_ALG_SHA256: 2440 rc = do_shash("sha256", ctx->authkey, key, keylen, NULL, 2441 0, NULL, 0); 2442 break; 2443 case HASH_ALG_SHA384: 2444 rc = do_shash("sha384", ctx->authkey, key, keylen, NULL, 2445 0, NULL, 0); 2446 break; 2447 case HASH_ALG_SHA512: 2448 rc = do_shash("sha512", ctx->authkey, key, keylen, NULL, 2449 0, NULL, 0); 2450 break; 2451 case HASH_ALG_SHA3_224: 2452 rc = do_shash("sha3-224", ctx->authkey, key, keylen, 2453 NULL, 0, NULL, 0); 2454 break; 2455 case HASH_ALG_SHA3_256: 2456 rc = do_shash("sha3-256", ctx->authkey, key, keylen, 2457 NULL, 0, NULL, 0); 2458 break; 2459 case HASH_ALG_SHA3_384: 2460 rc = do_shash("sha3-384", ctx->authkey, key, keylen, 2461 NULL, 0, NULL, 0); 2462 break; 2463 case HASH_ALG_SHA3_512: 2464 rc = do_shash("sha3-512", ctx->authkey, key, keylen, 2465 NULL, 0, NULL, 0); 2466 break; 2467 default: 2468 pr_err("%s() Error: unknown hash alg\n", __func__); 2469 return -EINVAL; 2470 } 2471 if (rc < 0) { 2472 pr_err("%s() Error %d computing shash for %s\n", 2473 __func__, rc, hash_alg_name[ctx->auth.alg]); 2474 return rc; 2475 } 2476 ctx->authkeylen = digestsize; 2477 2478 flow_log(" keylen > digestsize... hashed\n"); 2479 flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen); 2480 } else { 2481 memcpy(ctx->authkey, key, keylen); 2482 ctx->authkeylen = keylen; 2483 } 2484 2485 /* 2486 * Full HMAC operation in SPUM is not verified, 2487 * So keeping the generation of IPAD, OPAD and 2488 * outer hashing in software. 2489 */ 2490 if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) { 2491 memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen); 2492 memset(ctx->ipad + ctx->authkeylen, 0, 2493 blocksize - ctx->authkeylen); 2494 ctx->authkeylen = 0; 2495 memcpy(ctx->opad, ctx->ipad, blocksize); 2496 2497 for (index = 0; index < blocksize; index++) { 2498 ctx->ipad[index] ^= HMAC_IPAD_VALUE; 2499 ctx->opad[index] ^= HMAC_OPAD_VALUE; 2500 } 2501 2502 flow_dump(" ipad: ", ctx->ipad, blocksize); 2503 flow_dump(" opad: ", ctx->opad, blocksize); 2504 } 2505 ctx->digestsize = digestsize; 2506 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]); 2507 2508 return 0; 2509 } 2510 2511 static int ahash_hmac_init(struct ahash_request *req) 2512 { 2513 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2514 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2515 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2516 unsigned int blocksize = 2517 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); 2518 2519 flow_log("ahash_hmac_init()\n"); 2520 2521 /* init the context as a hash */ 2522 ahash_init(req); 2523 2524 if (!spu_no_incr_hash(ctx)) { 2525 /* SPU-M can do incr hashing but needs sw for outer HMAC */ 2526 rctx->is_sw_hmac = true; 2527 ctx->auth.mode = HASH_MODE_HASH; 2528 /* start with a prepended ipad */ 2529 memcpy(rctx->hash_carry, ctx->ipad, blocksize); 2530 rctx->hash_carry_len = blocksize; 2531 rctx->total_todo += blocksize; 2532 } 2533 2534 return 0; 2535 } 2536 2537 static int ahash_hmac_update(struct ahash_request *req) 2538 { 2539 flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes); 2540 2541 if (!req->nbytes) 2542 return 0; 2543 2544 return ahash_update(req); 2545 } 2546 2547 static int ahash_hmac_final(struct ahash_request *req) 2548 { 2549 flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes); 2550 2551 return ahash_final(req); 2552 } 2553 2554 static int ahash_hmac_finup(struct ahash_request *req) 2555 { 2556 flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes); 2557 2558 return ahash_finup(req); 2559 } 2560 2561 static int ahash_hmac_digest(struct ahash_request *req) 2562 { 2563 struct iproc_reqctx_s *rctx = ahash_request_ctx(req); 2564 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 2565 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); 2566 unsigned int blocksize = 2567 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); 2568 2569 flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes); 2570 2571 /* Perform initialization and then call finup */ 2572 __ahash_init(req); 2573 2574 if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) { 2575 /* 2576 * SPU2 supports full HMAC implementation in the 2577 * hardware, need not to generate IPAD, OPAD and 2578 * outer hash in software. 2579 * Only for hash key len > hash block size, SPU2 2580 * expects to perform hashing on the key, shorten 2581 * it to digest size and feed it as hash key. 2582 */ 2583 rctx->is_sw_hmac = false; 2584 ctx->auth.mode = HASH_MODE_HMAC; 2585 } else { 2586 rctx->is_sw_hmac = true; 2587 ctx->auth.mode = HASH_MODE_HASH; 2588 /* start with a prepended ipad */ 2589 memcpy(rctx->hash_carry, ctx->ipad, blocksize); 2590 rctx->hash_carry_len = blocksize; 2591 rctx->total_todo += blocksize; 2592 } 2593 2594 return __ahash_finup(req); 2595 } 2596 2597 /* aead helpers */ 2598 2599 static int aead_need_fallback(struct aead_request *req) 2600 { 2601 struct iproc_reqctx_s *rctx = aead_request_ctx(req); 2602 struct spu_hw *spu = &iproc_priv.spu; 2603 struct crypto_aead *aead = crypto_aead_reqtfm(req); 2604 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead); 2605 u32 payload_len; 2606 2607 /* 2608 * SPU hardware cannot handle the AES-GCM/CCM case where plaintext 2609 * and AAD are both 0 bytes long. So use fallback in this case. 2610 */ 2611 if (((ctx->cipher.mode == CIPHER_MODE_GCM) || 2612 (ctx->cipher.mode == CIPHER_MODE_CCM)) && 2613 (req->assoclen == 0)) { 2614 if ((rctx->is_encrypt && (req->cryptlen == 0)) || 2615 (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) { 2616 flow_log("AES GCM/CCM needs fallback for 0 len req\n"); 2617 return 1; 2618 } 2619 } 2620 2621 /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */ 2622 if ((ctx->cipher.mode == CIPHER_MODE_CCM) && 2623 (spu->spu_type == SPU_TYPE_SPUM) && 2624 (ctx->digestsize != 8) && (ctx->digestsize != 12) && 2625 (ctx->digestsize != 16)) { 2626 flow_log("%s() AES CCM needs fallback for digest size %d\n", 2627 __func__, ctx->digestsize); 2628 return 1; 2629 } 2630 2631 /* 2632 * SPU-M on NSP has an issue where AES-CCM hash is not correct 2633 * when AAD size is 0 2634 */ 2635 if ((ctx->cipher.mode == CIPHER_MODE_CCM) && 2636 (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) && 2637 (req->assoclen == 0)) { 2638 flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n", 2639 __func__); 2640 return 1; 2641 } 2642 2643 payload_len = req->cryptlen; 2644 if (spu->spu_type == SPU_TYPE_SPUM) 2645 payload_len += req->assoclen; 2646 2647 flow_log("%s() payload len: %u\n", __func__, payload_len); 2648 2649 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF) 2650 return 0; 2651 else 2652 return payload_len > ctx->max_payload; 2653 } 2654 2655 static void aead_complete(struct crypto_async_request *areq, int err) 2656 { 2657 struct aead_request *req = 2658 container_of(areq, struct aead_request, base); 2659 struct iproc_reqctx_s *rctx = aead_request_ctx(req); 2660 struct crypto_aead *aead = crypto_aead_reqtfm(req); 2661 2662 flow_log("%s() err:%d\n", __func__, err); 2663 2664 areq->tfm = crypto_aead_tfm(aead); 2665 2666 areq->complete = rctx->old_complete; 2667 areq->data = rctx->old_data; 2668 2669 areq->complete(areq, err); 2670 } 2671 2672 static int aead_do_fallback(struct aead_request *req, bool is_encrypt) 2673 { 2674 struct crypto_aead *aead = crypto_aead_reqtfm(req); 2675 struct crypto_tfm *tfm = crypto_aead_tfm(aead); 2676 struct iproc_reqctx_s *rctx = aead_request_ctx(req); 2677 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm); 2678 int err; 2679 u32 req_flags; 2680 2681 flow_log("%s() enc:%u\n", __func__, is_encrypt); 2682 2683 if (ctx->fallback_cipher) { 2684 /* Store the cipher tfm and then use the fallback tfm */ 2685 rctx->old_tfm = tfm; 2686 aead_request_set_tfm(req, ctx->fallback_cipher); 2687 /* 2688 * Save the callback and chain ourselves in, so we can restore 2689 * the tfm 2690 */ 2691 rctx->old_complete = req->base.complete; 2692 rctx->old_data = req->base.data; 2693 req_flags = aead_request_flags(req); 2694 aead_request_set_callback(req, req_flags, aead_complete, req); 2695 err = is_encrypt ? crypto_aead_encrypt(req) : 2696 crypto_aead_decrypt(req); 2697 2698 if (err == 0) { 2699 /* 2700 * fallback was synchronous (did not return 2701 * -EINPROGRESS). So restore request state here. 2702 */ 2703 aead_request_set_callback(req, req_flags, 2704 rctx->old_complete, req); 2705 req->base.data = rctx->old_data; 2706 aead_request_set_tfm(req, aead); 2707 flow_log("%s() fallback completed successfully\n\n", 2708 __func__); 2709 } 2710 } else { 2711 err = -EINVAL; 2712 } 2713 2714 return err; 2715 } 2716 2717 static int aead_enqueue(struct aead_request *req, bool is_encrypt) 2718 { 2719 struct iproc_reqctx_s *rctx = aead_request_ctx(req); 2720 struct crypto_aead *aead = crypto_aead_reqtfm(req); 2721 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead); 2722 int err; 2723 2724 flow_log("%s() enc:%u\n", __func__, is_encrypt); 2725 2726 if (req->assoclen > MAX_ASSOC_SIZE) { 2727 pr_err 2728 ("%s() Error: associated data too long. (%u > %u bytes)\n", 2729 __func__, req->assoclen, MAX_ASSOC_SIZE); 2730 return -EINVAL; 2731 } 2732 2733 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | 2734 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; 2735 rctx->parent = &req->base; 2736 rctx->is_encrypt = is_encrypt; 2737 rctx->bd_suppress = false; 2738 rctx->total_todo = req->cryptlen; 2739 rctx->src_sent = 0; 2740 rctx->total_sent = 0; 2741 rctx->total_received = 0; 2742 rctx->is_sw_hmac = false; 2743 rctx->ctx = ctx; 2744 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message)); 2745 2746 /* assoc data is at start of src sg */ 2747 rctx->assoc = req->src; 2748 2749 /* 2750 * Init current position in src scatterlist to be after assoc data. 2751 * src_skip set to buffer offset where data begins. (Assoc data could 2752 * end in the middle of a buffer.) 2753 */ 2754 if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg, 2755 &rctx->src_skip) < 0) { 2756 pr_err("%s() Error: Unable to find start of src data\n", 2757 __func__); 2758 return -EINVAL; 2759 } 2760 2761 rctx->src_nents = 0; 2762 rctx->dst_nents = 0; 2763 if (req->dst == req->src) { 2764 rctx->dst_sg = rctx->src_sg; 2765 rctx->dst_skip = rctx->src_skip; 2766 } else { 2767 /* 2768 * Expect req->dst to have room for assoc data followed by 2769 * output data and ICV, if encrypt. So initialize dst_sg 2770 * to point beyond assoc len offset. 2771 */ 2772 if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg, 2773 &rctx->dst_skip) < 0) { 2774 pr_err("%s() Error: Unable to find start of dst data\n", 2775 __func__); 2776 return -EINVAL; 2777 } 2778 } 2779 2780 if (ctx->cipher.mode == CIPHER_MODE_CBC || 2781 ctx->cipher.mode == CIPHER_MODE_CTR || 2782 ctx->cipher.mode == CIPHER_MODE_OFB || 2783 ctx->cipher.mode == CIPHER_MODE_XTS || 2784 ctx->cipher.mode == CIPHER_MODE_GCM) { 2785 rctx->iv_ctr_len = 2786 ctx->salt_len + 2787 crypto_aead_ivsize(crypto_aead_reqtfm(req)); 2788 } else if (ctx->cipher.mode == CIPHER_MODE_CCM) { 2789 rctx->iv_ctr_len = CCM_AES_IV_SIZE; 2790 } else { 2791 rctx->iv_ctr_len = 0; 2792 } 2793 2794 rctx->hash_carry_len = 0; 2795 2796 flow_log(" src sg: %p\n", req->src); 2797 flow_log(" rctx->src_sg: %p, src_skip %u\n", 2798 rctx->src_sg, rctx->src_skip); 2799 flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen); 2800 flow_log(" dst sg: %p\n", req->dst); 2801 flow_log(" rctx->dst_sg: %p, dst_skip %u\n", 2802 rctx->dst_sg, rctx->dst_skip); 2803 flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len); 2804 flow_dump(" iv: ", req->iv, rctx->iv_ctr_len); 2805 flow_log(" authkeylen:%u\n", ctx->authkeylen); 2806 flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no"); 2807 2808 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF) 2809 flow_log(" max_payload infinite"); 2810 else 2811 flow_log(" max_payload: %u\n", ctx->max_payload); 2812 2813 if (unlikely(aead_need_fallback(req))) 2814 return aead_do_fallback(req, is_encrypt); 2815 2816 /* 2817 * Do memory allocations for request after fallback check, because if we 2818 * do fallback, we won't call finish_req() to dealloc. 2819 */ 2820 if (rctx->iv_ctr_len) { 2821 if (ctx->salt_len) 2822 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset, 2823 ctx->salt, ctx->salt_len); 2824 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len, 2825 req->iv, 2826 rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset); 2827 } 2828 2829 rctx->chan_idx = select_channel(); 2830 err = handle_aead_req(rctx); 2831 if (err != -EINPROGRESS) 2832 /* synchronous result */ 2833 spu_chunk_cleanup(rctx); 2834 2835 return err; 2836 } 2837 2838 static int aead_authenc_setkey(struct crypto_aead *cipher, 2839 const u8 *key, unsigned int keylen) 2840 { 2841 struct spu_hw *spu = &iproc_priv.spu; 2842 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 2843 struct crypto_tfm *tfm = crypto_aead_tfm(cipher); 2844 struct crypto_authenc_keys keys; 2845 int ret; 2846 2847 flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key, 2848 keylen); 2849 flow_dump(" key: ", key, keylen); 2850 2851 ret = crypto_authenc_extractkeys(&keys, key, keylen); 2852 if (ret) 2853 goto badkey; 2854 2855 if (keys.enckeylen > MAX_KEY_SIZE || 2856 keys.authkeylen > MAX_KEY_SIZE) 2857 goto badkey; 2858 2859 ctx->enckeylen = keys.enckeylen; 2860 ctx->authkeylen = keys.authkeylen; 2861 2862 memcpy(ctx->enckey, keys.enckey, keys.enckeylen); 2863 /* May end up padding auth key. So make sure it's zeroed. */ 2864 memset(ctx->authkey, 0, sizeof(ctx->authkey)); 2865 memcpy(ctx->authkey, keys.authkey, keys.authkeylen); 2866 2867 switch (ctx->alg->cipher_info.alg) { 2868 case CIPHER_ALG_DES: 2869 if (ctx->enckeylen == DES_KEY_SIZE) { 2870 u32 tmp[DES_EXPKEY_WORDS]; 2871 u32 flags = CRYPTO_TFM_RES_WEAK_KEY; 2872 2873 if (des_ekey(tmp, keys.enckey) == 0) { 2874 if (crypto_aead_get_flags(cipher) & 2875 CRYPTO_TFM_REQ_FORBID_WEAK_KEYS) { 2876 crypto_aead_set_flags(cipher, flags); 2877 return -EINVAL; 2878 } 2879 } 2880 2881 ctx->cipher_type = CIPHER_TYPE_DES; 2882 } else { 2883 goto badkey; 2884 } 2885 break; 2886 case CIPHER_ALG_3DES: 2887 if (ctx->enckeylen == (DES_KEY_SIZE * 3)) { 2888 u32 flags; 2889 2890 flags = crypto_aead_get_flags(cipher); 2891 ret = __des3_verify_key(&flags, keys.enckey); 2892 if (unlikely(ret)) { 2893 crypto_aead_set_flags(cipher, flags); 2894 return ret; 2895 } 2896 2897 ctx->cipher_type = CIPHER_TYPE_3DES; 2898 } else { 2899 crypto_aead_set_flags(cipher, 2900 CRYPTO_TFM_RES_BAD_KEY_LEN); 2901 return -EINVAL; 2902 } 2903 break; 2904 case CIPHER_ALG_AES: 2905 switch (ctx->enckeylen) { 2906 case AES_KEYSIZE_128: 2907 ctx->cipher_type = CIPHER_TYPE_AES128; 2908 break; 2909 case AES_KEYSIZE_192: 2910 ctx->cipher_type = CIPHER_TYPE_AES192; 2911 break; 2912 case AES_KEYSIZE_256: 2913 ctx->cipher_type = CIPHER_TYPE_AES256; 2914 break; 2915 default: 2916 goto badkey; 2917 } 2918 break; 2919 case CIPHER_ALG_RC4: 2920 ctx->cipher_type = CIPHER_TYPE_INIT; 2921 break; 2922 default: 2923 pr_err("%s() Error: Unknown cipher alg\n", __func__); 2924 return -EINVAL; 2925 } 2926 2927 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen, 2928 ctx->authkeylen); 2929 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen); 2930 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen); 2931 2932 /* setkey the fallback just in case we needto use it */ 2933 if (ctx->fallback_cipher) { 2934 flow_log(" running fallback setkey()\n"); 2935 2936 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; 2937 ctx->fallback_cipher->base.crt_flags |= 2938 tfm->crt_flags & CRYPTO_TFM_REQ_MASK; 2939 ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen); 2940 if (ret) { 2941 flow_log(" fallback setkey() returned:%d\n", ret); 2942 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; 2943 tfm->crt_flags |= 2944 (ctx->fallback_cipher->base.crt_flags & 2945 CRYPTO_TFM_RES_MASK); 2946 } 2947 } 2948 2949 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 2950 ctx->enckeylen, 2951 false); 2952 2953 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]); 2954 2955 return ret; 2956 2957 badkey: 2958 ctx->enckeylen = 0; 2959 ctx->authkeylen = 0; 2960 ctx->digestsize = 0; 2961 2962 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); 2963 return -EINVAL; 2964 } 2965 2966 static int aead_gcm_ccm_setkey(struct crypto_aead *cipher, 2967 const u8 *key, unsigned int keylen) 2968 { 2969 struct spu_hw *spu = &iproc_priv.spu; 2970 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 2971 struct crypto_tfm *tfm = crypto_aead_tfm(cipher); 2972 2973 int ret = 0; 2974 2975 flow_log("%s() keylen:%u\n", __func__, keylen); 2976 flow_dump(" key: ", key, keylen); 2977 2978 if (!ctx->is_esp) 2979 ctx->digestsize = keylen; 2980 2981 ctx->enckeylen = keylen; 2982 ctx->authkeylen = 0; 2983 memcpy(ctx->enckey, key, ctx->enckeylen); 2984 2985 switch (ctx->enckeylen) { 2986 case AES_KEYSIZE_128: 2987 ctx->cipher_type = CIPHER_TYPE_AES128; 2988 break; 2989 case AES_KEYSIZE_192: 2990 ctx->cipher_type = CIPHER_TYPE_AES192; 2991 break; 2992 case AES_KEYSIZE_256: 2993 ctx->cipher_type = CIPHER_TYPE_AES256; 2994 break; 2995 default: 2996 goto badkey; 2997 } 2998 2999 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen, 3000 ctx->authkeylen); 3001 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen); 3002 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen); 3003 3004 /* setkey the fallback just in case we need to use it */ 3005 if (ctx->fallback_cipher) { 3006 flow_log(" running fallback setkey()\n"); 3007 3008 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; 3009 ctx->fallback_cipher->base.crt_flags |= 3010 tfm->crt_flags & CRYPTO_TFM_REQ_MASK; 3011 ret = crypto_aead_setkey(ctx->fallback_cipher, key, 3012 keylen + ctx->salt_len); 3013 if (ret) { 3014 flow_log(" fallback setkey() returned:%d\n", ret); 3015 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; 3016 tfm->crt_flags |= 3017 (ctx->fallback_cipher->base.crt_flags & 3018 CRYPTO_TFM_RES_MASK); 3019 } 3020 } 3021 3022 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 3023 ctx->enckeylen, 3024 false); 3025 3026 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]); 3027 3028 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen, 3029 ctx->authkeylen); 3030 3031 return ret; 3032 3033 badkey: 3034 ctx->enckeylen = 0; 3035 ctx->authkeylen = 0; 3036 ctx->digestsize = 0; 3037 3038 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); 3039 return -EINVAL; 3040 } 3041 3042 /** 3043 * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES. 3044 * @cipher: AEAD structure 3045 * @key: Key followed by 4 bytes of salt 3046 * @keylen: Length of key plus salt, in bytes 3047 * 3048 * Extracts salt from key and stores it to be prepended to IV on each request. 3049 * Digest is always 16 bytes 3050 * 3051 * Return: Value from generic gcm setkey. 3052 */ 3053 static int aead_gcm_esp_setkey(struct crypto_aead *cipher, 3054 const u8 *key, unsigned int keylen) 3055 { 3056 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 3057 3058 flow_log("%s\n", __func__); 3059 ctx->salt_len = GCM_ESP_SALT_SIZE; 3060 ctx->salt_offset = GCM_ESP_SALT_OFFSET; 3061 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE); 3062 keylen -= GCM_ESP_SALT_SIZE; 3063 ctx->digestsize = GCM_ESP_DIGESTSIZE; 3064 ctx->is_esp = true; 3065 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE); 3066 3067 return aead_gcm_ccm_setkey(cipher, key, keylen); 3068 } 3069 3070 /** 3071 * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC. 3072 * cipher: AEAD structure 3073 * key: Key followed by 4 bytes of salt 3074 * keylen: Length of key plus salt, in bytes 3075 * 3076 * Extracts salt from key and stores it to be prepended to IV on each request. 3077 * Digest is always 16 bytes 3078 * 3079 * Return: Value from generic gcm setkey. 3080 */ 3081 static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher, 3082 const u8 *key, unsigned int keylen) 3083 { 3084 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 3085 3086 flow_log("%s\n", __func__); 3087 ctx->salt_len = GCM_ESP_SALT_SIZE; 3088 ctx->salt_offset = GCM_ESP_SALT_OFFSET; 3089 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE); 3090 keylen -= GCM_ESP_SALT_SIZE; 3091 ctx->digestsize = GCM_ESP_DIGESTSIZE; 3092 ctx->is_esp = true; 3093 ctx->is_rfc4543 = true; 3094 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE); 3095 3096 return aead_gcm_ccm_setkey(cipher, key, keylen); 3097 } 3098 3099 /** 3100 * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES. 3101 * @cipher: AEAD structure 3102 * @key: Key followed by 4 bytes of salt 3103 * @keylen: Length of key plus salt, in bytes 3104 * 3105 * Extracts salt from key and stores it to be prepended to IV on each request. 3106 * Digest is always 16 bytes 3107 * 3108 * Return: Value from generic ccm setkey. 3109 */ 3110 static int aead_ccm_esp_setkey(struct crypto_aead *cipher, 3111 const u8 *key, unsigned int keylen) 3112 { 3113 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 3114 3115 flow_log("%s\n", __func__); 3116 ctx->salt_len = CCM_ESP_SALT_SIZE; 3117 ctx->salt_offset = CCM_ESP_SALT_OFFSET; 3118 memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE); 3119 keylen -= CCM_ESP_SALT_SIZE; 3120 ctx->is_esp = true; 3121 flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE); 3122 3123 return aead_gcm_ccm_setkey(cipher, key, keylen); 3124 } 3125 3126 static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize) 3127 { 3128 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher); 3129 int ret = 0; 3130 3131 flow_log("%s() authkeylen:%u authsize:%u\n", 3132 __func__, ctx->authkeylen, authsize); 3133 3134 ctx->digestsize = authsize; 3135 3136 /* setkey the fallback just in case we needto use it */ 3137 if (ctx->fallback_cipher) { 3138 flow_log(" running fallback setauth()\n"); 3139 3140 ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize); 3141 if (ret) 3142 flow_log(" fallback setauth() returned:%d\n", ret); 3143 } 3144 3145 return ret; 3146 } 3147 3148 static int aead_encrypt(struct aead_request *req) 3149 { 3150 flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen, 3151 req->cryptlen); 3152 dump_sg(req->src, 0, req->cryptlen + req->assoclen); 3153 flow_log(" assoc_len:%u\n", req->assoclen); 3154 3155 return aead_enqueue(req, true); 3156 } 3157 3158 static int aead_decrypt(struct aead_request *req) 3159 { 3160 flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen); 3161 dump_sg(req->src, 0, req->cryptlen + req->assoclen); 3162 flow_log(" assoc_len:%u\n", req->assoclen); 3163 3164 return aead_enqueue(req, false); 3165 } 3166 3167 /* ==================== Supported Cipher Algorithms ==================== */ 3168 3169 static struct iproc_alg_s driver_algs[] = { 3170 { 3171 .type = CRYPTO_ALG_TYPE_AEAD, 3172 .alg.aead = { 3173 .base = { 3174 .cra_name = "gcm(aes)", 3175 .cra_driver_name = "gcm-aes-iproc", 3176 .cra_blocksize = AES_BLOCK_SIZE, 3177 .cra_flags = CRYPTO_ALG_NEED_FALLBACK 3178 }, 3179 .setkey = aead_gcm_ccm_setkey, 3180 .ivsize = GCM_AES_IV_SIZE, 3181 .maxauthsize = AES_BLOCK_SIZE, 3182 }, 3183 .cipher_info = { 3184 .alg = CIPHER_ALG_AES, 3185 .mode = CIPHER_MODE_GCM, 3186 }, 3187 .auth_info = { 3188 .alg = HASH_ALG_AES, 3189 .mode = HASH_MODE_GCM, 3190 }, 3191 .auth_first = 0, 3192 }, 3193 { 3194 .type = CRYPTO_ALG_TYPE_AEAD, 3195 .alg.aead = { 3196 .base = { 3197 .cra_name = "ccm(aes)", 3198 .cra_driver_name = "ccm-aes-iproc", 3199 .cra_blocksize = AES_BLOCK_SIZE, 3200 .cra_flags = CRYPTO_ALG_NEED_FALLBACK 3201 }, 3202 .setkey = aead_gcm_ccm_setkey, 3203 .ivsize = CCM_AES_IV_SIZE, 3204 .maxauthsize = AES_BLOCK_SIZE, 3205 }, 3206 .cipher_info = { 3207 .alg = CIPHER_ALG_AES, 3208 .mode = CIPHER_MODE_CCM, 3209 }, 3210 .auth_info = { 3211 .alg = HASH_ALG_AES, 3212 .mode = HASH_MODE_CCM, 3213 }, 3214 .auth_first = 0, 3215 }, 3216 { 3217 .type = CRYPTO_ALG_TYPE_AEAD, 3218 .alg.aead = { 3219 .base = { 3220 .cra_name = "rfc4106(gcm(aes))", 3221 .cra_driver_name = "gcm-aes-esp-iproc", 3222 .cra_blocksize = AES_BLOCK_SIZE, 3223 .cra_flags = CRYPTO_ALG_NEED_FALLBACK 3224 }, 3225 .setkey = aead_gcm_esp_setkey, 3226 .ivsize = GCM_RFC4106_IV_SIZE, 3227 .maxauthsize = AES_BLOCK_SIZE, 3228 }, 3229 .cipher_info = { 3230 .alg = CIPHER_ALG_AES, 3231 .mode = CIPHER_MODE_GCM, 3232 }, 3233 .auth_info = { 3234 .alg = HASH_ALG_AES, 3235 .mode = HASH_MODE_GCM, 3236 }, 3237 .auth_first = 0, 3238 }, 3239 { 3240 .type = CRYPTO_ALG_TYPE_AEAD, 3241 .alg.aead = { 3242 .base = { 3243 .cra_name = "rfc4309(ccm(aes))", 3244 .cra_driver_name = "ccm-aes-esp-iproc", 3245 .cra_blocksize = AES_BLOCK_SIZE, 3246 .cra_flags = CRYPTO_ALG_NEED_FALLBACK 3247 }, 3248 .setkey = aead_ccm_esp_setkey, 3249 .ivsize = CCM_AES_IV_SIZE, 3250 .maxauthsize = AES_BLOCK_SIZE, 3251 }, 3252 .cipher_info = { 3253 .alg = CIPHER_ALG_AES, 3254 .mode = CIPHER_MODE_CCM, 3255 }, 3256 .auth_info = { 3257 .alg = HASH_ALG_AES, 3258 .mode = HASH_MODE_CCM, 3259 }, 3260 .auth_first = 0, 3261 }, 3262 { 3263 .type = CRYPTO_ALG_TYPE_AEAD, 3264 .alg.aead = { 3265 .base = { 3266 .cra_name = "rfc4543(gcm(aes))", 3267 .cra_driver_name = "gmac-aes-esp-iproc", 3268 .cra_blocksize = AES_BLOCK_SIZE, 3269 .cra_flags = CRYPTO_ALG_NEED_FALLBACK 3270 }, 3271 .setkey = rfc4543_gcm_esp_setkey, 3272 .ivsize = GCM_RFC4106_IV_SIZE, 3273 .maxauthsize = AES_BLOCK_SIZE, 3274 }, 3275 .cipher_info = { 3276 .alg = CIPHER_ALG_AES, 3277 .mode = CIPHER_MODE_GCM, 3278 }, 3279 .auth_info = { 3280 .alg = HASH_ALG_AES, 3281 .mode = HASH_MODE_GCM, 3282 }, 3283 .auth_first = 0, 3284 }, 3285 { 3286 .type = CRYPTO_ALG_TYPE_AEAD, 3287 .alg.aead = { 3288 .base = { 3289 .cra_name = "authenc(hmac(md5),cbc(aes))", 3290 .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc", 3291 .cra_blocksize = AES_BLOCK_SIZE, 3292 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3293 }, 3294 .setkey = aead_authenc_setkey, 3295 .ivsize = AES_BLOCK_SIZE, 3296 .maxauthsize = MD5_DIGEST_SIZE, 3297 }, 3298 .cipher_info = { 3299 .alg = CIPHER_ALG_AES, 3300 .mode = CIPHER_MODE_CBC, 3301 }, 3302 .auth_info = { 3303 .alg = HASH_ALG_MD5, 3304 .mode = HASH_MODE_HMAC, 3305 }, 3306 .auth_first = 0, 3307 }, 3308 { 3309 .type = CRYPTO_ALG_TYPE_AEAD, 3310 .alg.aead = { 3311 .base = { 3312 .cra_name = "authenc(hmac(sha1),cbc(aes))", 3313 .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc", 3314 .cra_blocksize = AES_BLOCK_SIZE, 3315 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3316 }, 3317 .setkey = aead_authenc_setkey, 3318 .ivsize = AES_BLOCK_SIZE, 3319 .maxauthsize = SHA1_DIGEST_SIZE, 3320 }, 3321 .cipher_info = { 3322 .alg = CIPHER_ALG_AES, 3323 .mode = CIPHER_MODE_CBC, 3324 }, 3325 .auth_info = { 3326 .alg = HASH_ALG_SHA1, 3327 .mode = HASH_MODE_HMAC, 3328 }, 3329 .auth_first = 0, 3330 }, 3331 { 3332 .type = CRYPTO_ALG_TYPE_AEAD, 3333 .alg.aead = { 3334 .base = { 3335 .cra_name = "authenc(hmac(sha256),cbc(aes))", 3336 .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc", 3337 .cra_blocksize = AES_BLOCK_SIZE, 3338 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3339 }, 3340 .setkey = aead_authenc_setkey, 3341 .ivsize = AES_BLOCK_SIZE, 3342 .maxauthsize = SHA256_DIGEST_SIZE, 3343 }, 3344 .cipher_info = { 3345 .alg = CIPHER_ALG_AES, 3346 .mode = CIPHER_MODE_CBC, 3347 }, 3348 .auth_info = { 3349 .alg = HASH_ALG_SHA256, 3350 .mode = HASH_MODE_HMAC, 3351 }, 3352 .auth_first = 0, 3353 }, 3354 { 3355 .type = CRYPTO_ALG_TYPE_AEAD, 3356 .alg.aead = { 3357 .base = { 3358 .cra_name = "authenc(hmac(md5),cbc(des))", 3359 .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc", 3360 .cra_blocksize = DES_BLOCK_SIZE, 3361 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3362 }, 3363 .setkey = aead_authenc_setkey, 3364 .ivsize = DES_BLOCK_SIZE, 3365 .maxauthsize = MD5_DIGEST_SIZE, 3366 }, 3367 .cipher_info = { 3368 .alg = CIPHER_ALG_DES, 3369 .mode = CIPHER_MODE_CBC, 3370 }, 3371 .auth_info = { 3372 .alg = HASH_ALG_MD5, 3373 .mode = HASH_MODE_HMAC, 3374 }, 3375 .auth_first = 0, 3376 }, 3377 { 3378 .type = CRYPTO_ALG_TYPE_AEAD, 3379 .alg.aead = { 3380 .base = { 3381 .cra_name = "authenc(hmac(sha1),cbc(des))", 3382 .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc", 3383 .cra_blocksize = DES_BLOCK_SIZE, 3384 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3385 }, 3386 .setkey = aead_authenc_setkey, 3387 .ivsize = DES_BLOCK_SIZE, 3388 .maxauthsize = SHA1_DIGEST_SIZE, 3389 }, 3390 .cipher_info = { 3391 .alg = CIPHER_ALG_DES, 3392 .mode = CIPHER_MODE_CBC, 3393 }, 3394 .auth_info = { 3395 .alg = HASH_ALG_SHA1, 3396 .mode = HASH_MODE_HMAC, 3397 }, 3398 .auth_first = 0, 3399 }, 3400 { 3401 .type = CRYPTO_ALG_TYPE_AEAD, 3402 .alg.aead = { 3403 .base = { 3404 .cra_name = "authenc(hmac(sha224),cbc(des))", 3405 .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc", 3406 .cra_blocksize = DES_BLOCK_SIZE, 3407 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3408 }, 3409 .setkey = aead_authenc_setkey, 3410 .ivsize = DES_BLOCK_SIZE, 3411 .maxauthsize = SHA224_DIGEST_SIZE, 3412 }, 3413 .cipher_info = { 3414 .alg = CIPHER_ALG_DES, 3415 .mode = CIPHER_MODE_CBC, 3416 }, 3417 .auth_info = { 3418 .alg = HASH_ALG_SHA224, 3419 .mode = HASH_MODE_HMAC, 3420 }, 3421 .auth_first = 0, 3422 }, 3423 { 3424 .type = CRYPTO_ALG_TYPE_AEAD, 3425 .alg.aead = { 3426 .base = { 3427 .cra_name = "authenc(hmac(sha256),cbc(des))", 3428 .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc", 3429 .cra_blocksize = DES_BLOCK_SIZE, 3430 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3431 }, 3432 .setkey = aead_authenc_setkey, 3433 .ivsize = DES_BLOCK_SIZE, 3434 .maxauthsize = SHA256_DIGEST_SIZE, 3435 }, 3436 .cipher_info = { 3437 .alg = CIPHER_ALG_DES, 3438 .mode = CIPHER_MODE_CBC, 3439 }, 3440 .auth_info = { 3441 .alg = HASH_ALG_SHA256, 3442 .mode = HASH_MODE_HMAC, 3443 }, 3444 .auth_first = 0, 3445 }, 3446 { 3447 .type = CRYPTO_ALG_TYPE_AEAD, 3448 .alg.aead = { 3449 .base = { 3450 .cra_name = "authenc(hmac(sha384),cbc(des))", 3451 .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc", 3452 .cra_blocksize = DES_BLOCK_SIZE, 3453 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3454 }, 3455 .setkey = aead_authenc_setkey, 3456 .ivsize = DES_BLOCK_SIZE, 3457 .maxauthsize = SHA384_DIGEST_SIZE, 3458 }, 3459 .cipher_info = { 3460 .alg = CIPHER_ALG_DES, 3461 .mode = CIPHER_MODE_CBC, 3462 }, 3463 .auth_info = { 3464 .alg = HASH_ALG_SHA384, 3465 .mode = HASH_MODE_HMAC, 3466 }, 3467 .auth_first = 0, 3468 }, 3469 { 3470 .type = CRYPTO_ALG_TYPE_AEAD, 3471 .alg.aead = { 3472 .base = { 3473 .cra_name = "authenc(hmac(sha512),cbc(des))", 3474 .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc", 3475 .cra_blocksize = DES_BLOCK_SIZE, 3476 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3477 }, 3478 .setkey = aead_authenc_setkey, 3479 .ivsize = DES_BLOCK_SIZE, 3480 .maxauthsize = SHA512_DIGEST_SIZE, 3481 }, 3482 .cipher_info = { 3483 .alg = CIPHER_ALG_DES, 3484 .mode = CIPHER_MODE_CBC, 3485 }, 3486 .auth_info = { 3487 .alg = HASH_ALG_SHA512, 3488 .mode = HASH_MODE_HMAC, 3489 }, 3490 .auth_first = 0, 3491 }, 3492 { 3493 .type = CRYPTO_ALG_TYPE_AEAD, 3494 .alg.aead = { 3495 .base = { 3496 .cra_name = "authenc(hmac(md5),cbc(des3_ede))", 3497 .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc", 3498 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3499 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3500 }, 3501 .setkey = aead_authenc_setkey, 3502 .ivsize = DES3_EDE_BLOCK_SIZE, 3503 .maxauthsize = MD5_DIGEST_SIZE, 3504 }, 3505 .cipher_info = { 3506 .alg = CIPHER_ALG_3DES, 3507 .mode = CIPHER_MODE_CBC, 3508 }, 3509 .auth_info = { 3510 .alg = HASH_ALG_MD5, 3511 .mode = HASH_MODE_HMAC, 3512 }, 3513 .auth_first = 0, 3514 }, 3515 { 3516 .type = CRYPTO_ALG_TYPE_AEAD, 3517 .alg.aead = { 3518 .base = { 3519 .cra_name = "authenc(hmac(sha1),cbc(des3_ede))", 3520 .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc", 3521 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3522 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3523 }, 3524 .setkey = aead_authenc_setkey, 3525 .ivsize = DES3_EDE_BLOCK_SIZE, 3526 .maxauthsize = SHA1_DIGEST_SIZE, 3527 }, 3528 .cipher_info = { 3529 .alg = CIPHER_ALG_3DES, 3530 .mode = CIPHER_MODE_CBC, 3531 }, 3532 .auth_info = { 3533 .alg = HASH_ALG_SHA1, 3534 .mode = HASH_MODE_HMAC, 3535 }, 3536 .auth_first = 0, 3537 }, 3538 { 3539 .type = CRYPTO_ALG_TYPE_AEAD, 3540 .alg.aead = { 3541 .base = { 3542 .cra_name = "authenc(hmac(sha224),cbc(des3_ede))", 3543 .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc", 3544 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3545 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3546 }, 3547 .setkey = aead_authenc_setkey, 3548 .ivsize = DES3_EDE_BLOCK_SIZE, 3549 .maxauthsize = SHA224_DIGEST_SIZE, 3550 }, 3551 .cipher_info = { 3552 .alg = CIPHER_ALG_3DES, 3553 .mode = CIPHER_MODE_CBC, 3554 }, 3555 .auth_info = { 3556 .alg = HASH_ALG_SHA224, 3557 .mode = HASH_MODE_HMAC, 3558 }, 3559 .auth_first = 0, 3560 }, 3561 { 3562 .type = CRYPTO_ALG_TYPE_AEAD, 3563 .alg.aead = { 3564 .base = { 3565 .cra_name = "authenc(hmac(sha256),cbc(des3_ede))", 3566 .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc", 3567 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3568 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3569 }, 3570 .setkey = aead_authenc_setkey, 3571 .ivsize = DES3_EDE_BLOCK_SIZE, 3572 .maxauthsize = SHA256_DIGEST_SIZE, 3573 }, 3574 .cipher_info = { 3575 .alg = CIPHER_ALG_3DES, 3576 .mode = CIPHER_MODE_CBC, 3577 }, 3578 .auth_info = { 3579 .alg = HASH_ALG_SHA256, 3580 .mode = HASH_MODE_HMAC, 3581 }, 3582 .auth_first = 0, 3583 }, 3584 { 3585 .type = CRYPTO_ALG_TYPE_AEAD, 3586 .alg.aead = { 3587 .base = { 3588 .cra_name = "authenc(hmac(sha384),cbc(des3_ede))", 3589 .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc", 3590 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3591 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3592 }, 3593 .setkey = aead_authenc_setkey, 3594 .ivsize = DES3_EDE_BLOCK_SIZE, 3595 .maxauthsize = SHA384_DIGEST_SIZE, 3596 }, 3597 .cipher_info = { 3598 .alg = CIPHER_ALG_3DES, 3599 .mode = CIPHER_MODE_CBC, 3600 }, 3601 .auth_info = { 3602 .alg = HASH_ALG_SHA384, 3603 .mode = HASH_MODE_HMAC, 3604 }, 3605 .auth_first = 0, 3606 }, 3607 { 3608 .type = CRYPTO_ALG_TYPE_AEAD, 3609 .alg.aead = { 3610 .base = { 3611 .cra_name = "authenc(hmac(sha512),cbc(des3_ede))", 3612 .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc", 3613 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3614 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC 3615 }, 3616 .setkey = aead_authenc_setkey, 3617 .ivsize = DES3_EDE_BLOCK_SIZE, 3618 .maxauthsize = SHA512_DIGEST_SIZE, 3619 }, 3620 .cipher_info = { 3621 .alg = CIPHER_ALG_3DES, 3622 .mode = CIPHER_MODE_CBC, 3623 }, 3624 .auth_info = { 3625 .alg = HASH_ALG_SHA512, 3626 .mode = HASH_MODE_HMAC, 3627 }, 3628 .auth_first = 0, 3629 }, 3630 3631 /* ABLKCIPHER algorithms. */ 3632 { 3633 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3634 .alg.crypto = { 3635 .cra_name = "ecb(arc4)", 3636 .cra_driver_name = "ecb-arc4-iproc", 3637 .cra_blocksize = ARC4_BLOCK_SIZE, 3638 .cra_ablkcipher = { 3639 .min_keysize = ARC4_MIN_KEY_SIZE, 3640 .max_keysize = ARC4_MAX_KEY_SIZE, 3641 .ivsize = 0, 3642 } 3643 }, 3644 .cipher_info = { 3645 .alg = CIPHER_ALG_RC4, 3646 .mode = CIPHER_MODE_NONE, 3647 }, 3648 .auth_info = { 3649 .alg = HASH_ALG_NONE, 3650 .mode = HASH_MODE_NONE, 3651 }, 3652 }, 3653 { 3654 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3655 .alg.crypto = { 3656 .cra_name = "ofb(des)", 3657 .cra_driver_name = "ofb-des-iproc", 3658 .cra_blocksize = DES_BLOCK_SIZE, 3659 .cra_ablkcipher = { 3660 .min_keysize = DES_KEY_SIZE, 3661 .max_keysize = DES_KEY_SIZE, 3662 .ivsize = DES_BLOCK_SIZE, 3663 } 3664 }, 3665 .cipher_info = { 3666 .alg = CIPHER_ALG_DES, 3667 .mode = CIPHER_MODE_OFB, 3668 }, 3669 .auth_info = { 3670 .alg = HASH_ALG_NONE, 3671 .mode = HASH_MODE_NONE, 3672 }, 3673 }, 3674 { 3675 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3676 .alg.crypto = { 3677 .cra_name = "cbc(des)", 3678 .cra_driver_name = "cbc-des-iproc", 3679 .cra_blocksize = DES_BLOCK_SIZE, 3680 .cra_ablkcipher = { 3681 .min_keysize = DES_KEY_SIZE, 3682 .max_keysize = DES_KEY_SIZE, 3683 .ivsize = DES_BLOCK_SIZE, 3684 } 3685 }, 3686 .cipher_info = { 3687 .alg = CIPHER_ALG_DES, 3688 .mode = CIPHER_MODE_CBC, 3689 }, 3690 .auth_info = { 3691 .alg = HASH_ALG_NONE, 3692 .mode = HASH_MODE_NONE, 3693 }, 3694 }, 3695 { 3696 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3697 .alg.crypto = { 3698 .cra_name = "ecb(des)", 3699 .cra_driver_name = "ecb-des-iproc", 3700 .cra_blocksize = DES_BLOCK_SIZE, 3701 .cra_ablkcipher = { 3702 .min_keysize = DES_KEY_SIZE, 3703 .max_keysize = DES_KEY_SIZE, 3704 .ivsize = 0, 3705 } 3706 }, 3707 .cipher_info = { 3708 .alg = CIPHER_ALG_DES, 3709 .mode = CIPHER_MODE_ECB, 3710 }, 3711 .auth_info = { 3712 .alg = HASH_ALG_NONE, 3713 .mode = HASH_MODE_NONE, 3714 }, 3715 }, 3716 { 3717 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3718 .alg.crypto = { 3719 .cra_name = "ofb(des3_ede)", 3720 .cra_driver_name = "ofb-des3-iproc", 3721 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3722 .cra_ablkcipher = { 3723 .min_keysize = DES3_EDE_KEY_SIZE, 3724 .max_keysize = DES3_EDE_KEY_SIZE, 3725 .ivsize = DES3_EDE_BLOCK_SIZE, 3726 } 3727 }, 3728 .cipher_info = { 3729 .alg = CIPHER_ALG_3DES, 3730 .mode = CIPHER_MODE_OFB, 3731 }, 3732 .auth_info = { 3733 .alg = HASH_ALG_NONE, 3734 .mode = HASH_MODE_NONE, 3735 }, 3736 }, 3737 { 3738 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3739 .alg.crypto = { 3740 .cra_name = "cbc(des3_ede)", 3741 .cra_driver_name = "cbc-des3-iproc", 3742 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3743 .cra_ablkcipher = { 3744 .min_keysize = DES3_EDE_KEY_SIZE, 3745 .max_keysize = DES3_EDE_KEY_SIZE, 3746 .ivsize = DES3_EDE_BLOCK_SIZE, 3747 } 3748 }, 3749 .cipher_info = { 3750 .alg = CIPHER_ALG_3DES, 3751 .mode = CIPHER_MODE_CBC, 3752 }, 3753 .auth_info = { 3754 .alg = HASH_ALG_NONE, 3755 .mode = HASH_MODE_NONE, 3756 }, 3757 }, 3758 { 3759 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3760 .alg.crypto = { 3761 .cra_name = "ecb(des3_ede)", 3762 .cra_driver_name = "ecb-des3-iproc", 3763 .cra_blocksize = DES3_EDE_BLOCK_SIZE, 3764 .cra_ablkcipher = { 3765 .min_keysize = DES3_EDE_KEY_SIZE, 3766 .max_keysize = DES3_EDE_KEY_SIZE, 3767 .ivsize = 0, 3768 } 3769 }, 3770 .cipher_info = { 3771 .alg = CIPHER_ALG_3DES, 3772 .mode = CIPHER_MODE_ECB, 3773 }, 3774 .auth_info = { 3775 .alg = HASH_ALG_NONE, 3776 .mode = HASH_MODE_NONE, 3777 }, 3778 }, 3779 { 3780 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3781 .alg.crypto = { 3782 .cra_name = "ofb(aes)", 3783 .cra_driver_name = "ofb-aes-iproc", 3784 .cra_blocksize = AES_BLOCK_SIZE, 3785 .cra_ablkcipher = { 3786 .min_keysize = AES_MIN_KEY_SIZE, 3787 .max_keysize = AES_MAX_KEY_SIZE, 3788 .ivsize = AES_BLOCK_SIZE, 3789 } 3790 }, 3791 .cipher_info = { 3792 .alg = CIPHER_ALG_AES, 3793 .mode = CIPHER_MODE_OFB, 3794 }, 3795 .auth_info = { 3796 .alg = HASH_ALG_NONE, 3797 .mode = HASH_MODE_NONE, 3798 }, 3799 }, 3800 { 3801 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3802 .alg.crypto = { 3803 .cra_name = "cbc(aes)", 3804 .cra_driver_name = "cbc-aes-iproc", 3805 .cra_blocksize = AES_BLOCK_SIZE, 3806 .cra_ablkcipher = { 3807 .min_keysize = AES_MIN_KEY_SIZE, 3808 .max_keysize = AES_MAX_KEY_SIZE, 3809 .ivsize = AES_BLOCK_SIZE, 3810 } 3811 }, 3812 .cipher_info = { 3813 .alg = CIPHER_ALG_AES, 3814 .mode = CIPHER_MODE_CBC, 3815 }, 3816 .auth_info = { 3817 .alg = HASH_ALG_NONE, 3818 .mode = HASH_MODE_NONE, 3819 }, 3820 }, 3821 { 3822 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3823 .alg.crypto = { 3824 .cra_name = "ecb(aes)", 3825 .cra_driver_name = "ecb-aes-iproc", 3826 .cra_blocksize = AES_BLOCK_SIZE, 3827 .cra_ablkcipher = { 3828 .min_keysize = AES_MIN_KEY_SIZE, 3829 .max_keysize = AES_MAX_KEY_SIZE, 3830 .ivsize = 0, 3831 } 3832 }, 3833 .cipher_info = { 3834 .alg = CIPHER_ALG_AES, 3835 .mode = CIPHER_MODE_ECB, 3836 }, 3837 .auth_info = { 3838 .alg = HASH_ALG_NONE, 3839 .mode = HASH_MODE_NONE, 3840 }, 3841 }, 3842 { 3843 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3844 .alg.crypto = { 3845 .cra_name = "ctr(aes)", 3846 .cra_driver_name = "ctr-aes-iproc", 3847 .cra_blocksize = AES_BLOCK_SIZE, 3848 .cra_ablkcipher = { 3849 .min_keysize = AES_MIN_KEY_SIZE, 3850 .max_keysize = AES_MAX_KEY_SIZE, 3851 .ivsize = AES_BLOCK_SIZE, 3852 } 3853 }, 3854 .cipher_info = { 3855 .alg = CIPHER_ALG_AES, 3856 .mode = CIPHER_MODE_CTR, 3857 }, 3858 .auth_info = { 3859 .alg = HASH_ALG_NONE, 3860 .mode = HASH_MODE_NONE, 3861 }, 3862 }, 3863 { 3864 .type = CRYPTO_ALG_TYPE_ABLKCIPHER, 3865 .alg.crypto = { 3866 .cra_name = "xts(aes)", 3867 .cra_driver_name = "xts-aes-iproc", 3868 .cra_blocksize = AES_BLOCK_SIZE, 3869 .cra_ablkcipher = { 3870 .min_keysize = 2 * AES_MIN_KEY_SIZE, 3871 .max_keysize = 2 * AES_MAX_KEY_SIZE, 3872 .ivsize = AES_BLOCK_SIZE, 3873 } 3874 }, 3875 .cipher_info = { 3876 .alg = CIPHER_ALG_AES, 3877 .mode = CIPHER_MODE_XTS, 3878 }, 3879 .auth_info = { 3880 .alg = HASH_ALG_NONE, 3881 .mode = HASH_MODE_NONE, 3882 }, 3883 }, 3884 3885 /* AHASH algorithms. */ 3886 { 3887 .type = CRYPTO_ALG_TYPE_AHASH, 3888 .alg.hash = { 3889 .halg.digestsize = MD5_DIGEST_SIZE, 3890 .halg.base = { 3891 .cra_name = "md5", 3892 .cra_driver_name = "md5-iproc", 3893 .cra_blocksize = MD5_BLOCK_WORDS * 4, 3894 .cra_flags = CRYPTO_ALG_ASYNC, 3895 } 3896 }, 3897 .cipher_info = { 3898 .alg = CIPHER_ALG_NONE, 3899 .mode = CIPHER_MODE_NONE, 3900 }, 3901 .auth_info = { 3902 .alg = HASH_ALG_MD5, 3903 .mode = HASH_MODE_HASH, 3904 }, 3905 }, 3906 { 3907 .type = CRYPTO_ALG_TYPE_AHASH, 3908 .alg.hash = { 3909 .halg.digestsize = MD5_DIGEST_SIZE, 3910 .halg.base = { 3911 .cra_name = "hmac(md5)", 3912 .cra_driver_name = "hmac-md5-iproc", 3913 .cra_blocksize = MD5_BLOCK_WORDS * 4, 3914 } 3915 }, 3916 .cipher_info = { 3917 .alg = CIPHER_ALG_NONE, 3918 .mode = CIPHER_MODE_NONE, 3919 }, 3920 .auth_info = { 3921 .alg = HASH_ALG_MD5, 3922 .mode = HASH_MODE_HMAC, 3923 }, 3924 }, 3925 {.type = CRYPTO_ALG_TYPE_AHASH, 3926 .alg.hash = { 3927 .halg.digestsize = SHA1_DIGEST_SIZE, 3928 .halg.base = { 3929 .cra_name = "sha1", 3930 .cra_driver_name = "sha1-iproc", 3931 .cra_blocksize = SHA1_BLOCK_SIZE, 3932 } 3933 }, 3934 .cipher_info = { 3935 .alg = CIPHER_ALG_NONE, 3936 .mode = CIPHER_MODE_NONE, 3937 }, 3938 .auth_info = { 3939 .alg = HASH_ALG_SHA1, 3940 .mode = HASH_MODE_HASH, 3941 }, 3942 }, 3943 {.type = CRYPTO_ALG_TYPE_AHASH, 3944 .alg.hash = { 3945 .halg.digestsize = SHA1_DIGEST_SIZE, 3946 .halg.base = { 3947 .cra_name = "hmac(sha1)", 3948 .cra_driver_name = "hmac-sha1-iproc", 3949 .cra_blocksize = SHA1_BLOCK_SIZE, 3950 } 3951 }, 3952 .cipher_info = { 3953 .alg = CIPHER_ALG_NONE, 3954 .mode = CIPHER_MODE_NONE, 3955 }, 3956 .auth_info = { 3957 .alg = HASH_ALG_SHA1, 3958 .mode = HASH_MODE_HMAC, 3959 }, 3960 }, 3961 {.type = CRYPTO_ALG_TYPE_AHASH, 3962 .alg.hash = { 3963 .halg.digestsize = SHA224_DIGEST_SIZE, 3964 .halg.base = { 3965 .cra_name = "sha224", 3966 .cra_driver_name = "sha224-iproc", 3967 .cra_blocksize = SHA224_BLOCK_SIZE, 3968 } 3969 }, 3970 .cipher_info = { 3971 .alg = CIPHER_ALG_NONE, 3972 .mode = CIPHER_MODE_NONE, 3973 }, 3974 .auth_info = { 3975 .alg = HASH_ALG_SHA224, 3976 .mode = HASH_MODE_HASH, 3977 }, 3978 }, 3979 {.type = CRYPTO_ALG_TYPE_AHASH, 3980 .alg.hash = { 3981 .halg.digestsize = SHA224_DIGEST_SIZE, 3982 .halg.base = { 3983 .cra_name = "hmac(sha224)", 3984 .cra_driver_name = "hmac-sha224-iproc", 3985 .cra_blocksize = SHA224_BLOCK_SIZE, 3986 } 3987 }, 3988 .cipher_info = { 3989 .alg = CIPHER_ALG_NONE, 3990 .mode = CIPHER_MODE_NONE, 3991 }, 3992 .auth_info = { 3993 .alg = HASH_ALG_SHA224, 3994 .mode = HASH_MODE_HMAC, 3995 }, 3996 }, 3997 {.type = CRYPTO_ALG_TYPE_AHASH, 3998 .alg.hash = { 3999 .halg.digestsize = SHA256_DIGEST_SIZE, 4000 .halg.base = { 4001 .cra_name = "sha256", 4002 .cra_driver_name = "sha256-iproc", 4003 .cra_blocksize = SHA256_BLOCK_SIZE, 4004 } 4005 }, 4006 .cipher_info = { 4007 .alg = CIPHER_ALG_NONE, 4008 .mode = CIPHER_MODE_NONE, 4009 }, 4010 .auth_info = { 4011 .alg = HASH_ALG_SHA256, 4012 .mode = HASH_MODE_HASH, 4013 }, 4014 }, 4015 {.type = CRYPTO_ALG_TYPE_AHASH, 4016 .alg.hash = { 4017 .halg.digestsize = SHA256_DIGEST_SIZE, 4018 .halg.base = { 4019 .cra_name = "hmac(sha256)", 4020 .cra_driver_name = "hmac-sha256-iproc", 4021 .cra_blocksize = SHA256_BLOCK_SIZE, 4022 } 4023 }, 4024 .cipher_info = { 4025 .alg = CIPHER_ALG_NONE, 4026 .mode = CIPHER_MODE_NONE, 4027 }, 4028 .auth_info = { 4029 .alg = HASH_ALG_SHA256, 4030 .mode = HASH_MODE_HMAC, 4031 }, 4032 }, 4033 { 4034 .type = CRYPTO_ALG_TYPE_AHASH, 4035 .alg.hash = { 4036 .halg.digestsize = SHA384_DIGEST_SIZE, 4037 .halg.base = { 4038 .cra_name = "sha384", 4039 .cra_driver_name = "sha384-iproc", 4040 .cra_blocksize = SHA384_BLOCK_SIZE, 4041 } 4042 }, 4043 .cipher_info = { 4044 .alg = CIPHER_ALG_NONE, 4045 .mode = CIPHER_MODE_NONE, 4046 }, 4047 .auth_info = { 4048 .alg = HASH_ALG_SHA384, 4049 .mode = HASH_MODE_HASH, 4050 }, 4051 }, 4052 { 4053 .type = CRYPTO_ALG_TYPE_AHASH, 4054 .alg.hash = { 4055 .halg.digestsize = SHA384_DIGEST_SIZE, 4056 .halg.base = { 4057 .cra_name = "hmac(sha384)", 4058 .cra_driver_name = "hmac-sha384-iproc", 4059 .cra_blocksize = SHA384_BLOCK_SIZE, 4060 } 4061 }, 4062 .cipher_info = { 4063 .alg = CIPHER_ALG_NONE, 4064 .mode = CIPHER_MODE_NONE, 4065 }, 4066 .auth_info = { 4067 .alg = HASH_ALG_SHA384, 4068 .mode = HASH_MODE_HMAC, 4069 }, 4070 }, 4071 { 4072 .type = CRYPTO_ALG_TYPE_AHASH, 4073 .alg.hash = { 4074 .halg.digestsize = SHA512_DIGEST_SIZE, 4075 .halg.base = { 4076 .cra_name = "sha512", 4077 .cra_driver_name = "sha512-iproc", 4078 .cra_blocksize = SHA512_BLOCK_SIZE, 4079 } 4080 }, 4081 .cipher_info = { 4082 .alg = CIPHER_ALG_NONE, 4083 .mode = CIPHER_MODE_NONE, 4084 }, 4085 .auth_info = { 4086 .alg = HASH_ALG_SHA512, 4087 .mode = HASH_MODE_HASH, 4088 }, 4089 }, 4090 { 4091 .type = CRYPTO_ALG_TYPE_AHASH, 4092 .alg.hash = { 4093 .halg.digestsize = SHA512_DIGEST_SIZE, 4094 .halg.base = { 4095 .cra_name = "hmac(sha512)", 4096 .cra_driver_name = "hmac-sha512-iproc", 4097 .cra_blocksize = SHA512_BLOCK_SIZE, 4098 } 4099 }, 4100 .cipher_info = { 4101 .alg = CIPHER_ALG_NONE, 4102 .mode = CIPHER_MODE_NONE, 4103 }, 4104 .auth_info = { 4105 .alg = HASH_ALG_SHA512, 4106 .mode = HASH_MODE_HMAC, 4107 }, 4108 }, 4109 { 4110 .type = CRYPTO_ALG_TYPE_AHASH, 4111 .alg.hash = { 4112 .halg.digestsize = SHA3_224_DIGEST_SIZE, 4113 .halg.base = { 4114 .cra_name = "sha3-224", 4115 .cra_driver_name = "sha3-224-iproc", 4116 .cra_blocksize = SHA3_224_BLOCK_SIZE, 4117 } 4118 }, 4119 .cipher_info = { 4120 .alg = CIPHER_ALG_NONE, 4121 .mode = CIPHER_MODE_NONE, 4122 }, 4123 .auth_info = { 4124 .alg = HASH_ALG_SHA3_224, 4125 .mode = HASH_MODE_HASH, 4126 }, 4127 }, 4128 { 4129 .type = CRYPTO_ALG_TYPE_AHASH, 4130 .alg.hash = { 4131 .halg.digestsize = SHA3_224_DIGEST_SIZE, 4132 .halg.base = { 4133 .cra_name = "hmac(sha3-224)", 4134 .cra_driver_name = "hmac-sha3-224-iproc", 4135 .cra_blocksize = SHA3_224_BLOCK_SIZE, 4136 } 4137 }, 4138 .cipher_info = { 4139 .alg = CIPHER_ALG_NONE, 4140 .mode = CIPHER_MODE_NONE, 4141 }, 4142 .auth_info = { 4143 .alg = HASH_ALG_SHA3_224, 4144 .mode = HASH_MODE_HMAC 4145 }, 4146 }, 4147 { 4148 .type = CRYPTO_ALG_TYPE_AHASH, 4149 .alg.hash = { 4150 .halg.digestsize = SHA3_256_DIGEST_SIZE, 4151 .halg.base = { 4152 .cra_name = "sha3-256", 4153 .cra_driver_name = "sha3-256-iproc", 4154 .cra_blocksize = SHA3_256_BLOCK_SIZE, 4155 } 4156 }, 4157 .cipher_info = { 4158 .alg = CIPHER_ALG_NONE, 4159 .mode = CIPHER_MODE_NONE, 4160 }, 4161 .auth_info = { 4162 .alg = HASH_ALG_SHA3_256, 4163 .mode = HASH_MODE_HASH, 4164 }, 4165 }, 4166 { 4167 .type = CRYPTO_ALG_TYPE_AHASH, 4168 .alg.hash = { 4169 .halg.digestsize = SHA3_256_DIGEST_SIZE, 4170 .halg.base = { 4171 .cra_name = "hmac(sha3-256)", 4172 .cra_driver_name = "hmac-sha3-256-iproc", 4173 .cra_blocksize = SHA3_256_BLOCK_SIZE, 4174 } 4175 }, 4176 .cipher_info = { 4177 .alg = CIPHER_ALG_NONE, 4178 .mode = CIPHER_MODE_NONE, 4179 }, 4180 .auth_info = { 4181 .alg = HASH_ALG_SHA3_256, 4182 .mode = HASH_MODE_HMAC, 4183 }, 4184 }, 4185 { 4186 .type = CRYPTO_ALG_TYPE_AHASH, 4187 .alg.hash = { 4188 .halg.digestsize = SHA3_384_DIGEST_SIZE, 4189 .halg.base = { 4190 .cra_name = "sha3-384", 4191 .cra_driver_name = "sha3-384-iproc", 4192 .cra_blocksize = SHA3_224_BLOCK_SIZE, 4193 } 4194 }, 4195 .cipher_info = { 4196 .alg = CIPHER_ALG_NONE, 4197 .mode = CIPHER_MODE_NONE, 4198 }, 4199 .auth_info = { 4200 .alg = HASH_ALG_SHA3_384, 4201 .mode = HASH_MODE_HASH, 4202 }, 4203 }, 4204 { 4205 .type = CRYPTO_ALG_TYPE_AHASH, 4206 .alg.hash = { 4207 .halg.digestsize = SHA3_384_DIGEST_SIZE, 4208 .halg.base = { 4209 .cra_name = "hmac(sha3-384)", 4210 .cra_driver_name = "hmac-sha3-384-iproc", 4211 .cra_blocksize = SHA3_384_BLOCK_SIZE, 4212 } 4213 }, 4214 .cipher_info = { 4215 .alg = CIPHER_ALG_NONE, 4216 .mode = CIPHER_MODE_NONE, 4217 }, 4218 .auth_info = { 4219 .alg = HASH_ALG_SHA3_384, 4220 .mode = HASH_MODE_HMAC, 4221 }, 4222 }, 4223 { 4224 .type = CRYPTO_ALG_TYPE_AHASH, 4225 .alg.hash = { 4226 .halg.digestsize = SHA3_512_DIGEST_SIZE, 4227 .halg.base = { 4228 .cra_name = "sha3-512", 4229 .cra_driver_name = "sha3-512-iproc", 4230 .cra_blocksize = SHA3_512_BLOCK_SIZE, 4231 } 4232 }, 4233 .cipher_info = { 4234 .alg = CIPHER_ALG_NONE, 4235 .mode = CIPHER_MODE_NONE, 4236 }, 4237 .auth_info = { 4238 .alg = HASH_ALG_SHA3_512, 4239 .mode = HASH_MODE_HASH, 4240 }, 4241 }, 4242 { 4243 .type = CRYPTO_ALG_TYPE_AHASH, 4244 .alg.hash = { 4245 .halg.digestsize = SHA3_512_DIGEST_SIZE, 4246 .halg.base = { 4247 .cra_name = "hmac(sha3-512)", 4248 .cra_driver_name = "hmac-sha3-512-iproc", 4249 .cra_blocksize = SHA3_512_BLOCK_SIZE, 4250 } 4251 }, 4252 .cipher_info = { 4253 .alg = CIPHER_ALG_NONE, 4254 .mode = CIPHER_MODE_NONE, 4255 }, 4256 .auth_info = { 4257 .alg = HASH_ALG_SHA3_512, 4258 .mode = HASH_MODE_HMAC, 4259 }, 4260 }, 4261 { 4262 .type = CRYPTO_ALG_TYPE_AHASH, 4263 .alg.hash = { 4264 .halg.digestsize = AES_BLOCK_SIZE, 4265 .halg.base = { 4266 .cra_name = "xcbc(aes)", 4267 .cra_driver_name = "xcbc-aes-iproc", 4268 .cra_blocksize = AES_BLOCK_SIZE, 4269 } 4270 }, 4271 .cipher_info = { 4272 .alg = CIPHER_ALG_NONE, 4273 .mode = CIPHER_MODE_NONE, 4274 }, 4275 .auth_info = { 4276 .alg = HASH_ALG_AES, 4277 .mode = HASH_MODE_XCBC, 4278 }, 4279 }, 4280 { 4281 .type = CRYPTO_ALG_TYPE_AHASH, 4282 .alg.hash = { 4283 .halg.digestsize = AES_BLOCK_SIZE, 4284 .halg.base = { 4285 .cra_name = "cmac(aes)", 4286 .cra_driver_name = "cmac-aes-iproc", 4287 .cra_blocksize = AES_BLOCK_SIZE, 4288 } 4289 }, 4290 .cipher_info = { 4291 .alg = CIPHER_ALG_NONE, 4292 .mode = CIPHER_MODE_NONE, 4293 }, 4294 .auth_info = { 4295 .alg = HASH_ALG_AES, 4296 .mode = HASH_MODE_CMAC, 4297 }, 4298 }, 4299 }; 4300 4301 static int generic_cra_init(struct crypto_tfm *tfm, 4302 struct iproc_alg_s *cipher_alg) 4303 { 4304 struct spu_hw *spu = &iproc_priv.spu; 4305 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm); 4306 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm); 4307 4308 flow_log("%s()\n", __func__); 4309 4310 ctx->alg = cipher_alg; 4311 ctx->cipher = cipher_alg->cipher_info; 4312 ctx->auth = cipher_alg->auth_info; 4313 ctx->auth_first = cipher_alg->auth_first; 4314 ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg, 4315 ctx->cipher.mode, 4316 blocksize); 4317 ctx->fallback_cipher = NULL; 4318 4319 ctx->enckeylen = 0; 4320 ctx->authkeylen = 0; 4321 4322 atomic_inc(&iproc_priv.stream_count); 4323 atomic_inc(&iproc_priv.session_count); 4324 4325 return 0; 4326 } 4327 4328 static int ablkcipher_cra_init(struct crypto_tfm *tfm) 4329 { 4330 struct crypto_alg *alg = tfm->__crt_alg; 4331 struct iproc_alg_s *cipher_alg; 4332 4333 flow_log("%s()\n", __func__); 4334 4335 tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s); 4336 4337 cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto); 4338 return generic_cra_init(tfm, cipher_alg); 4339 } 4340 4341 static int ahash_cra_init(struct crypto_tfm *tfm) 4342 { 4343 int err; 4344 struct crypto_alg *alg = tfm->__crt_alg; 4345 struct iproc_alg_s *cipher_alg; 4346 4347 cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s, 4348 alg.hash); 4349 4350 err = generic_cra_init(tfm, cipher_alg); 4351 flow_log("%s()\n", __func__); 4352 4353 /* 4354 * export state size has to be < 512 bytes. So don't include msg bufs 4355 * in state size. 4356 */ 4357 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), 4358 sizeof(struct iproc_reqctx_s)); 4359 4360 return err; 4361 } 4362 4363 static int aead_cra_init(struct crypto_aead *aead) 4364 { 4365 struct crypto_tfm *tfm = crypto_aead_tfm(aead); 4366 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm); 4367 struct crypto_alg *alg = tfm->__crt_alg; 4368 struct aead_alg *aalg = container_of(alg, struct aead_alg, base); 4369 struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s, 4370 alg.aead); 4371 4372 int err = generic_cra_init(tfm, cipher_alg); 4373 4374 flow_log("%s()\n", __func__); 4375 4376 crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s)); 4377 ctx->is_esp = false; 4378 ctx->salt_len = 0; 4379 ctx->salt_offset = 0; 4380 4381 /* random first IV */ 4382 get_random_bytes(ctx->iv, MAX_IV_SIZE); 4383 flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE); 4384 4385 if (!err) { 4386 if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) { 4387 flow_log("%s() creating fallback cipher\n", __func__); 4388 4389 ctx->fallback_cipher = 4390 crypto_alloc_aead(alg->cra_name, 0, 4391 CRYPTO_ALG_ASYNC | 4392 CRYPTO_ALG_NEED_FALLBACK); 4393 if (IS_ERR(ctx->fallback_cipher)) { 4394 pr_err("%s() Error: failed to allocate fallback for %s\n", 4395 __func__, alg->cra_name); 4396 return PTR_ERR(ctx->fallback_cipher); 4397 } 4398 } 4399 } 4400 4401 return err; 4402 } 4403 4404 static void generic_cra_exit(struct crypto_tfm *tfm) 4405 { 4406 atomic_dec(&iproc_priv.session_count); 4407 } 4408 4409 static void aead_cra_exit(struct crypto_aead *aead) 4410 { 4411 struct crypto_tfm *tfm = crypto_aead_tfm(aead); 4412 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm); 4413 4414 generic_cra_exit(tfm); 4415 4416 if (ctx->fallback_cipher) { 4417 crypto_free_aead(ctx->fallback_cipher); 4418 ctx->fallback_cipher = NULL; 4419 } 4420 } 4421 4422 /** 4423 * spu_functions_register() - Specify hardware-specific SPU functions based on 4424 * SPU type read from device tree. 4425 * @dev: device structure 4426 * @spu_type: SPU hardware generation 4427 * @spu_subtype: SPU hardware version 4428 */ 4429 static void spu_functions_register(struct device *dev, 4430 enum spu_spu_type spu_type, 4431 enum spu_spu_subtype spu_subtype) 4432 { 4433 struct spu_hw *spu = &iproc_priv.spu; 4434 4435 if (spu_type == SPU_TYPE_SPUM) { 4436 dev_dbg(dev, "Registering SPUM functions"); 4437 spu->spu_dump_msg_hdr = spum_dump_msg_hdr; 4438 spu->spu_payload_length = spum_payload_length; 4439 spu->spu_response_hdr_len = spum_response_hdr_len; 4440 spu->spu_hash_pad_len = spum_hash_pad_len; 4441 spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len; 4442 spu->spu_assoc_resp_len = spum_assoc_resp_len; 4443 spu->spu_aead_ivlen = spum_aead_ivlen; 4444 spu->spu_hash_type = spum_hash_type; 4445 spu->spu_digest_size = spum_digest_size; 4446 spu->spu_create_request = spum_create_request; 4447 spu->spu_cipher_req_init = spum_cipher_req_init; 4448 spu->spu_cipher_req_finish = spum_cipher_req_finish; 4449 spu->spu_request_pad = spum_request_pad; 4450 spu->spu_tx_status_len = spum_tx_status_len; 4451 spu->spu_rx_status_len = spum_rx_status_len; 4452 spu->spu_status_process = spum_status_process; 4453 spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload; 4454 spu->spu_ccm_update_iv = spum_ccm_update_iv; 4455 spu->spu_wordalign_padlen = spum_wordalign_padlen; 4456 if (spu_subtype == SPU_SUBTYPE_SPUM_NS2) 4457 spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload; 4458 else 4459 spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload; 4460 } else { 4461 dev_dbg(dev, "Registering SPU2 functions"); 4462 spu->spu_dump_msg_hdr = spu2_dump_msg_hdr; 4463 spu->spu_ctx_max_payload = spu2_ctx_max_payload; 4464 spu->spu_payload_length = spu2_payload_length; 4465 spu->spu_response_hdr_len = spu2_response_hdr_len; 4466 spu->spu_hash_pad_len = spu2_hash_pad_len; 4467 spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len; 4468 spu->spu_assoc_resp_len = spu2_assoc_resp_len; 4469 spu->spu_aead_ivlen = spu2_aead_ivlen; 4470 spu->spu_hash_type = spu2_hash_type; 4471 spu->spu_digest_size = spu2_digest_size; 4472 spu->spu_create_request = spu2_create_request; 4473 spu->spu_cipher_req_init = spu2_cipher_req_init; 4474 spu->spu_cipher_req_finish = spu2_cipher_req_finish; 4475 spu->spu_request_pad = spu2_request_pad; 4476 spu->spu_tx_status_len = spu2_tx_status_len; 4477 spu->spu_rx_status_len = spu2_rx_status_len; 4478 spu->spu_status_process = spu2_status_process; 4479 spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload; 4480 spu->spu_ccm_update_iv = spu2_ccm_update_iv; 4481 spu->spu_wordalign_padlen = spu2_wordalign_padlen; 4482 } 4483 } 4484 4485 /** 4486 * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox 4487 * channel for the SPU being probed. 4488 * @dev: SPU driver device structure 4489 * 4490 * Return: 0 if successful 4491 * < 0 otherwise 4492 */ 4493 static int spu_mb_init(struct device *dev) 4494 { 4495 struct mbox_client *mcl = &iproc_priv.mcl; 4496 int err, i; 4497 4498 iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan, 4499 sizeof(struct mbox_chan *), GFP_KERNEL); 4500 if (!iproc_priv.mbox) 4501 return -ENOMEM; 4502 4503 mcl->dev = dev; 4504 mcl->tx_block = false; 4505 mcl->tx_tout = 0; 4506 mcl->knows_txdone = true; 4507 mcl->rx_callback = spu_rx_callback; 4508 mcl->tx_done = NULL; 4509 4510 for (i = 0; i < iproc_priv.spu.num_chan; i++) { 4511 iproc_priv.mbox[i] = mbox_request_channel(mcl, i); 4512 if (IS_ERR(iproc_priv.mbox[i])) { 4513 err = (int)PTR_ERR(iproc_priv.mbox[i]); 4514 dev_err(dev, 4515 "Mbox channel %d request failed with err %d", 4516 i, err); 4517 iproc_priv.mbox[i] = NULL; 4518 goto free_channels; 4519 } 4520 } 4521 4522 return 0; 4523 free_channels: 4524 for (i = 0; i < iproc_priv.spu.num_chan; i++) { 4525 if (iproc_priv.mbox[i]) 4526 mbox_free_channel(iproc_priv.mbox[i]); 4527 } 4528 4529 return err; 4530 } 4531 4532 static void spu_mb_release(struct platform_device *pdev) 4533 { 4534 int i; 4535 4536 for (i = 0; i < iproc_priv.spu.num_chan; i++) 4537 mbox_free_channel(iproc_priv.mbox[i]); 4538 } 4539 4540 static void spu_counters_init(void) 4541 { 4542 int i; 4543 int j; 4544 4545 atomic_set(&iproc_priv.session_count, 0); 4546 atomic_set(&iproc_priv.stream_count, 0); 4547 atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan); 4548 atomic64_set(&iproc_priv.bytes_in, 0); 4549 atomic64_set(&iproc_priv.bytes_out, 0); 4550 for (i = 0; i < SPU_OP_NUM; i++) { 4551 atomic_set(&iproc_priv.op_counts[i], 0); 4552 atomic_set(&iproc_priv.setkey_cnt[i], 0); 4553 } 4554 for (i = 0; i < CIPHER_ALG_LAST; i++) 4555 for (j = 0; j < CIPHER_MODE_LAST; j++) 4556 atomic_set(&iproc_priv.cipher_cnt[i][j], 0); 4557 4558 for (i = 0; i < HASH_ALG_LAST; i++) { 4559 atomic_set(&iproc_priv.hash_cnt[i], 0); 4560 atomic_set(&iproc_priv.hmac_cnt[i], 0); 4561 } 4562 for (i = 0; i < AEAD_TYPE_LAST; i++) 4563 atomic_set(&iproc_priv.aead_cnt[i], 0); 4564 4565 atomic_set(&iproc_priv.mb_no_spc, 0); 4566 atomic_set(&iproc_priv.mb_send_fail, 0); 4567 atomic_set(&iproc_priv.bad_icv, 0); 4568 } 4569 4570 static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg) 4571 { 4572 struct spu_hw *spu = &iproc_priv.spu; 4573 struct crypto_alg *crypto = &driver_alg->alg.crypto; 4574 int err; 4575 4576 /* SPU2 does not support RC4 */ 4577 if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) && 4578 (spu->spu_type == SPU_TYPE_SPU2)) 4579 return 0; 4580 4581 crypto->cra_module = THIS_MODULE; 4582 crypto->cra_priority = cipher_pri; 4583 crypto->cra_alignmask = 0; 4584 crypto->cra_ctxsize = sizeof(struct iproc_ctx_s); 4585 4586 crypto->cra_init = ablkcipher_cra_init; 4587 crypto->cra_exit = generic_cra_exit; 4588 crypto->cra_type = &crypto_ablkcipher_type; 4589 crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC | 4590 CRYPTO_ALG_KERN_DRIVER_ONLY; 4591 4592 crypto->cra_ablkcipher.setkey = ablkcipher_setkey; 4593 crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt; 4594 crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt; 4595 4596 err = crypto_register_alg(crypto); 4597 /* Mark alg as having been registered, if successful */ 4598 if (err == 0) 4599 driver_alg->registered = true; 4600 pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name); 4601 return err; 4602 } 4603 4604 static int spu_register_ahash(struct iproc_alg_s *driver_alg) 4605 { 4606 struct spu_hw *spu = &iproc_priv.spu; 4607 struct ahash_alg *hash = &driver_alg->alg.hash; 4608 int err; 4609 4610 /* AES-XCBC is the only AES hash type currently supported on SPU-M */ 4611 if ((driver_alg->auth_info.alg == HASH_ALG_AES) && 4612 (driver_alg->auth_info.mode != HASH_MODE_XCBC) && 4613 (spu->spu_type == SPU_TYPE_SPUM)) 4614 return 0; 4615 4616 /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */ 4617 if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) && 4618 (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2)) 4619 return 0; 4620 4621 hash->halg.base.cra_module = THIS_MODULE; 4622 hash->halg.base.cra_priority = hash_pri; 4623 hash->halg.base.cra_alignmask = 0; 4624 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s); 4625 hash->halg.base.cra_init = ahash_cra_init; 4626 hash->halg.base.cra_exit = generic_cra_exit; 4627 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC; 4628 hash->halg.statesize = sizeof(struct spu_hash_export_s); 4629 4630 if (driver_alg->auth_info.mode != HASH_MODE_HMAC) { 4631 hash->init = ahash_init; 4632 hash->update = ahash_update; 4633 hash->final = ahash_final; 4634 hash->finup = ahash_finup; 4635 hash->digest = ahash_digest; 4636 if ((driver_alg->auth_info.alg == HASH_ALG_AES) && 4637 ((driver_alg->auth_info.mode == HASH_MODE_XCBC) || 4638 (driver_alg->auth_info.mode == HASH_MODE_CMAC))) { 4639 hash->setkey = ahash_setkey; 4640 } 4641 } else { 4642 hash->setkey = ahash_hmac_setkey; 4643 hash->init = ahash_hmac_init; 4644 hash->update = ahash_hmac_update; 4645 hash->final = ahash_hmac_final; 4646 hash->finup = ahash_hmac_finup; 4647 hash->digest = ahash_hmac_digest; 4648 } 4649 hash->export = ahash_export; 4650 hash->import = ahash_import; 4651 4652 err = crypto_register_ahash(hash); 4653 /* Mark alg as having been registered, if successful */ 4654 if (err == 0) 4655 driver_alg->registered = true; 4656 pr_debug(" registered ahash %s\n", 4657 hash->halg.base.cra_driver_name); 4658 return err; 4659 } 4660 4661 static int spu_register_aead(struct iproc_alg_s *driver_alg) 4662 { 4663 struct aead_alg *aead = &driver_alg->alg.aead; 4664 int err; 4665 4666 aead->base.cra_module = THIS_MODULE; 4667 aead->base.cra_priority = aead_pri; 4668 aead->base.cra_alignmask = 0; 4669 aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s); 4670 4671 aead->base.cra_flags |= CRYPTO_ALG_ASYNC; 4672 /* setkey set in alg initialization */ 4673 aead->setauthsize = aead_setauthsize; 4674 aead->encrypt = aead_encrypt; 4675 aead->decrypt = aead_decrypt; 4676 aead->init = aead_cra_init; 4677 aead->exit = aead_cra_exit; 4678 4679 err = crypto_register_aead(aead); 4680 /* Mark alg as having been registered, if successful */ 4681 if (err == 0) 4682 driver_alg->registered = true; 4683 pr_debug(" registered aead %s\n", aead->base.cra_driver_name); 4684 return err; 4685 } 4686 4687 /* register crypto algorithms the device supports */ 4688 static int spu_algs_register(struct device *dev) 4689 { 4690 int i, j; 4691 int err; 4692 4693 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) { 4694 switch (driver_algs[i].type) { 4695 case CRYPTO_ALG_TYPE_ABLKCIPHER: 4696 err = spu_register_ablkcipher(&driver_algs[i]); 4697 break; 4698 case CRYPTO_ALG_TYPE_AHASH: 4699 err = spu_register_ahash(&driver_algs[i]); 4700 break; 4701 case CRYPTO_ALG_TYPE_AEAD: 4702 err = spu_register_aead(&driver_algs[i]); 4703 break; 4704 default: 4705 dev_err(dev, 4706 "iproc-crypto: unknown alg type: %d", 4707 driver_algs[i].type); 4708 err = -EINVAL; 4709 } 4710 4711 if (err) { 4712 dev_err(dev, "alg registration failed with error %d\n", 4713 err); 4714 goto err_algs; 4715 } 4716 } 4717 4718 return 0; 4719 4720 err_algs: 4721 for (j = 0; j < i; j++) { 4722 /* Skip any algorithm not registered */ 4723 if (!driver_algs[j].registered) 4724 continue; 4725 switch (driver_algs[j].type) { 4726 case CRYPTO_ALG_TYPE_ABLKCIPHER: 4727 crypto_unregister_alg(&driver_algs[j].alg.crypto); 4728 driver_algs[j].registered = false; 4729 break; 4730 case CRYPTO_ALG_TYPE_AHASH: 4731 crypto_unregister_ahash(&driver_algs[j].alg.hash); 4732 driver_algs[j].registered = false; 4733 break; 4734 case CRYPTO_ALG_TYPE_AEAD: 4735 crypto_unregister_aead(&driver_algs[j].alg.aead); 4736 driver_algs[j].registered = false; 4737 break; 4738 } 4739 } 4740 return err; 4741 } 4742 4743 /* ==================== Kernel Platform API ==================== */ 4744 4745 static struct spu_type_subtype spum_ns2_types = { 4746 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2 4747 }; 4748 4749 static struct spu_type_subtype spum_nsp_types = { 4750 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP 4751 }; 4752 4753 static struct spu_type_subtype spu2_types = { 4754 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1 4755 }; 4756 4757 static struct spu_type_subtype spu2_v2_types = { 4758 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2 4759 }; 4760 4761 static const struct of_device_id bcm_spu_dt_ids[] = { 4762 { 4763 .compatible = "brcm,spum-crypto", 4764 .data = &spum_ns2_types, 4765 }, 4766 { 4767 .compatible = "brcm,spum-nsp-crypto", 4768 .data = &spum_nsp_types, 4769 }, 4770 { 4771 .compatible = "brcm,spu2-crypto", 4772 .data = &spu2_types, 4773 }, 4774 { 4775 .compatible = "brcm,spu2-v2-crypto", 4776 .data = &spu2_v2_types, 4777 }, 4778 { /* sentinel */ } 4779 }; 4780 4781 MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids); 4782 4783 static int spu_dt_read(struct platform_device *pdev) 4784 { 4785 struct device *dev = &pdev->dev; 4786 struct spu_hw *spu = &iproc_priv.spu; 4787 struct resource *spu_ctrl_regs; 4788 const struct spu_type_subtype *matched_spu_type; 4789 struct device_node *dn = pdev->dev.of_node; 4790 int err, i; 4791 4792 /* Count number of mailbox channels */ 4793 spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells"); 4794 4795 matched_spu_type = of_device_get_match_data(dev); 4796 if (!matched_spu_type) { 4797 dev_err(&pdev->dev, "Failed to match device\n"); 4798 return -ENODEV; 4799 } 4800 4801 spu->spu_type = matched_spu_type->type; 4802 spu->spu_subtype = matched_spu_type->subtype; 4803 4804 i = 0; 4805 for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs = 4806 platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) { 4807 4808 spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs); 4809 if (IS_ERR(spu->reg_vbase[i])) { 4810 err = PTR_ERR(spu->reg_vbase[i]); 4811 dev_err(&pdev->dev, "Failed to map registers: %d\n", 4812 err); 4813 spu->reg_vbase[i] = NULL; 4814 return err; 4815 } 4816 } 4817 spu->num_spu = i; 4818 dev_dbg(dev, "Device has %d SPUs", spu->num_spu); 4819 4820 return 0; 4821 } 4822 4823 int bcm_spu_probe(struct platform_device *pdev) 4824 { 4825 struct device *dev = &pdev->dev; 4826 struct spu_hw *spu = &iproc_priv.spu; 4827 int err = 0; 4828 4829 iproc_priv.pdev = pdev; 4830 platform_set_drvdata(iproc_priv.pdev, 4831 &iproc_priv); 4832 4833 err = spu_dt_read(pdev); 4834 if (err < 0) 4835 goto failure; 4836 4837 err = spu_mb_init(&pdev->dev); 4838 if (err < 0) 4839 goto failure; 4840 4841 if (spu->spu_type == SPU_TYPE_SPUM) 4842 iproc_priv.bcm_hdr_len = 8; 4843 else if (spu->spu_type == SPU_TYPE_SPU2) 4844 iproc_priv.bcm_hdr_len = 0; 4845 4846 spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype); 4847 4848 spu_counters_init(); 4849 4850 spu_setup_debugfs(); 4851 4852 err = spu_algs_register(dev); 4853 if (err < 0) 4854 goto fail_reg; 4855 4856 return 0; 4857 4858 fail_reg: 4859 spu_free_debugfs(); 4860 failure: 4861 spu_mb_release(pdev); 4862 dev_err(dev, "%s failed with error %d.\n", __func__, err); 4863 4864 return err; 4865 } 4866 4867 int bcm_spu_remove(struct platform_device *pdev) 4868 { 4869 int i; 4870 struct device *dev = &pdev->dev; 4871 char *cdn; 4872 4873 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) { 4874 /* 4875 * Not all algorithms were registered, depending on whether 4876 * hardware is SPU or SPU2. So here we make sure to skip 4877 * those algorithms that were not previously registered. 4878 */ 4879 if (!driver_algs[i].registered) 4880 continue; 4881 4882 switch (driver_algs[i].type) { 4883 case CRYPTO_ALG_TYPE_ABLKCIPHER: 4884 crypto_unregister_alg(&driver_algs[i].alg.crypto); 4885 dev_dbg(dev, " unregistered cipher %s\n", 4886 driver_algs[i].alg.crypto.cra_driver_name); 4887 driver_algs[i].registered = false; 4888 break; 4889 case CRYPTO_ALG_TYPE_AHASH: 4890 crypto_unregister_ahash(&driver_algs[i].alg.hash); 4891 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name; 4892 dev_dbg(dev, " unregistered hash %s\n", cdn); 4893 driver_algs[i].registered = false; 4894 break; 4895 case CRYPTO_ALG_TYPE_AEAD: 4896 crypto_unregister_aead(&driver_algs[i].alg.aead); 4897 dev_dbg(dev, " unregistered aead %s\n", 4898 driver_algs[i].alg.aead.base.cra_driver_name); 4899 driver_algs[i].registered = false; 4900 break; 4901 } 4902 } 4903 spu_free_debugfs(); 4904 spu_mb_release(pdev); 4905 return 0; 4906 } 4907 4908 /* ===== Kernel Module API ===== */ 4909 4910 static struct platform_driver bcm_spu_pdriver = { 4911 .driver = { 4912 .name = "brcm-spu-crypto", 4913 .of_match_table = of_match_ptr(bcm_spu_dt_ids), 4914 }, 4915 .probe = bcm_spu_probe, 4916 .remove = bcm_spu_remove, 4917 }; 4918 module_platform_driver(bcm_spu_pdriver); 4919 4920 MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>"); 4921 MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver"); 4922 MODULE_LICENSE("GPL v2"); 4923