1049359d6SJames Hsiao /** 2049359d6SJames Hsiao * AMCC SoC PPC4xx Crypto Driver 3049359d6SJames Hsiao * 4049359d6SJames Hsiao * Copyright (c) 2008 Applied Micro Circuits Corporation. 5049359d6SJames Hsiao * All rights reserved. James Hsiao <jhsiao@amcc.com> 6049359d6SJames Hsiao * 7049359d6SJames Hsiao * This program is free software; you can redistribute it and/or modify 8049359d6SJames Hsiao * it under the terms of the GNU General Public License as published by 9049359d6SJames Hsiao * the Free Software Foundation; either version 2 of the License, or 10049359d6SJames Hsiao * (at your option) any later version. 11049359d6SJames Hsiao * 12049359d6SJames Hsiao * This program is distributed in the hope that it will be useful, 13049359d6SJames Hsiao * but WITHOUT ANY WARRANTY; without even the implied warranty of 14049359d6SJames Hsiao * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15049359d6SJames Hsiao * GNU General Public License for more details. 16049359d6SJames Hsiao * 17049359d6SJames Hsiao * This filr defines the register set for Security Subsystem 18049359d6SJames Hsiao */ 19049359d6SJames Hsiao 20049359d6SJames Hsiao #ifndef __CRYPTO4XX_REG_DEF_H__ 21049359d6SJames Hsiao #define __CRYPTO4XX_REG_DEF_H__ 22049359d6SJames Hsiao 23049359d6SJames Hsiao /* CRYPTO4XX Register offset */ 24049359d6SJames Hsiao #define CRYPTO4XX_DESCRIPTOR 0x00000000 25049359d6SJames Hsiao #define CRYPTO4XX_CTRL_STAT 0x00000000 26049359d6SJames Hsiao #define CRYPTO4XX_SOURCE 0x00000004 27049359d6SJames Hsiao #define CRYPTO4XX_DEST 0x00000008 28049359d6SJames Hsiao #define CRYPTO4XX_SA 0x0000000C 29049359d6SJames Hsiao #define CRYPTO4XX_SA_LENGTH 0x00000010 30049359d6SJames Hsiao #define CRYPTO4XX_LENGTH 0x00000014 31049359d6SJames Hsiao 32049359d6SJames Hsiao #define CRYPTO4XX_PE_DMA_CFG 0x00000040 33049359d6SJames Hsiao #define CRYPTO4XX_PE_DMA_STAT 0x00000044 34049359d6SJames Hsiao #define CRYPTO4XX_PDR_BASE 0x00000048 35049359d6SJames Hsiao #define CRYPTO4XX_RDR_BASE 0x0000004c 36049359d6SJames Hsiao #define CRYPTO4XX_RING_SIZE 0x00000050 37049359d6SJames Hsiao #define CRYPTO4XX_RING_CTRL 0x00000054 38049359d6SJames Hsiao #define CRYPTO4XX_INT_RING_STAT 0x00000058 39049359d6SJames Hsiao #define CRYPTO4XX_EXT_RING_STAT 0x0000005c 40049359d6SJames Hsiao #define CRYPTO4XX_IO_THRESHOLD 0x00000060 41049359d6SJames Hsiao #define CRYPTO4XX_GATH_RING_BASE 0x00000064 42049359d6SJames Hsiao #define CRYPTO4XX_SCAT_RING_BASE 0x00000068 43049359d6SJames Hsiao #define CRYPTO4XX_PART_RING_SIZE 0x0000006c 44049359d6SJames Hsiao #define CRYPTO4XX_PART_RING_CFG 0x00000070 45049359d6SJames Hsiao 46049359d6SJames Hsiao #define CRYPTO4XX_PDR_BASE_UADDR 0x00000080 47049359d6SJames Hsiao #define CRYPTO4XX_RDR_BASE_UADDR 0x00000084 48049359d6SJames Hsiao #define CRYPTO4XX_PKT_SRC_UADDR 0x00000088 49049359d6SJames Hsiao #define CRYPTO4XX_PKT_DEST_UADDR 0x0000008c 50049359d6SJames Hsiao #define CRYPTO4XX_SA_UADDR 0x00000090 51049359d6SJames Hsiao #define CRYPTO4XX_GATH_RING_BASE_UADDR 0x000000A0 52049359d6SJames Hsiao #define CRYPTO4XX_SCAT_RING_BASE_UADDR 0x000000A4 53049359d6SJames Hsiao 54049359d6SJames Hsiao #define CRYPTO4XX_SEQ_RD 0x00000408 55049359d6SJames Hsiao #define CRYPTO4XX_SEQ_MASK_RD 0x0000040C 56049359d6SJames Hsiao 57049359d6SJames Hsiao #define CRYPTO4XX_SA_CMD_0 0x00010600 58049359d6SJames Hsiao #define CRYPTO4XX_SA_CMD_1 0x00010604 59049359d6SJames Hsiao 60049359d6SJames Hsiao #define CRYPTO4XX_STATE_PTR 0x000106dc 61049359d6SJames Hsiao #define CRYPTO4XX_STATE_IV 0x00010700 62049359d6SJames Hsiao #define CRYPTO4XX_STATE_HASH_BYTE_CNT_0 0x00010710 63049359d6SJames Hsiao #define CRYPTO4XX_STATE_HASH_BYTE_CNT_1 0x00010714 64049359d6SJames Hsiao 65049359d6SJames Hsiao #define CRYPTO4XX_STATE_IDIGEST_0 0x00010718 66049359d6SJames Hsiao #define CRYPTO4XX_STATE_IDIGEST_1 0x0001071c 67049359d6SJames Hsiao 68049359d6SJames Hsiao #define CRYPTO4XX_DATA_IN 0x00018000 69049359d6SJames Hsiao #define CRYPTO4XX_DATA_OUT 0x0001c000 70049359d6SJames Hsiao 71049359d6SJames Hsiao #define CRYPTO4XX_INT_UNMASK_STAT 0x000500a0 72049359d6SJames Hsiao #define CRYPTO4XX_INT_MASK_STAT 0x000500a4 73049359d6SJames Hsiao #define CRYPTO4XX_INT_CLR 0x000500a4 74049359d6SJames Hsiao #define CRYPTO4XX_INT_EN 0x000500a8 75049359d6SJames Hsiao 76049359d6SJames Hsiao #define CRYPTO4XX_INT_PKA 0x00000002 77049359d6SJames Hsiao #define CRYPTO4XX_INT_PDR_DONE 0x00008000 78049359d6SJames Hsiao #define CRYPTO4XX_INT_MA_WR_ERR 0x00020000 79049359d6SJames Hsiao #define CRYPTO4XX_INT_MA_RD_ERR 0x00010000 80049359d6SJames Hsiao #define CRYPTO4XX_INT_PE_ERR 0x00000200 81049359d6SJames Hsiao #define CRYPTO4XX_INT_USER_DMA_ERR 0x00000040 82049359d6SJames Hsiao #define CRYPTO4XX_INT_SLAVE_ERR 0x00000010 83049359d6SJames Hsiao #define CRYPTO4XX_INT_MASTER_ERR 0x00000008 84049359d6SJames Hsiao #define CRYPTO4XX_INT_ERROR 0x00030258 85049359d6SJames Hsiao 86049359d6SJames Hsiao #define CRYPTO4XX_INT_CFG 0x000500ac 87049359d6SJames Hsiao #define CRYPTO4XX_INT_DESCR_RD 0x000500b0 88049359d6SJames Hsiao #define CRYPTO4XX_INT_DESCR_CNT 0x000500b4 89049359d6SJames Hsiao #define CRYPTO4XX_INT_TIMEOUT_CNT 0x000500b8 90049359d6SJames Hsiao 91049359d6SJames Hsiao #define CRYPTO4XX_DEVICE_CTRL 0x00060080 92049359d6SJames Hsiao #define CRYPTO4XX_DEVICE_ID 0x00060084 93049359d6SJames Hsiao #define CRYPTO4XX_DEVICE_INFO 0x00060088 94049359d6SJames Hsiao #define CRYPTO4XX_DMA_USER_SRC 0x00060094 95049359d6SJames Hsiao #define CRYPTO4XX_DMA_USER_DEST 0x00060098 96049359d6SJames Hsiao #define CRYPTO4XX_DMA_USER_CMD 0x0006009C 97049359d6SJames Hsiao 98049359d6SJames Hsiao #define CRYPTO4XX_DMA_CFG 0x000600d4 99049359d6SJames Hsiao #define CRYPTO4XX_BYTE_ORDER_CFG 0x000600d8 100049359d6SJames Hsiao #define CRYPTO4XX_ENDIAN_CFG 0x000600d8 101049359d6SJames Hsiao 102049359d6SJames Hsiao #define CRYPTO4XX_PRNG_STAT 0x00070000 103d072bfa4SChristian Lamparter #define CRYPTO4XX_PRNG_STAT_BUSY 0x1 104049359d6SJames Hsiao #define CRYPTO4XX_PRNG_CTRL 0x00070004 105049359d6SJames Hsiao #define CRYPTO4XX_PRNG_SEED_L 0x00070008 106049359d6SJames Hsiao #define CRYPTO4XX_PRNG_SEED_H 0x0007000c 107049359d6SJames Hsiao 108049359d6SJames Hsiao #define CRYPTO4XX_PRNG_RES_0 0x00070020 109049359d6SJames Hsiao #define CRYPTO4XX_PRNG_RES_1 0x00070024 110049359d6SJames Hsiao #define CRYPTO4XX_PRNG_RES_2 0x00070028 111049359d6SJames Hsiao #define CRYPTO4XX_PRNG_RES_3 0x0007002C 112049359d6SJames Hsiao 113049359d6SJames Hsiao #define CRYPTO4XX_PRNG_LFSR_L 0x00070030 114049359d6SJames Hsiao #define CRYPTO4XX_PRNG_LFSR_H 0x00070034 115049359d6SJames Hsiao 116049359d6SJames Hsiao /** 117421f91d2SUwe Kleine-König * Initialize CRYPTO ENGINE registers, and memory bases. 118049359d6SJames Hsiao */ 119049359d6SJames Hsiao #define PPC4XX_PDR_POLL 0x3ff 120049359d6SJames Hsiao #define PPC4XX_OUTPUT_THRESHOLD 2 121049359d6SJames Hsiao #define PPC4XX_INPUT_THRESHOLD 2 122049359d6SJames Hsiao #define PPC4XX_PD_SIZE 6 123049359d6SJames Hsiao #define PPC4XX_CTX_DONE_INT 0x2000 124049359d6SJames Hsiao #define PPC4XX_PD_DONE_INT 0x8000 125b66c685aSChristian Lamparter #define PPC4XX_TMO_ERR_INT 0x40000 126049359d6SJames Hsiao #define PPC4XX_BYTE_ORDER 0x22222 127049359d6SJames Hsiao #define PPC4XX_INTERRUPT_CLR 0x3ffff 128049359d6SJames Hsiao #define PPC4XX_PRNG_CTRL_AUTO_EN 0x3 129049359d6SJames Hsiao #define PPC4XX_DC_3DES_EN 1 1305343e674SChristian Lamparter #define PPC4XX_TRNG_EN 0x00020000 131b66c685aSChristian Lamparter #define PPC4XX_INT_DESCR_CNT 7 132049359d6SJames Hsiao #define PPC4XX_INT_TIMEOUT_CNT 0 133b66c685aSChristian Lamparter #define PPC4XX_INT_TIMEOUT_CNT_REVB 0x3FF 134049359d6SJames Hsiao #define PPC4XX_INT_CFG 1 135049359d6SJames Hsiao /** 136049359d6SJames Hsiao * all follow define are ad hoc 137049359d6SJames Hsiao */ 138049359d6SJames Hsiao #define PPC4XX_RING_RETRY 100 139049359d6SJames Hsiao #define PPC4XX_RING_POLL 100 140049359d6SJames Hsiao #define PPC4XX_SDR_SIZE PPC4XX_NUM_SD 141049359d6SJames Hsiao #define PPC4XX_GDR_SIZE PPC4XX_NUM_GD 142049359d6SJames Hsiao 143049359d6SJames Hsiao /** 144049359d6SJames Hsiao * Generic Security Association (SA) with all possible fields. These will 145049359d6SJames Hsiao * never likely used except for reference purpose. These structure format 146049359d6SJames Hsiao * can be not changed as the hardware expects them to be layout as defined. 147049359d6SJames Hsiao * Field can be removed or reduced but ordering can not be changed. 148049359d6SJames Hsiao */ 149049359d6SJames Hsiao #define CRYPTO4XX_DMA_CFG_OFFSET 0x40 150049359d6SJames Hsiao union ce_pe_dma_cfg { 151049359d6SJames Hsiao struct { 152049359d6SJames Hsiao u32 rsv:7; 153049359d6SJames Hsiao u32 dir_host:1; 154049359d6SJames Hsiao u32 rsv1:2; 155049359d6SJames Hsiao u32 bo_td_en:1; 156049359d6SJames Hsiao u32 dis_pdr_upd:1; 157049359d6SJames Hsiao u32 bo_sgpd_en:1; 158049359d6SJames Hsiao u32 bo_data_en:1; 159049359d6SJames Hsiao u32 bo_sa_en:1; 160049359d6SJames Hsiao u32 bo_pd_en:1; 161049359d6SJames Hsiao u32 rsv2:4; 162049359d6SJames Hsiao u32 dynamic_sa_en:1; 163049359d6SJames Hsiao u32 pdr_mode:2; 164049359d6SJames Hsiao u32 pe_mode:1; 165049359d6SJames Hsiao u32 rsv3:5; 166049359d6SJames Hsiao u32 reset_sg:1; 167049359d6SJames Hsiao u32 reset_pdr:1; 168049359d6SJames Hsiao u32 reset_pe:1; 169049359d6SJames Hsiao } bf; 170049359d6SJames Hsiao u32 w; 171049359d6SJames Hsiao } __attribute__((packed)); 172049359d6SJames Hsiao 173049359d6SJames Hsiao #define CRYPTO4XX_PDR_BASE_OFFSET 0x48 174049359d6SJames Hsiao #define CRYPTO4XX_RDR_BASE_OFFSET 0x4c 175049359d6SJames Hsiao #define CRYPTO4XX_RING_SIZE_OFFSET 0x50 176049359d6SJames Hsiao union ce_ring_size { 177049359d6SJames Hsiao struct { 178049359d6SJames Hsiao u32 ring_offset:16; 179049359d6SJames Hsiao u32 rsv:6; 180049359d6SJames Hsiao u32 ring_size:10; 181049359d6SJames Hsiao } bf; 182049359d6SJames Hsiao u32 w; 183049359d6SJames Hsiao } __attribute__((packed)); 184049359d6SJames Hsiao 185049359d6SJames Hsiao #define CRYPTO4XX_RING_CONTROL_OFFSET 0x54 1867c6c0dc7SColin Ian King union ce_ring_control { 187049359d6SJames Hsiao struct { 188049359d6SJames Hsiao u32 continuous:1; 189049359d6SJames Hsiao u32 rsv:5; 190049359d6SJames Hsiao u32 ring_retry_divisor:10; 191049359d6SJames Hsiao u32 rsv1:4; 192049359d6SJames Hsiao u32 ring_poll_divisor:10; 193049359d6SJames Hsiao } bf; 194049359d6SJames Hsiao u32 w; 195049359d6SJames Hsiao } __attribute__((packed)); 196049359d6SJames Hsiao 197049359d6SJames Hsiao #define CRYPTO4XX_IO_THRESHOLD_OFFSET 0x60 198049359d6SJames Hsiao union ce_io_threshold { 199049359d6SJames Hsiao struct { 200049359d6SJames Hsiao u32 rsv:6; 201049359d6SJames Hsiao u32 output_threshold:10; 202049359d6SJames Hsiao u32 rsv1:6; 203049359d6SJames Hsiao u32 input_threshold:10; 204049359d6SJames Hsiao } bf; 205049359d6SJames Hsiao u32 w; 206049359d6SJames Hsiao } __attribute__((packed)); 207049359d6SJames Hsiao 208049359d6SJames Hsiao #define CRYPTO4XX_GATHER_RING_BASE_OFFSET 0x64 209049359d6SJames Hsiao #define CRYPTO4XX_SCATTER_RING_BASE_OFFSET 0x68 210049359d6SJames Hsiao 211049359d6SJames Hsiao union ce_part_ring_size { 212049359d6SJames Hsiao struct { 213049359d6SJames Hsiao u32 sdr_size:16; 214049359d6SJames Hsiao u32 gdr_size:16; 215049359d6SJames Hsiao } bf; 216049359d6SJames Hsiao u32 w; 217049359d6SJames Hsiao } __attribute__((packed)); 218049359d6SJames Hsiao 219049359d6SJames Hsiao #define MAX_BURST_SIZE_32 0 220049359d6SJames Hsiao #define MAX_BURST_SIZE_64 1 221049359d6SJames Hsiao #define MAX_BURST_SIZE_128 2 222049359d6SJames Hsiao #define MAX_BURST_SIZE_256 3 223049359d6SJames Hsiao 224049359d6SJames Hsiao /* gather descriptor control length */ 225049359d6SJames Hsiao struct gd_ctl_len { 226049359d6SJames Hsiao u32 len:16; 227049359d6SJames Hsiao u32 rsv:14; 228049359d6SJames Hsiao u32 done:1; 229049359d6SJames Hsiao u32 ready:1; 230049359d6SJames Hsiao } __attribute__((packed)); 231049359d6SJames Hsiao 232049359d6SJames Hsiao struct ce_gd { 233049359d6SJames Hsiao u32 ptr; 234049359d6SJames Hsiao struct gd_ctl_len ctl_len; 235049359d6SJames Hsiao } __attribute__((packed)); 236049359d6SJames Hsiao 237049359d6SJames Hsiao struct sd_ctl { 238049359d6SJames Hsiao u32 ctl:30; 239049359d6SJames Hsiao u32 done:1; 240049359d6SJames Hsiao u32 rdy:1; 241049359d6SJames Hsiao } __attribute__((packed)); 242049359d6SJames Hsiao 243049359d6SJames Hsiao struct ce_sd { 244049359d6SJames Hsiao u32 ptr; 245049359d6SJames Hsiao struct sd_ctl ctl; 246049359d6SJames Hsiao } __attribute__((packed)); 247049359d6SJames Hsiao 248049359d6SJames Hsiao #define PD_PAD_CTL_32 0x10 249049359d6SJames Hsiao #define PD_PAD_CTL_64 0x20 250049359d6SJames Hsiao #define PD_PAD_CTL_128 0x40 251049359d6SJames Hsiao #define PD_PAD_CTL_256 0x80 252049359d6SJames Hsiao union ce_pd_ctl { 253049359d6SJames Hsiao struct { 254049359d6SJames Hsiao u32 pd_pad_ctl:8; 255049359d6SJames Hsiao u32 status:8; 256049359d6SJames Hsiao u32 next_hdr:8; 257049359d6SJames Hsiao u32 rsv:2; 258049359d6SJames Hsiao u32 cached_sa:1; 259049359d6SJames Hsiao u32 hash_final:1; 260049359d6SJames Hsiao u32 init_arc4:1; 261049359d6SJames Hsiao u32 rsv1:1; 262049359d6SJames Hsiao u32 pe_done:1; 263049359d6SJames Hsiao u32 host_ready:1; 264049359d6SJames Hsiao } bf; 265049359d6SJames Hsiao u32 w; 266049359d6SJames Hsiao } __attribute__((packed)); 2674b5b7999SChristian Lamparter #define PD_CTL_HASH_FINAL BIT(4) 2684b5b7999SChristian Lamparter #define PD_CTL_PE_DONE BIT(1) 2694b5b7999SChristian Lamparter #define PD_CTL_HOST_READY BIT(0) 270049359d6SJames Hsiao 271049359d6SJames Hsiao union ce_pd_ctl_len { 272049359d6SJames Hsiao struct { 273049359d6SJames Hsiao u32 bypass:8; 274049359d6SJames Hsiao u32 pe_done:1; 275049359d6SJames Hsiao u32 host_ready:1; 276049359d6SJames Hsiao u32 rsv:2; 277049359d6SJames Hsiao u32 pkt_len:20; 278049359d6SJames Hsiao } bf; 279049359d6SJames Hsiao u32 w; 280049359d6SJames Hsiao } __attribute__((packed)); 281049359d6SJames Hsiao 282049359d6SJames Hsiao struct ce_pd { 283049359d6SJames Hsiao union ce_pd_ctl pd_ctl; 284049359d6SJames Hsiao u32 src; 285049359d6SJames Hsiao u32 dest; 286049359d6SJames Hsiao u32 sa; /* get from ctx->sa_dma_addr */ 287049359d6SJames Hsiao u32 sa_len; /* only if dynamic sa is used */ 288049359d6SJames Hsiao union ce_pd_ctl_len pd_ctl_len; 289049359d6SJames Hsiao 290049359d6SJames Hsiao } __attribute__((packed)); 291049359d6SJames Hsiao #endif 292