1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * sun8i-ss-hash.c - hardware cryptographic offloader for 4 * Allwinner A80/A83T SoC 5 * 6 * Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com> 7 * 8 * This file add support for MD5 and SHA1/SHA224/SHA256. 9 * 10 * You could find the datasheet in Documentation/arm/sunxi.rst 11 */ 12 #include <linux/dma-mapping.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/scatterlist.h> 15 #include <crypto/internal/hash.h> 16 #include <crypto/sha.h> 17 #include <crypto/md5.h> 18 #include "sun8i-ss.h" 19 20 int sun8i_ss_hash_crainit(struct crypto_tfm *tfm) 21 { 22 struct sun8i_ss_hash_tfm_ctx *op = crypto_tfm_ctx(tfm); 23 struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); 24 struct sun8i_ss_alg_template *algt; 25 int err; 26 27 memset(op, 0, sizeof(struct sun8i_ss_hash_tfm_ctx)); 28 29 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 30 op->ss = algt->ss; 31 32 op->enginectx.op.do_one_request = sun8i_ss_hash_run; 33 op->enginectx.op.prepare_request = NULL; 34 op->enginectx.op.unprepare_request = NULL; 35 36 /* FALLBACK */ 37 op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0, 38 CRYPTO_ALG_NEED_FALLBACK); 39 if (IS_ERR(op->fallback_tfm)) { 40 dev_err(algt->ss->dev, "Fallback driver could no be loaded\n"); 41 return PTR_ERR(op->fallback_tfm); 42 } 43 44 if (algt->alg.hash.halg.statesize < crypto_ahash_statesize(op->fallback_tfm)) 45 algt->alg.hash.halg.statesize = crypto_ahash_statesize(op->fallback_tfm); 46 47 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), 48 sizeof(struct sun8i_ss_hash_reqctx) + 49 crypto_ahash_reqsize(op->fallback_tfm)); 50 51 dev_info(op->ss->dev, "Fallback for %s is %s\n", 52 crypto_tfm_alg_driver_name(tfm), 53 crypto_tfm_alg_driver_name(&op->fallback_tfm->base)); 54 err = pm_runtime_get_sync(op->ss->dev); 55 if (err < 0) 56 goto error_pm; 57 return 0; 58 error_pm: 59 pm_runtime_put_noidle(op->ss->dev); 60 crypto_free_ahash(op->fallback_tfm); 61 return err; 62 } 63 64 void sun8i_ss_hash_craexit(struct crypto_tfm *tfm) 65 { 66 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_tfm_ctx(tfm); 67 68 crypto_free_ahash(tfmctx->fallback_tfm); 69 pm_runtime_put_sync_suspend(tfmctx->ss->dev); 70 } 71 72 int sun8i_ss_hash_init(struct ahash_request *areq) 73 { 74 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 75 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 76 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 77 78 memset(rctx, 0, sizeof(struct sun8i_ss_hash_reqctx)); 79 80 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 81 rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP; 82 83 return crypto_ahash_init(&rctx->fallback_req); 84 } 85 86 int sun8i_ss_hash_export(struct ahash_request *areq, void *out) 87 { 88 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 89 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 90 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 91 92 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 93 rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP; 94 95 return crypto_ahash_export(&rctx->fallback_req, out); 96 } 97 98 int sun8i_ss_hash_import(struct ahash_request *areq, const void *in) 99 { 100 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 101 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 102 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 103 104 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 105 rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP; 106 107 return crypto_ahash_import(&rctx->fallback_req, in); 108 } 109 110 int sun8i_ss_hash_final(struct ahash_request *areq) 111 { 112 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 113 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 114 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 115 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 116 struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); 117 struct sun8i_ss_alg_template *algt; 118 #endif 119 120 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 121 rctx->fallback_req.base.flags = areq->base.flags & 122 CRYPTO_TFM_REQ_MAY_SLEEP; 123 rctx->fallback_req.result = areq->result; 124 125 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 126 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 127 algt->stat_fb++; 128 #endif 129 130 return crypto_ahash_final(&rctx->fallback_req); 131 } 132 133 int sun8i_ss_hash_update(struct ahash_request *areq) 134 { 135 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 136 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 137 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 138 139 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 140 rctx->fallback_req.base.flags = areq->base.flags & 141 CRYPTO_TFM_REQ_MAY_SLEEP; 142 rctx->fallback_req.nbytes = areq->nbytes; 143 rctx->fallback_req.src = areq->src; 144 145 return crypto_ahash_update(&rctx->fallback_req); 146 } 147 148 int sun8i_ss_hash_finup(struct ahash_request *areq) 149 { 150 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 151 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 152 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 153 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 154 struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); 155 struct sun8i_ss_alg_template *algt; 156 #endif 157 158 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 159 rctx->fallback_req.base.flags = areq->base.flags & 160 CRYPTO_TFM_REQ_MAY_SLEEP; 161 162 rctx->fallback_req.nbytes = areq->nbytes; 163 rctx->fallback_req.src = areq->src; 164 rctx->fallback_req.result = areq->result; 165 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 166 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 167 algt->stat_fb++; 168 #endif 169 170 return crypto_ahash_finup(&rctx->fallback_req); 171 } 172 173 static int sun8i_ss_hash_digest_fb(struct ahash_request *areq) 174 { 175 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 176 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 177 struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); 178 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 179 struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); 180 struct sun8i_ss_alg_template *algt; 181 #endif 182 183 ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); 184 rctx->fallback_req.base.flags = areq->base.flags & 185 CRYPTO_TFM_REQ_MAY_SLEEP; 186 187 rctx->fallback_req.nbytes = areq->nbytes; 188 rctx->fallback_req.src = areq->src; 189 rctx->fallback_req.result = areq->result; 190 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 191 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 192 algt->stat_fb++; 193 #endif 194 195 return crypto_ahash_digest(&rctx->fallback_req); 196 } 197 198 static int sun8i_ss_run_hash_task(struct sun8i_ss_dev *ss, 199 struct sun8i_ss_hash_reqctx *rctx, 200 const char *name) 201 { 202 int flow = rctx->flow; 203 u32 v = SS_START; 204 int i; 205 206 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 207 ss->flows[flow].stat_req++; 208 #endif 209 210 /* choose between stream0/stream1 */ 211 if (flow) 212 v |= SS_FLOW1; 213 else 214 v |= SS_FLOW0; 215 216 v |= rctx->method; 217 218 for (i = 0; i < MAX_SG; i++) { 219 if (!rctx->t_dst[i].addr) 220 break; 221 222 mutex_lock(&ss->mlock); 223 if (i > 0) { 224 v |= BIT(17); 225 writel(rctx->t_dst[i - 1].addr, ss->base + SS_KEY_ADR_REG); 226 writel(rctx->t_dst[i - 1].addr, ss->base + SS_IV_ADR_REG); 227 } 228 229 dev_dbg(ss->dev, 230 "Processing SG %d on flow %d %s ctl=%x %d to %d method=%x src=%x dst=%x\n", 231 i, flow, name, v, 232 rctx->t_src[i].len, rctx->t_dst[i].len, 233 rctx->method, rctx->t_src[i].addr, rctx->t_dst[i].addr); 234 235 writel(rctx->t_src[i].addr, ss->base + SS_SRC_ADR_REG); 236 writel(rctx->t_dst[i].addr, ss->base + SS_DST_ADR_REG); 237 writel(rctx->t_src[i].len, ss->base + SS_LEN_ADR_REG); 238 writel(BIT(0) | BIT(1), ss->base + SS_INT_CTL_REG); 239 240 reinit_completion(&ss->flows[flow].complete); 241 ss->flows[flow].status = 0; 242 wmb(); 243 244 writel(v, ss->base + SS_CTL_REG); 245 mutex_unlock(&ss->mlock); 246 wait_for_completion_interruptible_timeout(&ss->flows[flow].complete, 247 msecs_to_jiffies(2000)); 248 if (ss->flows[flow].status == 0) { 249 dev_err(ss->dev, "DMA timeout for %s\n", name); 250 return -EFAULT; 251 } 252 } 253 254 return 0; 255 } 256 257 static bool sun8i_ss_hash_need_fallback(struct ahash_request *areq) 258 { 259 struct scatterlist *sg; 260 261 if (areq->nbytes == 0) 262 return true; 263 /* we need to reserve one SG for the padding one */ 264 if (sg_nents(areq->src) > MAX_SG - 1) 265 return true; 266 sg = areq->src; 267 while (sg) { 268 /* SS can operate hash only on full block size 269 * since SS support only MD5,sha1,sha224 and sha256, blocksize 270 * is always 64 271 * TODO: handle request if last SG is not len%64 272 * but this will need to copy data on a new SG of size=64 273 */ 274 if (sg->length % 64 || !IS_ALIGNED(sg->offset, sizeof(u32))) 275 return true; 276 sg = sg_next(sg); 277 } 278 return false; 279 } 280 281 int sun8i_ss_hash_digest(struct ahash_request *areq) 282 { 283 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 284 struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); 285 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 286 struct sun8i_ss_alg_template *algt; 287 struct sun8i_ss_dev *ss; 288 struct crypto_engine *engine; 289 struct scatterlist *sg; 290 int nr_sgs, e, i; 291 292 if (sun8i_ss_hash_need_fallback(areq)) 293 return sun8i_ss_hash_digest_fb(areq); 294 295 nr_sgs = sg_nents(areq->src); 296 if (nr_sgs > MAX_SG - 1) 297 return sun8i_ss_hash_digest_fb(areq); 298 299 for_each_sg(areq->src, sg, nr_sgs, i) { 300 if (sg->length % 4 || !IS_ALIGNED(sg->offset, sizeof(u32))) 301 return sun8i_ss_hash_digest_fb(areq); 302 } 303 304 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 305 ss = algt->ss; 306 307 e = sun8i_ss_get_engine_number(ss); 308 rctx->flow = e; 309 engine = ss->flows[e].engine; 310 311 return crypto_transfer_hash_request_to_engine(engine, areq); 312 } 313 314 /* sun8i_ss_hash_run - run an ahash request 315 * Send the data of the request to the SS along with an extra SG with padding 316 */ 317 int sun8i_ss_hash_run(struct crypto_engine *engine, void *breq) 318 { 319 struct ahash_request *areq = container_of(breq, struct ahash_request, base); 320 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); 321 struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); 322 struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); 323 struct sun8i_ss_alg_template *algt; 324 struct sun8i_ss_dev *ss; 325 struct scatterlist *sg; 326 int nr_sgs, err, digestsize; 327 unsigned int len; 328 u64 fill, min_fill, byte_count; 329 void *pad, *result; 330 int j, i, todo; 331 __be64 *bebits; 332 __le64 *lebits; 333 dma_addr_t addr_res, addr_pad; 334 __le32 *bf; 335 336 algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); 337 ss = algt->ss; 338 339 digestsize = algt->alg.hash.halg.digestsize; 340 if (digestsize == SHA224_DIGEST_SIZE) 341 digestsize = SHA256_DIGEST_SIZE; 342 343 /* the padding could be up to two block. */ 344 pad = kzalloc(algt->alg.hash.halg.base.cra_blocksize * 2, GFP_KERNEL | GFP_DMA); 345 if (!pad) 346 return -ENOMEM; 347 bf = (__le32 *)pad; 348 349 result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA); 350 if (!result) 351 return -ENOMEM; 352 353 for (i = 0; i < MAX_SG; i++) { 354 rctx->t_dst[i].addr = 0; 355 rctx->t_dst[i].len = 0; 356 } 357 358 #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG 359 algt->stat_req++; 360 #endif 361 362 rctx->method = ss->variant->alg_hash[algt->ss_algo_id]; 363 364 nr_sgs = dma_map_sg(ss->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); 365 if (nr_sgs <= 0 || nr_sgs > MAX_SG) { 366 dev_err(ss->dev, "Invalid sg number %d\n", nr_sgs); 367 err = -EINVAL; 368 goto theend; 369 } 370 371 addr_res = dma_map_single(ss->dev, result, digestsize, DMA_FROM_DEVICE); 372 if (dma_mapping_error(ss->dev, addr_res)) { 373 dev_err(ss->dev, "DMA map dest\n"); 374 err = -EINVAL; 375 goto theend; 376 } 377 378 len = areq->nbytes; 379 for_each_sg(areq->src, sg, nr_sgs, i) { 380 rctx->t_src[i].addr = sg_dma_address(sg); 381 todo = min(len, sg_dma_len(sg)); 382 rctx->t_src[i].len = todo / 4; 383 len -= todo; 384 rctx->t_dst[i].addr = addr_res; 385 rctx->t_dst[i].len = digestsize / 4; 386 } 387 if (len > 0) { 388 dev_err(ss->dev, "remaining len %d\n", len); 389 err = -EINVAL; 390 goto theend; 391 } 392 393 byte_count = areq->nbytes; 394 j = 0; 395 bf[j++] = cpu_to_le32(0x80); 396 397 fill = 64 - (byte_count % 64); 398 min_fill = 3 * sizeof(u32); 399 400 if (fill < min_fill) 401 fill += 64; 402 403 j += (fill - min_fill) / sizeof(u32); 404 405 switch (algt->ss_algo_id) { 406 case SS_ID_HASH_MD5: 407 lebits = (__le64 *)&bf[j]; 408 *lebits = cpu_to_le64(byte_count << 3); 409 j += 2; 410 break; 411 case SS_ID_HASH_SHA1: 412 case SS_ID_HASH_SHA224: 413 case SS_ID_HASH_SHA256: 414 bebits = (__be64 *)&bf[j]; 415 *bebits = cpu_to_be64(byte_count << 3); 416 j += 2; 417 break; 418 } 419 420 addr_pad = dma_map_single(ss->dev, pad, j * 4, DMA_TO_DEVICE); 421 rctx->t_src[i].addr = addr_pad; 422 rctx->t_src[i].len = j; 423 rctx->t_dst[i].addr = addr_res; 424 rctx->t_dst[i].len = digestsize / 4; 425 if (dma_mapping_error(ss->dev, addr_pad)) { 426 dev_err(ss->dev, "DMA error on padding SG\n"); 427 err = -EINVAL; 428 goto theend; 429 } 430 431 err = sun8i_ss_run_hash_task(ss, rctx, crypto_tfm_alg_name(areq->base.tfm)); 432 433 dma_unmap_single(ss->dev, addr_pad, j * 4, DMA_TO_DEVICE); 434 dma_unmap_sg(ss->dev, areq->src, nr_sgs, DMA_TO_DEVICE); 435 dma_unmap_single(ss->dev, addr_res, digestsize, DMA_FROM_DEVICE); 436 437 kfree(pad); 438 439 memcpy(areq->result, result, algt->alg.hash.halg.digestsize); 440 kfree(result); 441 theend: 442 crypto_finalize_hash_request(engine, breq, err); 443 return 0; 444 } 445