xref: /openbmc/linux/drivers/crypto/Kconfig (revision f17f06a0)
1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4	bool "Hardware crypto devices"
5	default y
6	---help---
7	  Say Y here to get to see options for hardware crypto devices and
8	  processors. This option alone does not add any kernel code.
9
10	  If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17	tristate "Support for VIA PadLock ACE"
18	depends on X86 && !UML
19	help
20	  Some VIA processors come with an integrated crypto engine
21	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
22	  that provides instructions for very fast cryptographic
23	  operations with supported algorithms.
24
25	  The instructions are used only when the CPU supports them.
26	  Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29	tristate "PadLock driver for AES algorithm"
30	depends on CRYPTO_DEV_PADLOCK
31	select CRYPTO_SKCIPHER
32	select CRYPTO_LIB_AES
33	help
34	  Use VIA PadLock for AES algorithm.
35
36	  Available in VIA C3 and newer CPUs.
37
38	  If unsure say M. The compiled module will be
39	  called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42	tristate "PadLock driver for SHA1 and SHA256 algorithms"
43	depends on CRYPTO_DEV_PADLOCK
44	select CRYPTO_HASH
45	select CRYPTO_SHA1
46	select CRYPTO_SHA256
47	help
48	  Use VIA PadLock for SHA1/SHA256 algorithms.
49
50	  Available in VIA C7 and newer processors.
51
52	  If unsure say M. The compiled module will be
53	  called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56	tristate "Support for the Geode LX AES engine"
57	depends on X86_32 && PCI
58	select CRYPTO_ALGAPI
59	select CRYPTO_SKCIPHER
60	help
61	  Say 'Y' here to use the AMD Geode LX processor on-board AES
62	  engine for the CryptoAPI AES algorithm.
63
64	  To compile this driver as a module, choose M here: the module
65	  will be called geode-aes.
66
67config ZCRYPT
68	tristate "Support for s390 cryptographic adapters"
69	depends on S390
70	select HW_RANDOM
71	help
72	  Select this option if you want to enable support for
73	  s390 cryptographic adapters like:
74	  + PCI-X Cryptographic Coprocessor (PCIXCC)
75	  + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
76	  + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
77	  + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
78
79config ZCRYPT_MULTIDEVNODES
80	bool "Support for multiple zcrypt device nodes"
81	default y
82	depends on S390
83	depends on ZCRYPT
84	help
85	  With this option enabled the zcrypt device driver can
86	  provide multiple devices nodes in /dev. Each device
87	  node can get customized to limit access and narrow
88	  down the use of the available crypto hardware.
89
90config PKEY
91	tristate "Kernel API for protected key handling"
92	depends on S390
93	depends on ZCRYPT
94	help
95	  With this option enabled the pkey kernel module provides an API
96	  for creation and handling of protected keys. Other parts of the
97	  kernel or userspace applications may use these functions.
98
99	  Select this option if you want to enable the kernel and userspace
100	  API for proteced key handling.
101
102	  Please note that creation of protected keys from secure keys
103	  requires to have at least one CEX card in coprocessor mode
104	  available at runtime.
105
106config CRYPTO_PAES_S390
107	tristate "PAES cipher algorithms"
108	depends on S390
109	depends on ZCRYPT
110	depends on PKEY
111	select CRYPTO_ALGAPI
112	select CRYPTO_SKCIPHER
113	help
114	  This is the s390 hardware accelerated implementation of the
115	  AES cipher algorithms for use with protected key.
116
117	  Select this option if you want to use the paes cipher
118	  for example to use protected key encrypted devices.
119
120config CRYPTO_SHA1_S390
121	tristate "SHA1 digest algorithm"
122	depends on S390
123	select CRYPTO_HASH
124	help
125	  This is the s390 hardware accelerated implementation of the
126	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
127
128	  It is available as of z990.
129
130config CRYPTO_SHA256_S390
131	tristate "SHA256 digest algorithm"
132	depends on S390
133	select CRYPTO_HASH
134	help
135	  This is the s390 hardware accelerated implementation of the
136	  SHA256 secure hash standard (DFIPS 180-2).
137
138	  It is available as of z9.
139
140config CRYPTO_SHA512_S390
141	tristate "SHA384 and SHA512 digest algorithm"
142	depends on S390
143	select CRYPTO_HASH
144	help
145	  This is the s390 hardware accelerated implementation of the
146	  SHA512 secure hash standard.
147
148	  It is available as of z10.
149
150config CRYPTO_SHA3_256_S390
151	tristate "SHA3_224 and SHA3_256 digest algorithm"
152	depends on S390
153	select CRYPTO_HASH
154	help
155	  This is the s390 hardware accelerated implementation of the
156	  SHA3_256 secure hash standard.
157
158	  It is available as of z14.
159
160config CRYPTO_SHA3_512_S390
161	tristate "SHA3_384 and SHA3_512 digest algorithm"
162	depends on S390
163	select CRYPTO_HASH
164	help
165	  This is the s390 hardware accelerated implementation of the
166	  SHA3_512 secure hash standard.
167
168	  It is available as of z14.
169
170config CRYPTO_DES_S390
171	tristate "DES and Triple DES cipher algorithms"
172	depends on S390
173	select CRYPTO_ALGAPI
174	select CRYPTO_SKCIPHER
175	select CRYPTO_LIB_DES
176	help
177	  This is the s390 hardware accelerated implementation of the
178	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
179
180	  As of z990 the ECB and CBC mode are hardware accelerated.
181	  As of z196 the CTR mode is hardware accelerated.
182
183config CRYPTO_AES_S390
184	tristate "AES cipher algorithms"
185	depends on S390
186	select CRYPTO_ALGAPI
187	select CRYPTO_SKCIPHER
188	help
189	  This is the s390 hardware accelerated implementation of the
190	  AES cipher algorithms (FIPS-197).
191
192	  As of z9 the ECB and CBC modes are hardware accelerated
193	  for 128 bit keys.
194	  As of z10 the ECB and CBC modes are hardware accelerated
195	  for all AES key sizes.
196	  As of z196 the CTR mode is hardware accelerated for all AES
197	  key sizes and XTS mode is hardware accelerated for 256 and
198	  512 bit keys.
199
200config S390_PRNG
201	tristate "Pseudo random number generator device driver"
202	depends on S390
203	default "m"
204	help
205	  Select this option if you want to use the s390 pseudo random number
206	  generator. The PRNG is part of the cryptographic processor functions
207	  and uses triple-DES to generate secure random numbers like the
208	  ANSI X9.17 standard. User-space programs access the
209	  pseudo-random-number device through the char device /dev/prandom.
210
211	  It is available as of z9.
212
213config CRYPTO_GHASH_S390
214	tristate "GHASH hash function"
215	depends on S390
216	select CRYPTO_HASH
217	help
218	  This is the s390 hardware accelerated implementation of GHASH,
219	  the hash function used in GCM (Galois/Counter mode).
220
221	  It is available as of z196.
222
223config CRYPTO_CRC32_S390
224	tristate "CRC-32 algorithms"
225	depends on S390
226	select CRYPTO_HASH
227	select CRC32
228	help
229	  Select this option if you want to use hardware accelerated
230	  implementations of CRC algorithms.  With this option, you
231	  can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
232	  and CRC-32C (Castagnoli).
233
234	  It is available with IBM z13 or later.
235
236config CRYPTO_DEV_MARVELL_CESA
237	tristate "Marvell's Cryptographic Engine driver"
238	depends on PLAT_ORION || ARCH_MVEBU
239	select CRYPTO_LIB_AES
240	select CRYPTO_LIB_DES
241	select CRYPTO_SKCIPHER
242	select CRYPTO_HASH
243	select SRAM
244	help
245	  This driver allows you to utilize the Cryptographic Engines and
246	  Security Accelerator (CESA) which can be found on MVEBU and ORION
247	  platforms.
248	  This driver supports CPU offload through DMA transfers.
249
250config CRYPTO_DEV_NIAGARA2
251	tristate "Niagara2 Stream Processing Unit driver"
252	select CRYPTO_LIB_DES
253	select CRYPTO_SKCIPHER
254	select CRYPTO_HASH
255	select CRYPTO_MD5
256	select CRYPTO_SHA1
257	select CRYPTO_SHA256
258	depends on SPARC64
259	help
260	  Each core of a Niagara2 processor contains a Stream
261	  Processing Unit, which itself contains several cryptographic
262	  sub-units.  One set provides the Modular Arithmetic Unit,
263	  used for SSL offload.  The other set provides the Cipher
264	  Group, which can perform encryption, decryption, hashing,
265	  checksumming, and raw copies.
266
267config CRYPTO_DEV_HIFN_795X
268	tristate "Driver HIFN 795x crypto accelerator chips"
269	select CRYPTO_LIB_DES
270	select CRYPTO_SKCIPHER
271	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
272	depends on PCI
273	depends on !ARCH_DMA_ADDR_T_64BIT
274	help
275	  This option allows you to have support for HIFN 795x crypto adapters.
276
277config CRYPTO_DEV_HIFN_795X_RNG
278	bool "HIFN 795x random number generator"
279	depends on CRYPTO_DEV_HIFN_795X
280	help
281	  Select this option if you want to enable the random number generator
282	  on the HIFN 795x crypto adapters.
283
284source "drivers/crypto/caam/Kconfig"
285
286config CRYPTO_DEV_TALITOS
287	tristate "Talitos Freescale Security Engine (SEC)"
288	select CRYPTO_AEAD
289	select CRYPTO_AUTHENC
290	select CRYPTO_SKCIPHER
291	select CRYPTO_HASH
292	select CRYPTO_LIB_DES
293	select HW_RANDOM
294	depends on FSL_SOC
295	help
296	  Say 'Y' here to use the Freescale Security Engine (SEC)
297	  to offload cryptographic algorithm computation.
298
299	  The Freescale SEC is present on PowerQUICC 'E' processors, such
300	  as the MPC8349E and MPC8548E.
301
302	  To compile this driver as a module, choose M here: the module
303	  will be called talitos.
304
305config CRYPTO_DEV_TALITOS1
306	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
307	depends on CRYPTO_DEV_TALITOS
308	depends on PPC_8xx || PPC_82xx
309	default y
310	help
311	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
312	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
313	  version 1.2 found on MPC8xx
314
315config CRYPTO_DEV_TALITOS2
316	bool "SEC2+ (SEC version 2.0 or upper)"
317	depends on CRYPTO_DEV_TALITOS
318	default y if !PPC_8xx
319	help
320	  Say 'Y' here to use the Freescale Security Engine (SEC)
321	  version 2 and following as found on MPC83xx, MPC85xx, etc ...
322
323config CRYPTO_DEV_IXP4XX
324	tristate "Driver for IXP4xx crypto hardware acceleration"
325	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
326	select CRYPTO_LIB_DES
327	select CRYPTO_AEAD
328	select CRYPTO_AUTHENC
329	select CRYPTO_SKCIPHER
330	help
331	  Driver for the IXP4xx NPE crypto engine.
332
333config CRYPTO_DEV_PPC4XX
334	tristate "Driver AMCC PPC4xx crypto accelerator"
335	depends on PPC && 4xx
336	select CRYPTO_HASH
337	select CRYPTO_AEAD
338	select CRYPTO_AES
339	select CRYPTO_LIB_AES
340	select CRYPTO_CCM
341	select CRYPTO_CTR
342	select CRYPTO_GCM
343	select CRYPTO_SKCIPHER
344	help
345	  This option allows you to have support for AMCC crypto acceleration.
346
347config HW_RANDOM_PPC4XX
348	bool "PowerPC 4xx generic true random number generator support"
349	depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
350	default y
351	---help---
352	 This option provides the kernel-side support for the TRNG hardware
353	 found in the security function of some PowerPC 4xx SoCs.
354
355config CRYPTO_DEV_OMAP
356	tristate "Support for OMAP crypto HW accelerators"
357	depends on ARCH_OMAP2PLUS
358	help
359	  OMAP processors have various crypto HW accelerators. Select this if
360	  you want to use the OMAP modules for any of the crypto algorithms.
361
362if CRYPTO_DEV_OMAP
363
364config CRYPTO_DEV_OMAP_SHAM
365	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
366	depends on ARCH_OMAP2PLUS
367	select CRYPTO_SHA1
368	select CRYPTO_MD5
369	select CRYPTO_SHA256
370	select CRYPTO_SHA512
371	select CRYPTO_HMAC
372	help
373	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
374	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
375
376config CRYPTO_DEV_OMAP_AES
377	tristate "Support for OMAP AES hw engine"
378	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
379	select CRYPTO_AES
380	select CRYPTO_SKCIPHER
381	select CRYPTO_ENGINE
382	select CRYPTO_CBC
383	select CRYPTO_ECB
384	select CRYPTO_CTR
385	select CRYPTO_AEAD
386	help
387	  OMAP processors have AES module accelerator. Select this if you
388	  want to use the OMAP module for AES algorithms.
389
390config CRYPTO_DEV_OMAP_DES
391	tristate "Support for OMAP DES/3DES hw engine"
392	depends on ARCH_OMAP2PLUS
393	select CRYPTO_LIB_DES
394	select CRYPTO_SKCIPHER
395	select CRYPTO_ENGINE
396	help
397	  OMAP processors have DES/3DES module accelerator. Select this if you
398	  want to use the OMAP module for DES and 3DES algorithms. Currently
399	  the ECB and CBC modes of operation are supported by the driver. Also
400	  accesses made on unaligned boundaries are supported.
401
402endif # CRYPTO_DEV_OMAP
403
404config CRYPTO_DEV_PICOXCELL
405	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
406	depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
407	select CRYPTO_AEAD
408	select CRYPTO_AES
409	select CRYPTO_AUTHENC
410	select CRYPTO_SKCIPHER
411	select CRYPTO_LIB_DES
412	select CRYPTO_CBC
413	select CRYPTO_ECB
414	select CRYPTO_SEQIV
415	help
416	  This option enables support for the hardware offload engines in the
417	  Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
418	  and for 3gpp Layer 2 ciphering support.
419
420	  Saying m here will build a module named picoxcell_crypto.
421
422config CRYPTO_DEV_SAHARA
423	tristate "Support for SAHARA crypto accelerator"
424	depends on ARCH_MXC && OF
425	select CRYPTO_SKCIPHER
426	select CRYPTO_AES
427	select CRYPTO_ECB
428	help
429	  This option enables support for the SAHARA HW crypto accelerator
430	  found in some Freescale i.MX chips.
431
432config CRYPTO_DEV_EXYNOS_RNG
433	tristate "Exynos HW pseudo random number generator support"
434	depends on ARCH_EXYNOS || COMPILE_TEST
435	depends on HAS_IOMEM
436	select CRYPTO_RNG
437	---help---
438	  This driver provides kernel-side support through the
439	  cryptographic API for the pseudo random number generator hardware
440	  found on Exynos SoCs.
441
442	  To compile this driver as a module, choose M here: the
443	  module will be called exynos-rng.
444
445	  If unsure, say Y.
446
447config CRYPTO_DEV_S5P
448	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
449	depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
450	depends on HAS_IOMEM
451	select CRYPTO_AES
452	select CRYPTO_SKCIPHER
453	help
454	  This option allows you to have support for S5P crypto acceleration.
455	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
456	  algorithms execution.
457
458config CRYPTO_DEV_EXYNOS_HASH
459	bool "Support for Samsung Exynos HASH accelerator"
460	depends on CRYPTO_DEV_S5P
461	depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
462	select CRYPTO_SHA1
463	select CRYPTO_MD5
464	select CRYPTO_SHA256
465	help
466	  Select this to offload Exynos from HASH MD5/SHA1/SHA256.
467	  This will select software SHA1, MD5 and SHA256 as they are
468	  needed for small and zero-size messages.
469	  HASH algorithms will be disabled if EXYNOS_RNG
470	  is enabled due to hw conflict.
471
472config CRYPTO_DEV_NX
473	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
474	depends on PPC64
475	help
476	  This enables support for the NX hardware cryptographic accelerator
477	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
478	  does not actually enable any drivers, it only allows you to select
479	  which acceleration type (encryption and/or compression) to enable.
480
481if CRYPTO_DEV_NX
482	source "drivers/crypto/nx/Kconfig"
483endif
484
485config CRYPTO_DEV_UX500
486	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
487	depends on ARCH_U8500
488	help
489	  Driver for ST-Ericsson UX500 crypto engine.
490
491if CRYPTO_DEV_UX500
492	source "drivers/crypto/ux500/Kconfig"
493endif # if CRYPTO_DEV_UX500
494
495config CRYPTO_DEV_ATMEL_AUTHENC
496	bool "Support for Atmel IPSEC/SSL hw accelerator"
497	depends on ARCH_AT91 || COMPILE_TEST
498	depends on CRYPTO_DEV_ATMEL_AES
499	help
500	  Some Atmel processors can combine the AES and SHA hw accelerators
501	  to enhance support of IPSEC/SSL.
502	  Select this if you want to use the Atmel modules for
503	  authenc(hmac(shaX),Y(cbc)) algorithms.
504
505config CRYPTO_DEV_ATMEL_AES
506	tristate "Support for Atmel AES hw accelerator"
507	depends on ARCH_AT91 || COMPILE_TEST
508	select CRYPTO_AES
509	select CRYPTO_AEAD
510	select CRYPTO_SKCIPHER
511	select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
512	select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
513	help
514	  Some Atmel processors have AES hw accelerator.
515	  Select this if you want to use the Atmel module for
516	  AES algorithms.
517
518	  To compile this driver as a module, choose M here: the module
519	  will be called atmel-aes.
520
521config CRYPTO_DEV_ATMEL_TDES
522	tristate "Support for Atmel DES/TDES hw accelerator"
523	depends on ARCH_AT91 || COMPILE_TEST
524	select CRYPTO_LIB_DES
525	select CRYPTO_SKCIPHER
526	help
527	  Some Atmel processors have DES/TDES hw accelerator.
528	  Select this if you want to use the Atmel module for
529	  DES/TDES algorithms.
530
531	  To compile this driver as a module, choose M here: the module
532	  will be called atmel-tdes.
533
534config CRYPTO_DEV_ATMEL_SHA
535	tristate "Support for Atmel SHA hw accelerator"
536	depends on ARCH_AT91 || COMPILE_TEST
537	select CRYPTO_HASH
538	help
539	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
540	  hw accelerator.
541	  Select this if you want to use the Atmel module for
542	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
543
544	  To compile this driver as a module, choose M here: the module
545	  will be called atmel-sha.
546
547config CRYPTO_DEV_ATMEL_I2C
548	tristate
549
550config CRYPTO_DEV_ATMEL_ECC
551	tristate "Support for Microchip / Atmel ECC hw accelerator"
552	depends on I2C
553	select CRYPTO_DEV_ATMEL_I2C
554	select CRYPTO_ECDH
555	select CRC16
556	help
557	  Microhip / Atmel ECC hw accelerator.
558	  Select this if you want to use the Microchip / Atmel module for
559	  ECDH algorithm.
560
561	  To compile this driver as a module, choose M here: the module
562	  will be called atmel-ecc.
563
564config CRYPTO_DEV_ATMEL_SHA204A
565	tristate "Support for Microchip / Atmel SHA accelerator and RNG"
566	depends on I2C
567	select CRYPTO_DEV_ATMEL_I2C
568	select HW_RANDOM
569	select CRC16
570	help
571	  Microhip / Atmel SHA accelerator and RNG.
572	  Select this if you want to use the Microchip / Atmel SHA204A
573	  module as a random number generator. (Other functions of the
574	  chip are currently not exposed by this driver)
575
576	  To compile this driver as a module, choose M here: the module
577	  will be called atmel-sha204a.
578
579config CRYPTO_DEV_CCP
580	bool "Support for AMD Secure Processor"
581	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
582	help
583	  The AMD Secure Processor provides support for the Cryptographic Coprocessor
584	  (CCP) and the Platform Security Processor (PSP) devices.
585
586if CRYPTO_DEV_CCP
587	source "drivers/crypto/ccp/Kconfig"
588endif
589
590config CRYPTO_DEV_MXS_DCP
591	tristate "Support for Freescale MXS DCP"
592	depends on (ARCH_MXS || ARCH_MXC)
593	select STMP_DEVICE
594	select CRYPTO_CBC
595	select CRYPTO_ECB
596	select CRYPTO_AES
597	select CRYPTO_SKCIPHER
598	select CRYPTO_HASH
599	help
600	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
601	  co-processor on the die.
602
603	  To compile this driver as a module, choose M here: the module
604	  will be called mxs-dcp.
605
606source "drivers/crypto/qat/Kconfig"
607source "drivers/crypto/cavium/cpt/Kconfig"
608source "drivers/crypto/cavium/nitrox/Kconfig"
609
610config CRYPTO_DEV_CAVIUM_ZIP
611	tristate "Cavium ZIP driver"
612	depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
613	---help---
614	  Select this option if you want to enable compression/decompression
615	  acceleration on Cavium's ARM based SoCs
616
617config CRYPTO_DEV_QCE
618	tristate "Qualcomm crypto engine accelerator"
619	depends on ARCH_QCOM || COMPILE_TEST
620	depends on HAS_IOMEM
621	help
622	  This driver supports Qualcomm crypto engine accelerator
623	  hardware. To compile this driver as a module, choose M here. The
624	  module will be called qcrypto.
625
626config CRYPTO_DEV_QCE_SKCIPHER
627	bool
628	depends on CRYPTO_DEV_QCE
629	select CRYPTO_AES
630	select CRYPTO_LIB_DES
631	select CRYPTO_ECB
632	select CRYPTO_CBC
633	select CRYPTO_XTS
634	select CRYPTO_CTR
635	select CRYPTO_SKCIPHER
636
637config CRYPTO_DEV_QCE_SHA
638	bool
639	depends on CRYPTO_DEV_QCE
640
641choice
642	prompt "Algorithms enabled for QCE acceleration"
643	default CRYPTO_DEV_QCE_ENABLE_ALL
644	depends on CRYPTO_DEV_QCE
645	help
646	  This option allows to choose whether to build support for all algorihtms
647	  (default), hashes-only, or skciphers-only.
648
649	  The QCE engine does not appear to scale as well as the CPU to handle
650	  multiple crypto requests.  While the ipq40xx chips have 4-core CPUs, the
651	  QCE handles only 2 requests in parallel.
652
653	  Ipsec throughput seems to improve when disabling either family of
654	  algorithms, sharing the load with the CPU.  Enabling skciphers-only
655	  appears to work best.
656
657	config CRYPTO_DEV_QCE_ENABLE_ALL
658		bool "All supported algorithms"
659		select CRYPTO_DEV_QCE_SKCIPHER
660		select CRYPTO_DEV_QCE_SHA
661		help
662		  Enable all supported algorithms:
663			- AES (CBC, CTR, ECB, XTS)
664			- 3DES (CBC, ECB)
665			- DES (CBC, ECB)
666			- SHA1, HMAC-SHA1
667			- SHA256, HMAC-SHA256
668
669	config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
670		bool "Symmetric-key ciphers only"
671		select CRYPTO_DEV_QCE_SKCIPHER
672		help
673		  Enable symmetric-key ciphers only:
674			- AES (CBC, CTR, ECB, XTS)
675			- 3DES (ECB, CBC)
676			- DES (ECB, CBC)
677
678	config CRYPTO_DEV_QCE_ENABLE_SHA
679		bool "Hash/HMAC only"
680		select CRYPTO_DEV_QCE_SHA
681		help
682		  Enable hashes/HMAC algorithms only:
683			- SHA1, HMAC-SHA1
684			- SHA256, HMAC-SHA256
685
686endchoice
687
688config CRYPTO_DEV_QCOM_RNG
689	tristate "Qualcomm Random Number Generator Driver"
690	depends on ARCH_QCOM || COMPILE_TEST
691	select CRYPTO_RNG
692	help
693	  This driver provides support for the Random Number
694	  Generator hardware found on Qualcomm SoCs.
695
696	  To compile this driver as a module, choose M here. The
697	  module will be called qcom-rng. If unsure, say N.
698
699config CRYPTO_DEV_VMX
700	bool "Support for VMX cryptographic acceleration instructions"
701	depends on PPC64 && VSX
702	help
703	  Support for VMX cryptographic acceleration instructions.
704
705source "drivers/crypto/vmx/Kconfig"
706
707config CRYPTO_DEV_IMGTEC_HASH
708	tristate "Imagination Technologies hardware hash accelerator"
709	depends on MIPS || COMPILE_TEST
710	select CRYPTO_MD5
711	select CRYPTO_SHA1
712	select CRYPTO_SHA256
713	select CRYPTO_HASH
714	help
715	  This driver interfaces with the Imagination Technologies
716	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
717	  hashing algorithms.
718
719config CRYPTO_DEV_ROCKCHIP
720	tristate "Rockchip's Cryptographic Engine driver"
721	depends on OF && ARCH_ROCKCHIP
722	select CRYPTO_AES
723	select CRYPTO_LIB_DES
724	select CRYPTO_MD5
725	select CRYPTO_SHA1
726	select CRYPTO_SHA256
727	select CRYPTO_HASH
728	select CRYPTO_SKCIPHER
729
730	help
731	  This driver interfaces with the hardware crypto accelerator.
732	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
733
734config CRYPTO_DEV_MEDIATEK
735	tristate "MediaTek's EIP97 Cryptographic Engine driver"
736	depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
737	select CRYPTO_AES
738	select CRYPTO_AEAD
739	select CRYPTO_SKCIPHER
740	select CRYPTO_CTR
741	select CRYPTO_SHA1
742	select CRYPTO_SHA256
743	select CRYPTO_SHA512
744	select CRYPTO_HMAC
745	help
746	  This driver allows you to utilize the hardware crypto accelerator
747	  EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
748	  Select this if you want to use it for AES/SHA1/SHA2 algorithms.
749
750source "drivers/crypto/chelsio/Kconfig"
751
752source "drivers/crypto/virtio/Kconfig"
753
754config CRYPTO_DEV_BCM_SPU
755	tristate "Broadcom symmetric crypto/hash acceleration support"
756	depends on ARCH_BCM_IPROC
757	depends on MAILBOX
758	default m
759	select CRYPTO_AUTHENC
760	select CRYPTO_LIB_DES
761	select CRYPTO_MD5
762	select CRYPTO_SHA1
763	select CRYPTO_SHA256
764	select CRYPTO_SHA512
765	help
766	  This driver provides support for Broadcom crypto acceleration using the
767	  Secure Processing Unit (SPU). The SPU driver registers skcipher,
768	  ahash, and aead algorithms with the kernel cryptographic API.
769
770source "drivers/crypto/stm32/Kconfig"
771
772config CRYPTO_DEV_SAFEXCEL
773	tristate "Inside Secure's SafeXcel cryptographic engine driver"
774	depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
775	select CRYPTO_LIB_AES
776	select CRYPTO_AUTHENC
777	select CRYPTO_SKCIPHER
778	select CRYPTO_LIB_DES
779	select CRYPTO_HASH
780	select CRYPTO_HMAC
781	select CRYPTO_MD5
782	select CRYPTO_SHA1
783	select CRYPTO_SHA256
784	select CRYPTO_SHA512
785	select CRYPTO_CHACHA20POLY1305
786	select CRYPTO_SHA3
787	help
788	  This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
789	  engines designed by Inside Secure. It currently accelerates DES, 3DES and
790	  AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
791	  SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
792	  Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
793
794config CRYPTO_DEV_ARTPEC6
795	tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
796	depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
797	depends on OF
798	select CRYPTO_AEAD
799	select CRYPTO_AES
800	select CRYPTO_ALGAPI
801	select CRYPTO_SKCIPHER
802	select CRYPTO_CTR
803	select CRYPTO_HASH
804	select CRYPTO_SHA1
805	select CRYPTO_SHA256
806	select CRYPTO_SHA512
807	help
808	  Enables the driver for the on-chip crypto accelerator
809	  of Axis ARTPEC SoCs.
810
811	  To compile this driver as a module, choose M here.
812
813config CRYPTO_DEV_CCREE
814	tristate "Support for ARM TrustZone CryptoCell family of security processors"
815	depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
816	default n
817	select CRYPTO_HASH
818	select CRYPTO_SKCIPHER
819	select CRYPTO_LIB_DES
820	select CRYPTO_AEAD
821	select CRYPTO_AUTHENC
822	select CRYPTO_SHA1
823	select CRYPTO_MD5
824	select CRYPTO_SHA256
825	select CRYPTO_SHA512
826	select CRYPTO_HMAC
827	select CRYPTO_AES
828	select CRYPTO_CBC
829	select CRYPTO_ECB
830	select CRYPTO_CTR
831	select CRYPTO_XTS
832	select CRYPTO_SM4
833	select CRYPTO_SM3
834	help
835	  Say 'Y' to enable a driver for the REE interface of the Arm
836	  TrustZone CryptoCell family of processors. Currently the
837	  CryptoCell 713, 703, 712, 710 and 630 are supported.
838	  Choose this if you wish to use hardware acceleration of
839	  cryptographic operations on the system REE.
840	  If unsure say Y.
841
842source "drivers/crypto/hisilicon/Kconfig"
843
844source "drivers/crypto/amlogic/Kconfig"
845
846endif # CRYPTO_HW
847