1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 help 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14source "drivers/crypto/allwinner/Kconfig" 15 16config CRYPTO_DEV_PADLOCK 17 tristate "Support for VIA PadLock ACE" 18 depends on X86 && !UML 19 help 20 Some VIA processors come with an integrated crypto engine 21 (so called VIA PadLock ACE, Advanced Cryptography Engine) 22 that provides instructions for very fast cryptographic 23 operations with supported algorithms. 24 25 The instructions are used only when the CPU supports them. 26 Otherwise software encryption is used. 27 28config CRYPTO_DEV_PADLOCK_AES 29 tristate "PadLock driver for AES algorithm" 30 depends on CRYPTO_DEV_PADLOCK 31 select CRYPTO_SKCIPHER 32 select CRYPTO_LIB_AES 33 help 34 Use VIA PadLock for AES algorithm. 35 36 Available in VIA C3 and newer CPUs. 37 38 If unsure say M. The compiled module will be 39 called padlock-aes. 40 41config CRYPTO_DEV_PADLOCK_SHA 42 tristate "PadLock driver for SHA1 and SHA256 algorithms" 43 depends on CRYPTO_DEV_PADLOCK 44 select CRYPTO_HASH 45 select CRYPTO_SHA1 46 select CRYPTO_SHA256 47 help 48 Use VIA PadLock for SHA1/SHA256 algorithms. 49 50 Available in VIA C7 and newer processors. 51 52 If unsure say M. The compiled module will be 53 called padlock-sha. 54 55config CRYPTO_DEV_GEODE 56 tristate "Support for the Geode LX AES engine" 57 depends on X86_32 && PCI 58 select CRYPTO_ALGAPI 59 select CRYPTO_SKCIPHER 60 help 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 engine for the CryptoAPI AES algorithm. 63 64 To compile this driver as a module, choose M here: the module 65 will be called geode-aes. 66 67config ZCRYPT 68 tristate "Support for s390 cryptographic adapters" 69 depends on S390 70 select HW_RANDOM 71 help 72 Select this option if you want to enable support for 73 s390 cryptographic adapters like: 74 + Crypto Express 2 up to 7 Coprocessor (CEXxC) 75 + Crypto Express 2 up to 7 Accelerator (CEXxA) 76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) 77 78config ZCRYPT_DEBUG 79 bool "Enable debug features for s390 cryptographic adapters" 80 default n 81 depends on DEBUG_KERNEL 82 depends on ZCRYPT 83 help 84 Say 'Y' here to enable some additional debug features on the 85 s390 cryptographic adapters driver. 86 87 There will be some more sysfs attributes displayed for ap cards 88 and queues and some flags on crypto requests are interpreted as 89 debugging messages to force error injection. 90 91 Do not enable on production level kernel build. 92 93 If unsure, say N. 94 95config PKEY 96 tristate "Kernel API for protected key handling" 97 depends on S390 98 depends on ZCRYPT 99 help 100 With this option enabled the pkey kernel module provides an API 101 for creation and handling of protected keys. Other parts of the 102 kernel or userspace applications may use these functions. 103 104 Select this option if you want to enable the kernel and userspace 105 API for proteced key handling. 106 107 Please note that creation of protected keys from secure keys 108 requires to have at least one CEX card in coprocessor mode 109 available at runtime. 110 111config CRYPTO_PAES_S390 112 tristate "PAES cipher algorithms" 113 depends on S390 114 depends on ZCRYPT 115 depends on PKEY 116 select CRYPTO_ALGAPI 117 select CRYPTO_SKCIPHER 118 help 119 This is the s390 hardware accelerated implementation of the 120 AES cipher algorithms for use with protected key. 121 122 Select this option if you want to use the paes cipher 123 for example to use protected key encrypted devices. 124 125config S390_PRNG 126 tristate "Pseudo random number generator device driver" 127 depends on S390 128 default "m" 129 help 130 Select this option if you want to use the s390 pseudo random number 131 generator. The PRNG is part of the cryptographic processor functions 132 and uses triple-DES to generate secure random numbers like the 133 ANSI X9.17 standard. User-space programs access the 134 pseudo-random-number device through the char device /dev/prandom. 135 136 It is available as of z9. 137 138config CRYPTO_DEV_NIAGARA2 139 tristate "Niagara2 Stream Processing Unit driver" 140 select CRYPTO_LIB_DES 141 select CRYPTO_SKCIPHER 142 select CRYPTO_HASH 143 select CRYPTO_MD5 144 select CRYPTO_SHA1 145 select CRYPTO_SHA256 146 depends on SPARC64 147 help 148 Each core of a Niagara2 processor contains a Stream 149 Processing Unit, which itself contains several cryptographic 150 sub-units. One set provides the Modular Arithmetic Unit, 151 used for SSL offload. The other set provides the Cipher 152 Group, which can perform encryption, decryption, hashing, 153 checksumming, and raw copies. 154 155config CRYPTO_DEV_SL3516 156 tristate "Storlink SL3516 crypto offloader" 157 depends on ARCH_GEMINI || COMPILE_TEST 158 depends on HAS_IOMEM && PM 159 select CRYPTO_SKCIPHER 160 select CRYPTO_ENGINE 161 select CRYPTO_ECB 162 select CRYPTO_AES 163 select HW_RANDOM 164 help 165 This option allows you to have support for SL3516 crypto offloader. 166 167config CRYPTO_DEV_SL3516_DEBUG 168 bool "Enable SL3516 stats" 169 depends on CRYPTO_DEV_SL3516 170 depends on DEBUG_FS 171 help 172 Say y to enable SL3516 debug stats. 173 This will create /sys/kernel/debug/sl3516/stats for displaying 174 the number of requests per algorithm and other internal stats. 175 176config CRYPTO_DEV_HIFN_795X 177 tristate "Driver HIFN 795x crypto accelerator chips" 178 select CRYPTO_LIB_DES 179 select CRYPTO_SKCIPHER 180 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 181 depends on PCI 182 depends on !ARCH_DMA_ADDR_T_64BIT 183 help 184 This option allows you to have support for HIFN 795x crypto adapters. 185 186config CRYPTO_DEV_HIFN_795X_RNG 187 bool "HIFN 795x random number generator" 188 depends on CRYPTO_DEV_HIFN_795X 189 help 190 Select this option if you want to enable the random number generator 191 on the HIFN 795x crypto adapters. 192 193source "drivers/crypto/caam/Kconfig" 194 195config CRYPTO_DEV_TALITOS 196 tristate "Talitos Freescale Security Engine (SEC)" 197 select CRYPTO_AEAD 198 select CRYPTO_AUTHENC 199 select CRYPTO_SKCIPHER 200 select CRYPTO_HASH 201 select CRYPTO_LIB_DES 202 select HW_RANDOM 203 depends on FSL_SOC 204 help 205 Say 'Y' here to use the Freescale Security Engine (SEC) 206 to offload cryptographic algorithm computation. 207 208 The Freescale SEC is present on PowerQUICC 'E' processors, such 209 as the MPC8349E and MPC8548E. 210 211 To compile this driver as a module, choose M here: the module 212 will be called talitos. 213 214config CRYPTO_DEV_TALITOS1 215 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 216 depends on CRYPTO_DEV_TALITOS 217 depends on PPC_8xx || PPC_82xx 218 default y 219 help 220 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 221 found on MPC82xx or the Freescale Security Engine (SEC Lite) 222 version 1.2 found on MPC8xx 223 224config CRYPTO_DEV_TALITOS2 225 bool "SEC2+ (SEC version 2.0 or upper)" 226 depends on CRYPTO_DEV_TALITOS 227 default y if !PPC_8xx 228 help 229 Say 'Y' here to use the Freescale Security Engine (SEC) 230 version 2 and following as found on MPC83xx, MPC85xx, etc ... 231 232config CRYPTO_DEV_PPC4XX 233 tristate "Driver AMCC PPC4xx crypto accelerator" 234 depends on PPC && 4xx 235 select CRYPTO_HASH 236 select CRYPTO_AEAD 237 select CRYPTO_AES 238 select CRYPTO_LIB_AES 239 select CRYPTO_CCM 240 select CRYPTO_CTR 241 select CRYPTO_GCM 242 select CRYPTO_SKCIPHER 243 help 244 This option allows you to have support for AMCC crypto acceleration. 245 246config HW_RANDOM_PPC4XX 247 bool "PowerPC 4xx generic true random number generator support" 248 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y 249 default y 250 help 251 This option provides the kernel-side support for the TRNG hardware 252 found in the security function of some PowerPC 4xx SoCs. 253 254config CRYPTO_DEV_OMAP 255 tristate "Support for OMAP crypto HW accelerators" 256 depends on ARCH_OMAP2PLUS 257 help 258 OMAP processors have various crypto HW accelerators. Select this if 259 you want to use the OMAP modules for any of the crypto algorithms. 260 261if CRYPTO_DEV_OMAP 262 263config CRYPTO_DEV_OMAP_SHAM 264 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 265 depends on ARCH_OMAP2PLUS 266 select CRYPTO_ENGINE 267 select CRYPTO_SHA1 268 select CRYPTO_MD5 269 select CRYPTO_SHA256 270 select CRYPTO_SHA512 271 select CRYPTO_HMAC 272 help 273 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 274 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 275 276config CRYPTO_DEV_OMAP_AES 277 tristate "Support for OMAP AES hw engine" 278 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 279 select CRYPTO_AES 280 select CRYPTO_SKCIPHER 281 select CRYPTO_ENGINE 282 select CRYPTO_CBC 283 select CRYPTO_ECB 284 select CRYPTO_CTR 285 select CRYPTO_AEAD 286 help 287 OMAP processors have AES module accelerator. Select this if you 288 want to use the OMAP module for AES algorithms. 289 290config CRYPTO_DEV_OMAP_DES 291 tristate "Support for OMAP DES/3DES hw engine" 292 depends on ARCH_OMAP2PLUS 293 select CRYPTO_LIB_DES 294 select CRYPTO_SKCIPHER 295 select CRYPTO_ENGINE 296 help 297 OMAP processors have DES/3DES module accelerator. Select this if you 298 want to use the OMAP module for DES and 3DES algorithms. Currently 299 the ECB and CBC modes of operation are supported by the driver. Also 300 accesses made on unaligned boundaries are supported. 301 302endif # CRYPTO_DEV_OMAP 303 304config CRYPTO_DEV_SAHARA 305 tristate "Support for SAHARA crypto accelerator" 306 depends on ARCH_MXC && OF 307 select CRYPTO_SKCIPHER 308 select CRYPTO_AES 309 select CRYPTO_ECB 310 help 311 This option enables support for the SAHARA HW crypto accelerator 312 found in some Freescale i.MX chips. 313 314config CRYPTO_DEV_EXYNOS_RNG 315 tristate "Exynos HW pseudo random number generator support" 316 depends on ARCH_EXYNOS || COMPILE_TEST 317 depends on HAS_IOMEM 318 select CRYPTO_RNG 319 help 320 This driver provides kernel-side support through the 321 cryptographic API for the pseudo random number generator hardware 322 found on Exynos SoCs. 323 324 To compile this driver as a module, choose M here: the 325 module will be called exynos-rng. 326 327 If unsure, say Y. 328 329config CRYPTO_DEV_S5P 330 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 331 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 332 depends on HAS_IOMEM 333 select CRYPTO_AES 334 select CRYPTO_SKCIPHER 335 help 336 This option allows you to have support for S5P crypto acceleration. 337 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 338 algorithms execution. 339 340config CRYPTO_DEV_EXYNOS_HASH 341 bool "Support for Samsung Exynos HASH accelerator" 342 depends on CRYPTO_DEV_S5P 343 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 344 select CRYPTO_SHA1 345 select CRYPTO_MD5 346 select CRYPTO_SHA256 347 help 348 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 349 This will select software SHA1, MD5 and SHA256 as they are 350 needed for small and zero-size messages. 351 HASH algorithms will be disabled if EXYNOS_RNG 352 is enabled due to hw conflict. 353 354config CRYPTO_DEV_NX 355 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 356 depends on PPC64 357 help 358 This enables support for the NX hardware cryptographic accelerator 359 coprocessor that is in IBM PowerPC P7+ or later processors. This 360 does not actually enable any drivers, it only allows you to select 361 which acceleration type (encryption and/or compression) to enable. 362 363if CRYPTO_DEV_NX 364 source "drivers/crypto/nx/Kconfig" 365endif 366 367config CRYPTO_DEV_ATMEL_AUTHENC 368 bool "Support for Atmel IPSEC/SSL hw accelerator" 369 depends on ARCH_AT91 || COMPILE_TEST 370 depends on CRYPTO_DEV_ATMEL_AES 371 help 372 Some Atmel processors can combine the AES and SHA hw accelerators 373 to enhance support of IPSEC/SSL. 374 Select this if you want to use the Atmel modules for 375 authenc(hmac(shaX),Y(cbc)) algorithms. 376 377config CRYPTO_DEV_ATMEL_AES 378 tristate "Support for Atmel AES hw accelerator" 379 depends on ARCH_AT91 || COMPILE_TEST 380 select CRYPTO_AES 381 select CRYPTO_AEAD 382 select CRYPTO_SKCIPHER 383 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC 384 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC 385 help 386 Some Atmel processors have AES hw accelerator. 387 Select this if you want to use the Atmel module for 388 AES algorithms. 389 390 To compile this driver as a module, choose M here: the module 391 will be called atmel-aes. 392 393config CRYPTO_DEV_ATMEL_TDES 394 tristate "Support for Atmel DES/TDES hw accelerator" 395 depends on ARCH_AT91 || COMPILE_TEST 396 select CRYPTO_LIB_DES 397 select CRYPTO_SKCIPHER 398 help 399 Some Atmel processors have DES/TDES hw accelerator. 400 Select this if you want to use the Atmel module for 401 DES/TDES algorithms. 402 403 To compile this driver as a module, choose M here: the module 404 will be called atmel-tdes. 405 406config CRYPTO_DEV_ATMEL_SHA 407 tristate "Support for Atmel SHA hw accelerator" 408 depends on ARCH_AT91 || COMPILE_TEST 409 select CRYPTO_HASH 410 help 411 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 412 hw accelerator. 413 Select this if you want to use the Atmel module for 414 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 415 416 To compile this driver as a module, choose M here: the module 417 will be called atmel-sha. 418 419config CRYPTO_DEV_ATMEL_I2C 420 tristate 421 select BITREVERSE 422 423config CRYPTO_DEV_ATMEL_ECC 424 tristate "Support for Microchip / Atmel ECC hw accelerator" 425 depends on I2C 426 select CRYPTO_DEV_ATMEL_I2C 427 select CRYPTO_ECDH 428 select CRC16 429 help 430 Microhip / Atmel ECC hw accelerator. 431 Select this if you want to use the Microchip / Atmel module for 432 ECDH algorithm. 433 434 To compile this driver as a module, choose M here: the module 435 will be called atmel-ecc. 436 437config CRYPTO_DEV_ATMEL_SHA204A 438 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 439 depends on I2C 440 select CRYPTO_DEV_ATMEL_I2C 441 select HW_RANDOM 442 select CRC16 443 help 444 Microhip / Atmel SHA accelerator and RNG. 445 Select this if you want to use the Microchip / Atmel SHA204A 446 module as a random number generator. (Other functions of the 447 chip are currently not exposed by this driver) 448 449 To compile this driver as a module, choose M here: the module 450 will be called atmel-sha204a. 451 452config CRYPTO_DEV_CCP 453 bool "Support for AMD Secure Processor" 454 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 455 help 456 The AMD Secure Processor provides support for the Cryptographic Coprocessor 457 (CCP) and the Platform Security Processor (PSP) devices. 458 459if CRYPTO_DEV_CCP 460 source "drivers/crypto/ccp/Kconfig" 461endif 462 463config CRYPTO_DEV_MXS_DCP 464 tristate "Support for Freescale MXS DCP" 465 depends on (ARCH_MXS || ARCH_MXC) 466 select STMP_DEVICE 467 select CRYPTO_CBC 468 select CRYPTO_ECB 469 select CRYPTO_AES 470 select CRYPTO_SKCIPHER 471 select CRYPTO_HASH 472 help 473 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 474 co-processor on the die. 475 476 To compile this driver as a module, choose M here: the module 477 will be called mxs-dcp. 478 479source "drivers/crypto/cavium/cpt/Kconfig" 480source "drivers/crypto/cavium/nitrox/Kconfig" 481source "drivers/crypto/marvell/Kconfig" 482source "drivers/crypto/intel/Kconfig" 483 484config CRYPTO_DEV_CAVIUM_ZIP 485 tristate "Cavium ZIP driver" 486 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 487 help 488 Select this option if you want to enable compression/decompression 489 acceleration on Cavium's ARM based SoCs 490 491config CRYPTO_DEV_QCE 492 tristate "Qualcomm crypto engine accelerator" 493 depends on ARCH_QCOM || COMPILE_TEST 494 depends on HAS_IOMEM 495 help 496 This driver supports Qualcomm crypto engine accelerator 497 hardware. To compile this driver as a module, choose M here. The 498 module will be called qcrypto. 499 500config CRYPTO_DEV_QCE_SKCIPHER 501 bool 502 depends on CRYPTO_DEV_QCE 503 select CRYPTO_AES 504 select CRYPTO_LIB_DES 505 select CRYPTO_ECB 506 select CRYPTO_CBC 507 select CRYPTO_XTS 508 select CRYPTO_CTR 509 select CRYPTO_SKCIPHER 510 511config CRYPTO_DEV_QCE_SHA 512 bool 513 depends on CRYPTO_DEV_QCE 514 select CRYPTO_SHA1 515 select CRYPTO_SHA256 516 517config CRYPTO_DEV_QCE_AEAD 518 bool 519 depends on CRYPTO_DEV_QCE 520 select CRYPTO_AUTHENC 521 select CRYPTO_LIB_DES 522 523choice 524 prompt "Algorithms enabled for QCE acceleration" 525 default CRYPTO_DEV_QCE_ENABLE_ALL 526 depends on CRYPTO_DEV_QCE 527 help 528 This option allows to choose whether to build support for all algorithms 529 (default), hashes-only, or skciphers-only. 530 531 The QCE engine does not appear to scale as well as the CPU to handle 532 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the 533 QCE handles only 2 requests in parallel. 534 535 Ipsec throughput seems to improve when disabling either family of 536 algorithms, sharing the load with the CPU. Enabling skciphers-only 537 appears to work best. 538 539 config CRYPTO_DEV_QCE_ENABLE_ALL 540 bool "All supported algorithms" 541 select CRYPTO_DEV_QCE_SKCIPHER 542 select CRYPTO_DEV_QCE_SHA 543 select CRYPTO_DEV_QCE_AEAD 544 help 545 Enable all supported algorithms: 546 - AES (CBC, CTR, ECB, XTS) 547 - 3DES (CBC, ECB) 548 - DES (CBC, ECB) 549 - SHA1, HMAC-SHA1 550 - SHA256, HMAC-SHA256 551 552 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER 553 bool "Symmetric-key ciphers only" 554 select CRYPTO_DEV_QCE_SKCIPHER 555 help 556 Enable symmetric-key ciphers only: 557 - AES (CBC, CTR, ECB, XTS) 558 - 3DES (ECB, CBC) 559 - DES (ECB, CBC) 560 561 config CRYPTO_DEV_QCE_ENABLE_SHA 562 bool "Hash/HMAC only" 563 select CRYPTO_DEV_QCE_SHA 564 help 565 Enable hashes/HMAC algorithms only: 566 - SHA1, HMAC-SHA1 567 - SHA256, HMAC-SHA256 568 569 config CRYPTO_DEV_QCE_ENABLE_AEAD 570 bool "AEAD algorithms only" 571 select CRYPTO_DEV_QCE_AEAD 572 help 573 Enable AEAD algorithms only: 574 - authenc() 575 - ccm(aes) 576 - rfc4309(ccm(aes)) 577endchoice 578 579config CRYPTO_DEV_QCE_SW_MAX_LEN 580 int "Default maximum request size to use software for AES" 581 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER 582 default 512 583 help 584 This sets the default maximum request size to perform AES requests 585 using software instead of the crypto engine. It can be changed by 586 setting the aes_sw_max_len parameter. 587 588 Small blocks are processed faster in software than hardware. 589 Considering the 256-bit ciphers, software is 2-3 times faster than 590 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. 591 With 128-bit keys, the break-even point would be around 1024-bytes. 592 593 The default is set a little lower, to 512 bytes, to balance the 594 cost in CPU usage. The minimum recommended setting is 16-bytes 595 (1 AES block), since AES-GCM will fail if you set it lower. 596 Setting this to zero will send all requests to the hardware. 597 598 Note that 192-bit keys are not supported by the hardware and are 599 always processed by the software fallback, and all DES requests 600 are done by the hardware. 601 602config CRYPTO_DEV_QCOM_RNG 603 tristate "Qualcomm Random Number Generator Driver" 604 depends on ARCH_QCOM || COMPILE_TEST 605 select CRYPTO_RNG 606 help 607 This driver provides support for the Random Number 608 Generator hardware found on Qualcomm SoCs. 609 610 To compile this driver as a module, choose M here. The 611 module will be called qcom-rng. If unsure, say N. 612 613config CRYPTO_DEV_VMX 614 bool "Support for VMX cryptographic acceleration instructions" 615 depends on PPC64 && VSX 616 help 617 Support for VMX cryptographic acceleration instructions. 618 619source "drivers/crypto/vmx/Kconfig" 620 621config CRYPTO_DEV_IMGTEC_HASH 622 tristate "Imagination Technologies hardware hash accelerator" 623 depends on MIPS || COMPILE_TEST 624 select CRYPTO_MD5 625 select CRYPTO_SHA1 626 select CRYPTO_SHA256 627 select CRYPTO_HASH 628 help 629 This driver interfaces with the Imagination Technologies 630 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 631 hashing algorithms. 632 633config CRYPTO_DEV_ROCKCHIP 634 tristate "Rockchip's Cryptographic Engine driver" 635 depends on OF && ARCH_ROCKCHIP 636 depends on PM 637 select CRYPTO_ECB 638 select CRYPTO_CBC 639 select CRYPTO_DES 640 select CRYPTO_AES 641 select CRYPTO_ENGINE 642 select CRYPTO_LIB_DES 643 select CRYPTO_MD5 644 select CRYPTO_SHA1 645 select CRYPTO_SHA256 646 select CRYPTO_HASH 647 select CRYPTO_SKCIPHER 648 649 help 650 This driver interfaces with the hardware crypto accelerator. 651 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 652 653config CRYPTO_DEV_ROCKCHIP_DEBUG 654 bool "Enable Rockchip crypto stats" 655 depends on CRYPTO_DEV_ROCKCHIP 656 depends on DEBUG_FS 657 help 658 Say y to enable Rockchip crypto debug stats. 659 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying 660 the number of requests per algorithm and other internal stats. 661 662 663config CRYPTO_DEV_ZYNQMP_AES 664 tristate "Support for Xilinx ZynqMP AES hw accelerator" 665 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 666 select CRYPTO_AES 667 select CRYPTO_ENGINE 668 select CRYPTO_AEAD 669 help 670 Xilinx ZynqMP has AES-GCM engine used for symmetric key 671 encryption and decryption. This driver interfaces with AES hw 672 accelerator. Select this if you want to use the ZynqMP module 673 for AES algorithms. 674 675config CRYPTO_DEV_ZYNQMP_SHA3 676 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator" 677 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 678 select CRYPTO_SHA3 679 help 680 Xilinx ZynqMP has SHA3 engine used for secure hash calculation. 681 This driver interfaces with SHA3 hardware engine. 682 Select this if you want to use the ZynqMP module 683 for SHA3 hash computation. 684 685source "drivers/crypto/chelsio/Kconfig" 686 687source "drivers/crypto/virtio/Kconfig" 688 689config CRYPTO_DEV_BCM_SPU 690 tristate "Broadcom symmetric crypto/hash acceleration support" 691 depends on ARCH_BCM_IPROC 692 depends on MAILBOX 693 default m 694 select CRYPTO_AUTHENC 695 select CRYPTO_LIB_DES 696 select CRYPTO_MD5 697 select CRYPTO_SHA1 698 select CRYPTO_SHA256 699 select CRYPTO_SHA512 700 help 701 This driver provides support for Broadcom crypto acceleration using the 702 Secure Processing Unit (SPU). The SPU driver registers skcipher, 703 ahash, and aead algorithms with the kernel cryptographic API. 704 705source "drivers/crypto/stm32/Kconfig" 706 707config CRYPTO_DEV_SAFEXCEL 708 tristate "Inside Secure's SafeXcel cryptographic engine driver" 709 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM 710 select CRYPTO_LIB_AES 711 select CRYPTO_AUTHENC 712 select CRYPTO_SKCIPHER 713 select CRYPTO_LIB_DES 714 select CRYPTO_HASH 715 select CRYPTO_HMAC 716 select CRYPTO_MD5 717 select CRYPTO_SHA1 718 select CRYPTO_SHA256 719 select CRYPTO_SHA512 720 select CRYPTO_CHACHA20POLY1305 721 select CRYPTO_SHA3 722 help 723 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 724 engines designed by Inside Secure. It currently accelerates DES, 3DES and 725 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 726 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 727 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 728 729config CRYPTO_DEV_ARTPEC6 730 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 731 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 732 depends on OF 733 select CRYPTO_AEAD 734 select CRYPTO_AES 735 select CRYPTO_ALGAPI 736 select CRYPTO_SKCIPHER 737 select CRYPTO_CTR 738 select CRYPTO_HASH 739 select CRYPTO_SHA1 740 select CRYPTO_SHA256 741 select CRYPTO_SHA512 742 help 743 Enables the driver for the on-chip crypto accelerator 744 of Axis ARTPEC SoCs. 745 746 To compile this driver as a module, choose M here. 747 748config CRYPTO_DEV_CCREE 749 tristate "Support for ARM TrustZone CryptoCell family of security processors" 750 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 751 depends on HAS_IOMEM 752 select CRYPTO_HASH 753 select CRYPTO_SKCIPHER 754 select CRYPTO_LIB_DES 755 select CRYPTO_AEAD 756 select CRYPTO_AUTHENC 757 select CRYPTO_SHA1 758 select CRYPTO_MD5 759 select CRYPTO_SHA256 760 select CRYPTO_SHA512 761 select CRYPTO_HMAC 762 select CRYPTO_AES 763 select CRYPTO_CBC 764 select CRYPTO_ECB 765 select CRYPTO_CTR 766 select CRYPTO_XTS 767 select CRYPTO_SM4_GENERIC 768 select CRYPTO_SM3_GENERIC 769 help 770 Say 'Y' to enable a driver for the REE interface of the Arm 771 TrustZone CryptoCell family of processors. Currently the 772 CryptoCell 713, 703, 712, 710 and 630 are supported. 773 Choose this if you wish to use hardware acceleration of 774 cryptographic operations on the system REE. 775 If unsure say Y. 776 777source "drivers/crypto/hisilicon/Kconfig" 778 779source "drivers/crypto/amlogic/Kconfig" 780 781config CRYPTO_DEV_SA2UL 782 tristate "Support for TI security accelerator" 783 depends on ARCH_K3 || COMPILE_TEST 784 select CRYPTO_AES 785 select CRYPTO_ALGAPI 786 select CRYPTO_AUTHENC 787 select CRYPTO_DES 788 select CRYPTO_SHA1 789 select CRYPTO_SHA256 790 select CRYPTO_SHA512 791 select HW_RANDOM 792 select SG_SPLIT 793 help 794 K3 devices include a security accelerator engine that may be 795 used for crypto offload. Select this if you want to use hardware 796 acceleration for cryptographic algorithms on these devices. 797 798source "drivers/crypto/aspeed/Kconfig" 799source "drivers/crypto/starfive/Kconfig" 800 801endif # CRYPTO_HW 802