1 2menuconfig CRYPTO_HW 3 bool "Hardware crypto devices" 4 default y 5 ---help--- 6 Say Y here to get to see options for hardware crypto devices and 7 processors. This option alone does not add any kernel code. 8 9 If you say N, all options in this submenu will be skipped and disabled. 10 11if CRYPTO_HW 12 13config CRYPTO_DEV_PADLOCK 14 tristate "Support for VIA PadLock ACE" 15 depends on X86 && !UML 16 help 17 Some VIA processors come with an integrated crypto engine 18 (so called VIA PadLock ACE, Advanced Cryptography Engine) 19 that provides instructions for very fast cryptographic 20 operations with supported algorithms. 21 22 The instructions are used only when the CPU supports them. 23 Otherwise software encryption is used. 24 25config CRYPTO_DEV_PADLOCK_AES 26 tristate "PadLock driver for AES algorithm" 27 depends on CRYPTO_DEV_PADLOCK 28 select CRYPTO_BLKCIPHER 29 select CRYPTO_AES 30 help 31 Use VIA PadLock for AES algorithm. 32 33 Available in VIA C3 and newer CPUs. 34 35 If unsure say M. The compiled module will be 36 called padlock-aes. 37 38config CRYPTO_DEV_PADLOCK_SHA 39 tristate "PadLock driver for SHA1 and SHA256 algorithms" 40 depends on CRYPTO_DEV_PADLOCK 41 select CRYPTO_HASH 42 select CRYPTO_SHA1 43 select CRYPTO_SHA256 44 help 45 Use VIA PadLock for SHA1/SHA256 algorithms. 46 47 Available in VIA C7 and newer processors. 48 49 If unsure say M. The compiled module will be 50 called padlock-sha. 51 52config CRYPTO_DEV_GEODE 53 tristate "Support for the Geode LX AES engine" 54 depends on X86_32 && PCI 55 select CRYPTO_ALGAPI 56 select CRYPTO_BLKCIPHER 57 help 58 Say 'Y' here to use the AMD Geode LX processor on-board AES 59 engine for the CryptoAPI AES algorithm. 60 61 To compile this driver as a module, choose M here: the module 62 will be called geode-aes. 63 64config ZCRYPT 65 tristate "Support for s390 cryptographic adapters" 66 depends on S390 67 select HW_RANDOM 68 help 69 Select this option if you want to enable support for 70 s390 cryptographic adapters like: 71 + PCI-X Cryptographic Coprocessor (PCIXCC) 72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) 73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) 74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) 75 76config PKEY 77 tristate "Kernel API for protected key handling" 78 depends on S390 79 depends on ZCRYPT 80 help 81 With this option enabled the pkey kernel module provides an API 82 for creation and handling of protected keys. Other parts of the 83 kernel or userspace applications may use these functions. 84 85 Select this option if you want to enable the kernel and userspace 86 API for proteced key handling. 87 88 Please note that creation of protected keys from secure keys 89 requires to have at least one CEX card in coprocessor mode 90 available at runtime. 91 92config CRYPTO_PAES_S390 93 tristate "PAES cipher algorithms" 94 depends on S390 95 depends on ZCRYPT 96 depends on PKEY 97 select CRYPTO_ALGAPI 98 select CRYPTO_BLKCIPHER 99 help 100 This is the s390 hardware accelerated implementation of the 101 AES cipher algorithms for use with protected key. 102 103 Select this option if you want to use the paes cipher 104 for example to use protected key encrypted devices. 105 106config CRYPTO_SHA1_S390 107 tristate "SHA1 digest algorithm" 108 depends on S390 109 select CRYPTO_HASH 110 help 111 This is the s390 hardware accelerated implementation of the 112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 113 114 It is available as of z990. 115 116config CRYPTO_SHA256_S390 117 tristate "SHA256 digest algorithm" 118 depends on S390 119 select CRYPTO_HASH 120 help 121 This is the s390 hardware accelerated implementation of the 122 SHA256 secure hash standard (DFIPS 180-2). 123 124 It is available as of z9. 125 126config CRYPTO_SHA512_S390 127 tristate "SHA384 and SHA512 digest algorithm" 128 depends on S390 129 select CRYPTO_HASH 130 help 131 This is the s390 hardware accelerated implementation of the 132 SHA512 secure hash standard. 133 134 It is available as of z10. 135 136config CRYPTO_DES_S390 137 tristate "DES and Triple DES cipher algorithms" 138 depends on S390 139 select CRYPTO_ALGAPI 140 select CRYPTO_BLKCIPHER 141 select CRYPTO_DES 142 help 143 This is the s390 hardware accelerated implementation of the 144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 145 146 As of z990 the ECB and CBC mode are hardware accelerated. 147 As of z196 the CTR mode is hardware accelerated. 148 149config CRYPTO_AES_S390 150 tristate "AES cipher algorithms" 151 depends on S390 152 select CRYPTO_ALGAPI 153 select CRYPTO_BLKCIPHER 154 help 155 This is the s390 hardware accelerated implementation of the 156 AES cipher algorithms (FIPS-197). 157 158 As of z9 the ECB and CBC modes are hardware accelerated 159 for 128 bit keys. 160 As of z10 the ECB and CBC modes are hardware accelerated 161 for all AES key sizes. 162 As of z196 the CTR mode is hardware accelerated for all AES 163 key sizes and XTS mode is hardware accelerated for 256 and 164 512 bit keys. 165 166config S390_PRNG 167 tristate "Pseudo random number generator device driver" 168 depends on S390 169 default "m" 170 help 171 Select this option if you want to use the s390 pseudo random number 172 generator. The PRNG is part of the cryptographic processor functions 173 and uses triple-DES to generate secure random numbers like the 174 ANSI X9.17 standard. User-space programs access the 175 pseudo-random-number device through the char device /dev/prandom. 176 177 It is available as of z9. 178 179config CRYPTO_GHASH_S390 180 tristate "GHASH digest algorithm" 181 depends on S390 182 select CRYPTO_HASH 183 help 184 This is the s390 hardware accelerated implementation of the 185 GHASH message digest algorithm for GCM (Galois/Counter Mode). 186 187 It is available as of z196. 188 189config CRYPTO_CRC32_S390 190 tristate "CRC-32 algorithms" 191 depends on S390 192 select CRYPTO_HASH 193 select CRC32 194 help 195 Select this option if you want to use hardware accelerated 196 implementations of CRC algorithms. With this option, you 197 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) 198 and CRC-32C (Castagnoli). 199 200 It is available with IBM z13 or later. 201 202config CRYPTO_DEV_MV_CESA 203 tristate "Marvell's Cryptographic Engine" 204 depends on PLAT_ORION 205 select CRYPTO_AES 206 select CRYPTO_BLKCIPHER 207 select CRYPTO_HASH 208 select SRAM 209 help 210 This driver allows you to utilize the Cryptographic Engines and 211 Security Accelerator (CESA) which can be found on the Marvell Orion 212 and Kirkwood SoCs, such as QNAP's TS-209. 213 214 Currently the driver supports AES in ECB and CBC mode without DMA. 215 216config CRYPTO_DEV_MARVELL_CESA 217 tristate "New Marvell's Cryptographic Engine driver" 218 depends on PLAT_ORION || ARCH_MVEBU 219 select CRYPTO_AES 220 select CRYPTO_DES 221 select CRYPTO_BLKCIPHER 222 select CRYPTO_HASH 223 select SRAM 224 help 225 This driver allows you to utilize the Cryptographic Engines and 226 Security Accelerator (CESA) which can be found on the Armada 370. 227 This driver supports CPU offload through DMA transfers. 228 229 This driver is aimed at replacing the mv_cesa driver. This will only 230 happen once it has received proper testing. 231 232config CRYPTO_DEV_NIAGARA2 233 tristate "Niagara2 Stream Processing Unit driver" 234 select CRYPTO_DES 235 select CRYPTO_BLKCIPHER 236 select CRYPTO_HASH 237 select CRYPTO_MD5 238 select CRYPTO_SHA1 239 select CRYPTO_SHA256 240 depends on SPARC64 241 help 242 Each core of a Niagara2 processor contains a Stream 243 Processing Unit, which itself contains several cryptographic 244 sub-units. One set provides the Modular Arithmetic Unit, 245 used for SSL offload. The other set provides the Cipher 246 Group, which can perform encryption, decryption, hashing, 247 checksumming, and raw copies. 248 249config CRYPTO_DEV_HIFN_795X 250 tristate "Driver HIFN 795x crypto accelerator chips" 251 select CRYPTO_DES 252 select CRYPTO_BLKCIPHER 253 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 254 depends on PCI 255 depends on !ARCH_DMA_ADDR_T_64BIT 256 help 257 This option allows you to have support for HIFN 795x crypto adapters. 258 259config CRYPTO_DEV_HIFN_795X_RNG 260 bool "HIFN 795x random number generator" 261 depends on CRYPTO_DEV_HIFN_795X 262 help 263 Select this option if you want to enable the random number generator 264 on the HIFN 795x crypto adapters. 265 266source drivers/crypto/caam/Kconfig 267 268config CRYPTO_DEV_TALITOS 269 tristate "Talitos Freescale Security Engine (SEC)" 270 select CRYPTO_AEAD 271 select CRYPTO_AUTHENC 272 select CRYPTO_BLKCIPHER 273 select CRYPTO_HASH 274 select HW_RANDOM 275 depends on FSL_SOC 276 help 277 Say 'Y' here to use the Freescale Security Engine (SEC) 278 to offload cryptographic algorithm computation. 279 280 The Freescale SEC is present on PowerQUICC 'E' processors, such 281 as the MPC8349E and MPC8548E. 282 283 To compile this driver as a module, choose M here: the module 284 will be called talitos. 285 286config CRYPTO_DEV_TALITOS1 287 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 288 depends on CRYPTO_DEV_TALITOS 289 depends on PPC_8xx || PPC_82xx 290 default y 291 help 292 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 293 found on MPC82xx or the Freescale Security Engine (SEC Lite) 294 version 1.2 found on MPC8xx 295 296config CRYPTO_DEV_TALITOS2 297 bool "SEC2+ (SEC version 2.0 or upper)" 298 depends on CRYPTO_DEV_TALITOS 299 default y if !PPC_8xx 300 help 301 Say 'Y' here to use the Freescale Security Engine (SEC) 302 version 2 and following as found on MPC83xx, MPC85xx, etc ... 303 304config CRYPTO_DEV_IXP4XX 305 tristate "Driver for IXP4xx crypto hardware acceleration" 306 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 307 select CRYPTO_DES 308 select CRYPTO_AEAD 309 select CRYPTO_AUTHENC 310 select CRYPTO_BLKCIPHER 311 help 312 Driver for the IXP4xx NPE crypto engine. 313 314config CRYPTO_DEV_PPC4XX 315 tristate "Driver AMCC PPC4xx crypto accelerator" 316 depends on PPC && 4xx 317 select CRYPTO_HASH 318 select CRYPTO_BLKCIPHER 319 help 320 This option allows you to have support for AMCC crypto acceleration. 321 322config HW_RANDOM_PPC4XX 323 bool "PowerPC 4xx generic true random number generator support" 324 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM 325 default y 326 ---help--- 327 This option provides the kernel-side support for the TRNG hardware 328 found in the security function of some PowerPC 4xx SoCs. 329 330config CRYPTO_DEV_OMAP 331 tristate "Support for OMAP crypto HW accelerators" 332 depends on ARCH_OMAP2PLUS 333 help 334 OMAP processors have various crypto HW accelerators. Select this if 335 you want to use the OMAP modules for any of the crypto algorithms. 336 337if CRYPTO_DEV_OMAP 338 339config CRYPTO_DEV_OMAP_SHAM 340 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 341 depends on ARCH_OMAP2PLUS 342 select CRYPTO_SHA1 343 select CRYPTO_MD5 344 select CRYPTO_SHA256 345 select CRYPTO_SHA512 346 select CRYPTO_HMAC 347 help 348 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 349 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 350 351config CRYPTO_DEV_OMAP_AES 352 tristate "Support for OMAP AES hw engine" 353 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 354 select CRYPTO_AES 355 select CRYPTO_BLKCIPHER 356 select CRYPTO_ENGINE 357 select CRYPTO_CBC 358 select CRYPTO_ECB 359 select CRYPTO_CTR 360 select CRYPTO_AEAD 361 help 362 OMAP processors have AES module accelerator. Select this if you 363 want to use the OMAP module for AES algorithms. 364 365config CRYPTO_DEV_OMAP_DES 366 tristate "Support for OMAP DES/3DES hw engine" 367 depends on ARCH_OMAP2PLUS 368 select CRYPTO_DES 369 select CRYPTO_BLKCIPHER 370 select CRYPTO_ENGINE 371 help 372 OMAP processors have DES/3DES module accelerator. Select this if you 373 want to use the OMAP module for DES and 3DES algorithms. Currently 374 the ECB and CBC modes of operation are supported by the driver. Also 375 accesses made on unaligned boundaries are supported. 376 377endif # CRYPTO_DEV_OMAP 378 379config CRYPTO_DEV_PICOXCELL 380 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 381 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK 382 select CRYPTO_AEAD 383 select CRYPTO_AES 384 select CRYPTO_AUTHENC 385 select CRYPTO_BLKCIPHER 386 select CRYPTO_DES 387 select CRYPTO_CBC 388 select CRYPTO_ECB 389 select CRYPTO_SEQIV 390 help 391 This option enables support for the hardware offload engines in the 392 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 393 and for 3gpp Layer 2 ciphering support. 394 395 Saying m here will build a module named pipcoxcell_crypto. 396 397config CRYPTO_DEV_SAHARA 398 tristate "Support for SAHARA crypto accelerator" 399 depends on ARCH_MXC && OF 400 select CRYPTO_BLKCIPHER 401 select CRYPTO_AES 402 select CRYPTO_ECB 403 help 404 This option enables support for the SAHARA HW crypto accelerator 405 found in some Freescale i.MX chips. 406 407config CRYPTO_DEV_MXC_SCC 408 tristate "Support for Freescale Security Controller (SCC)" 409 depends on ARCH_MXC && OF 410 select CRYPTO_BLKCIPHER 411 select CRYPTO_DES 412 help 413 This option enables support for the Security Controller (SCC) 414 found in Freescale i.MX25 chips. 415 416config CRYPTO_DEV_EXYNOS_RNG 417 tristate "EXYNOS HW pseudo random number generator support" 418 depends on ARCH_EXYNOS || COMPILE_TEST 419 depends on HAS_IOMEM 420 select CRYPTO_RNG 421 ---help--- 422 This driver provides kernel-side support through the 423 cryptographic API for the pseudo random number generator hardware 424 found on Exynos SoCs. 425 426 To compile this driver as a module, choose M here: the 427 module will be called exynos-rng. 428 429 If unsure, say Y. 430 431config CRYPTO_DEV_S5P 432 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 433 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 434 depends on HAS_IOMEM && HAS_DMA 435 select CRYPTO_AES 436 select CRYPTO_BLKCIPHER 437 help 438 This option allows you to have support for S5P crypto acceleration. 439 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 440 algorithms execution. 441 442config CRYPTO_DEV_NX 443 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 444 depends on PPC64 445 help 446 This enables support for the NX hardware cryptographic accelerator 447 coprocessor that is in IBM PowerPC P7+ or later processors. This 448 does not actually enable any drivers, it only allows you to select 449 which acceleration type (encryption and/or compression) to enable. 450 451if CRYPTO_DEV_NX 452 source "drivers/crypto/nx/Kconfig" 453endif 454 455config CRYPTO_DEV_UX500 456 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 457 depends on ARCH_U8500 458 help 459 Driver for ST-Ericsson UX500 crypto engine. 460 461if CRYPTO_DEV_UX500 462 source "drivers/crypto/ux500/Kconfig" 463endif # if CRYPTO_DEV_UX500 464 465config CRYPTO_DEV_BFIN_CRC 466 tristate "Support for Blackfin CRC hardware" 467 depends on BF60x 468 help 469 Newer Blackfin processors have CRC hardware. Select this if you 470 want to use the Blackfin CRC module. 471 472config CRYPTO_DEV_ATMEL_AUTHENC 473 tristate "Support for Atmel IPSEC/SSL hw accelerator" 474 depends on HAS_DMA 475 depends on ARCH_AT91 || COMPILE_TEST 476 select CRYPTO_AUTHENC 477 select CRYPTO_DEV_ATMEL_AES 478 select CRYPTO_DEV_ATMEL_SHA 479 help 480 Some Atmel processors can combine the AES and SHA hw accelerators 481 to enhance support of IPSEC/SSL. 482 Select this if you want to use the Atmel modules for 483 authenc(hmac(shaX),Y(cbc)) algorithms. 484 485config CRYPTO_DEV_ATMEL_AES 486 tristate "Support for Atmel AES hw accelerator" 487 depends on HAS_DMA 488 depends on ARCH_AT91 || COMPILE_TEST 489 select CRYPTO_AES 490 select CRYPTO_AEAD 491 select CRYPTO_BLKCIPHER 492 help 493 Some Atmel processors have AES hw accelerator. 494 Select this if you want to use the Atmel module for 495 AES algorithms. 496 497 To compile this driver as a module, choose M here: the module 498 will be called atmel-aes. 499 500config CRYPTO_DEV_ATMEL_TDES 501 tristate "Support for Atmel DES/TDES hw accelerator" 502 depends on HAS_DMA 503 depends on ARCH_AT91 || COMPILE_TEST 504 select CRYPTO_DES 505 select CRYPTO_BLKCIPHER 506 help 507 Some Atmel processors have DES/TDES hw accelerator. 508 Select this if you want to use the Atmel module for 509 DES/TDES algorithms. 510 511 To compile this driver as a module, choose M here: the module 512 will be called atmel-tdes. 513 514config CRYPTO_DEV_ATMEL_SHA 515 tristate "Support for Atmel SHA hw accelerator" 516 depends on HAS_DMA 517 depends on ARCH_AT91 || COMPILE_TEST 518 select CRYPTO_HASH 519 help 520 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 521 hw accelerator. 522 Select this if you want to use the Atmel module for 523 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 524 525 To compile this driver as a module, choose M here: the module 526 will be called atmel-sha. 527 528config CRYPTO_DEV_CCP 529 bool "Support for AMD Cryptographic Coprocessor" 530 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 531 help 532 The AMD Cryptographic Coprocessor provides hardware offload support 533 for encryption, hashing and related operations. 534 535if CRYPTO_DEV_CCP 536 source "drivers/crypto/ccp/Kconfig" 537endif 538 539config CRYPTO_DEV_MXS_DCP 540 tristate "Support for Freescale MXS DCP" 541 depends on (ARCH_MXS || ARCH_MXC) 542 select STMP_DEVICE 543 select CRYPTO_CBC 544 select CRYPTO_ECB 545 select CRYPTO_AES 546 select CRYPTO_BLKCIPHER 547 select CRYPTO_HASH 548 help 549 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 550 co-processor on the die. 551 552 To compile this driver as a module, choose M here: the module 553 will be called mxs-dcp. 554 555source "drivers/crypto/qat/Kconfig" 556source "drivers/crypto/cavium/cpt/Kconfig" 557source "drivers/crypto/cavium/nitrox/Kconfig" 558 559config CRYPTO_DEV_CAVIUM_ZIP 560 tristate "Cavium ZIP driver" 561 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 562 ---help--- 563 Select this option if you want to enable compression/decompression 564 acceleration on Cavium's ARM based SoCs 565 566config CRYPTO_DEV_QCE 567 tristate "Qualcomm crypto engine accelerator" 568 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM 569 select CRYPTO_AES 570 select CRYPTO_DES 571 select CRYPTO_ECB 572 select CRYPTO_CBC 573 select CRYPTO_XTS 574 select CRYPTO_CTR 575 select CRYPTO_BLKCIPHER 576 help 577 This driver supports Qualcomm crypto engine accelerator 578 hardware. To compile this driver as a module, choose M here. The 579 module will be called qcrypto. 580 581config CRYPTO_DEV_VMX 582 bool "Support for VMX cryptographic acceleration instructions" 583 depends on PPC64 && VSX 584 help 585 Support for VMX cryptographic acceleration instructions. 586 587source "drivers/crypto/vmx/Kconfig" 588 589config CRYPTO_DEV_IMGTEC_HASH 590 tristate "Imagination Technologies hardware hash accelerator" 591 depends on MIPS || COMPILE_TEST 592 depends on HAS_DMA 593 select CRYPTO_MD5 594 select CRYPTO_SHA1 595 select CRYPTO_SHA256 596 select CRYPTO_HASH 597 help 598 This driver interfaces with the Imagination Technologies 599 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 600 hashing algorithms. 601 602config CRYPTO_DEV_SUN4I_SS 603 tristate "Support for Allwinner Security System cryptographic accelerator" 604 depends on ARCH_SUNXI && !64BIT 605 select CRYPTO_MD5 606 select CRYPTO_SHA1 607 select CRYPTO_AES 608 select CRYPTO_DES 609 select CRYPTO_BLKCIPHER 610 help 611 Some Allwinner SoC have a crypto accelerator named 612 Security System. Select this if you want to use it. 613 The Security System handle AES/DES/3DES ciphers in CBC mode 614 and SHA1 and MD5 hash algorithms. 615 616 To compile this driver as a module, choose M here: the module 617 will be called sun4i-ss. 618 619config CRYPTO_DEV_ROCKCHIP 620 tristate "Rockchip's Cryptographic Engine driver" 621 depends on OF && ARCH_ROCKCHIP 622 select CRYPTO_AES 623 select CRYPTO_DES 624 select CRYPTO_MD5 625 select CRYPTO_SHA1 626 select CRYPTO_SHA256 627 select CRYPTO_HASH 628 select CRYPTO_BLKCIPHER 629 630 help 631 This driver interfaces with the hardware crypto accelerator. 632 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 633 634config CRYPTO_DEV_MEDIATEK 635 tristate "MediaTek's EIP97 Cryptographic Engine driver" 636 depends on HAS_DMA 637 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST 638 select CRYPTO_AES 639 select CRYPTO_AEAD 640 select CRYPTO_BLKCIPHER 641 select CRYPTO_CTR 642 select CRYPTO_SHA1 643 select CRYPTO_SHA256 644 select CRYPTO_SHA512 645 select CRYPTO_HMAC 646 help 647 This driver allows you to utilize the hardware crypto accelerator 648 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... 649 Select this if you want to use it for AES/SHA1/SHA2 algorithms. 650 651source "drivers/crypto/chelsio/Kconfig" 652 653source "drivers/crypto/virtio/Kconfig" 654 655config CRYPTO_DEV_BCM_SPU 656 tristate "Broadcom symmetric crypto/hash acceleration support" 657 depends on ARCH_BCM_IPROC 658 depends on MAILBOX 659 default m 660 select CRYPTO_DES 661 select CRYPTO_MD5 662 select CRYPTO_SHA1 663 select CRYPTO_SHA256 664 select CRYPTO_SHA512 665 help 666 This driver provides support for Broadcom crypto acceleration using the 667 Secure Processing Unit (SPU). The SPU driver registers ablkcipher, 668 ahash, and aead algorithms with the kernel cryptographic API. 669 670source "drivers/crypto/stm32/Kconfig" 671 672config CRYPTO_DEV_SAFEXCEL 673 tristate "Inside Secure's SafeXcel cryptographic engine driver" 674 depends on HAS_DMA && OF 675 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT) 676 select CRYPTO_AES 677 select CRYPTO_BLKCIPHER 678 select CRYPTO_HASH 679 select CRYPTO_HMAC 680 select CRYPTO_SHA1 681 select CRYPTO_SHA256 682 select CRYPTO_SHA512 683 help 684 This driver interfaces with the SafeXcel EIP-197 cryptographic engine 685 designed by Inside Secure. Select this if you want to use CBC/ECB 686 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash 687 algorithms. 688 689endif # CRYPTO_HW 690