1 2menuconfig CRYPTO_HW 3 bool "Hardware crypto devices" 4 default y 5 ---help--- 6 Say Y here to get to see options for hardware crypto devices and 7 processors. This option alone does not add any kernel code. 8 9 If you say N, all options in this submenu will be skipped and disabled. 10 11if CRYPTO_HW 12 13config CRYPTO_DEV_PADLOCK 14 tristate "Support for VIA PadLock ACE" 15 depends on X86 && !UML 16 help 17 Some VIA processors come with an integrated crypto engine 18 (so called VIA PadLock ACE, Advanced Cryptography Engine) 19 that provides instructions for very fast cryptographic 20 operations with supported algorithms. 21 22 The instructions are used only when the CPU supports them. 23 Otherwise software encryption is used. 24 25config CRYPTO_DEV_PADLOCK_AES 26 tristate "PadLock driver for AES algorithm" 27 depends on CRYPTO_DEV_PADLOCK 28 select CRYPTO_BLKCIPHER 29 select CRYPTO_AES 30 help 31 Use VIA PadLock for AES algorithm. 32 33 Available in VIA C3 and newer CPUs. 34 35 If unsure say M. The compiled module will be 36 called padlock-aes. 37 38config CRYPTO_DEV_PADLOCK_SHA 39 tristate "PadLock driver for SHA1 and SHA256 algorithms" 40 depends on CRYPTO_DEV_PADLOCK 41 select CRYPTO_HASH 42 select CRYPTO_SHA1 43 select CRYPTO_SHA256 44 help 45 Use VIA PadLock for SHA1/SHA256 algorithms. 46 47 Available in VIA C7 and newer processors. 48 49 If unsure say M. The compiled module will be 50 called padlock-sha. 51 52config CRYPTO_DEV_GEODE 53 tristate "Support for the Geode LX AES engine" 54 depends on X86_32 && PCI 55 select CRYPTO_ALGAPI 56 select CRYPTO_BLKCIPHER 57 help 58 Say 'Y' here to use the AMD Geode LX processor on-board AES 59 engine for the CryptoAPI AES algorithm. 60 61 To compile this driver as a module, choose M here: the module 62 will be called geode-aes. 63 64config ZCRYPT 65 tristate "Support for PCI-attached cryptographic adapters" 66 depends on S390 67 select HW_RANDOM 68 help 69 Select this option if you want to use a PCI-attached cryptographic 70 adapter like: 71 + PCI Cryptographic Accelerator (PCICA) 72 + PCI Cryptographic Coprocessor (PCICC) 73 + PCI-X Cryptographic Coprocessor (PCIXCC) 74 + Crypto Express2 Coprocessor (CEX2C) 75 + Crypto Express2 Accelerator (CEX2A) 76 + Crypto Express3 Coprocessor (CEX3C) 77 + Crypto Express3 Accelerator (CEX3A) 78 79config CRYPTO_SHA1_S390 80 tristate "SHA1 digest algorithm" 81 depends on S390 82 select CRYPTO_HASH 83 help 84 This is the s390 hardware accelerated implementation of the 85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 86 87 It is available as of z990. 88 89config CRYPTO_SHA256_S390 90 tristate "SHA256 digest algorithm" 91 depends on S390 92 select CRYPTO_HASH 93 help 94 This is the s390 hardware accelerated implementation of the 95 SHA256 secure hash standard (DFIPS 180-2). 96 97 It is available as of z9. 98 99config CRYPTO_SHA512_S390 100 tristate "SHA384 and SHA512 digest algorithm" 101 depends on S390 102 select CRYPTO_HASH 103 help 104 This is the s390 hardware accelerated implementation of the 105 SHA512 secure hash standard. 106 107 It is available as of z10. 108 109config CRYPTO_DES_S390 110 tristate "DES and Triple DES cipher algorithms" 111 depends on S390 112 select CRYPTO_ALGAPI 113 select CRYPTO_BLKCIPHER 114 select CRYPTO_DES 115 help 116 This is the s390 hardware accelerated implementation of the 117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 118 119 As of z990 the ECB and CBC mode are hardware accelerated. 120 As of z196 the CTR mode is hardware accelerated. 121 122config CRYPTO_AES_S390 123 tristate "AES cipher algorithms" 124 depends on S390 125 select CRYPTO_ALGAPI 126 select CRYPTO_BLKCIPHER 127 help 128 This is the s390 hardware accelerated implementation of the 129 AES cipher algorithms (FIPS-197). 130 131 As of z9 the ECB and CBC modes are hardware accelerated 132 for 128 bit keys. 133 As of z10 the ECB and CBC modes are hardware accelerated 134 for all AES key sizes. 135 As of z196 the CTR mode is hardware accelerated for all AES 136 key sizes and XTS mode is hardware accelerated for 256 and 137 512 bit keys. 138 139config S390_PRNG 140 tristate "Pseudo random number generator device driver" 141 depends on S390 142 default "m" 143 help 144 Select this option if you want to use the s390 pseudo random number 145 generator. The PRNG is part of the cryptographic processor functions 146 and uses triple-DES to generate secure random numbers like the 147 ANSI X9.17 standard. User-space programs access the 148 pseudo-random-number device through the char device /dev/prandom. 149 150 It is available as of z9. 151 152config CRYPTO_GHASH_S390 153 tristate "GHASH digest algorithm" 154 depends on S390 155 select CRYPTO_HASH 156 help 157 This is the s390 hardware accelerated implementation of the 158 GHASH message digest algorithm for GCM (Galois/Counter Mode). 159 160 It is available as of z196. 161 162config CRYPTO_DEV_MV_CESA 163 tristate "Marvell's Cryptographic Engine" 164 depends on PLAT_ORION 165 select CRYPTO_AES 166 select CRYPTO_BLKCIPHER 167 select CRYPTO_HASH 168 select SRAM 169 help 170 This driver allows you to utilize the Cryptographic Engines and 171 Security Accelerator (CESA) which can be found on the Marvell Orion 172 and Kirkwood SoCs, such as QNAP's TS-209. 173 174 Currently the driver supports AES in ECB and CBC mode without DMA. 175 176config CRYPTO_DEV_MARVELL_CESA 177 tristate "New Marvell's Cryptographic Engine driver" 178 depends on PLAT_ORION || ARCH_MVEBU 179 select CRYPTO_AES 180 select CRYPTO_DES 181 select CRYPTO_BLKCIPHER 182 select CRYPTO_HASH 183 select SRAM 184 help 185 This driver allows you to utilize the Cryptographic Engines and 186 Security Accelerator (CESA) which can be found on the Armada 370. 187 This driver supports CPU offload through DMA transfers. 188 189 This driver is aimed at replacing the mv_cesa driver. This will only 190 happen once it has received proper testing. 191 192config CRYPTO_DEV_NIAGARA2 193 tristate "Niagara2 Stream Processing Unit driver" 194 select CRYPTO_DES 195 select CRYPTO_BLKCIPHER 196 select CRYPTO_HASH 197 depends on SPARC64 198 help 199 Each core of a Niagara2 processor contains a Stream 200 Processing Unit, which itself contains several cryptographic 201 sub-units. One set provides the Modular Arithmetic Unit, 202 used for SSL offload. The other set provides the Cipher 203 Group, which can perform encryption, decryption, hashing, 204 checksumming, and raw copies. 205 206config CRYPTO_DEV_HIFN_795X 207 tristate "Driver HIFN 795x crypto accelerator chips" 208 select CRYPTO_DES 209 select CRYPTO_BLKCIPHER 210 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 211 depends on PCI 212 depends on !ARCH_DMA_ADDR_T_64BIT 213 help 214 This option allows you to have support for HIFN 795x crypto adapters. 215 216config CRYPTO_DEV_HIFN_795X_RNG 217 bool "HIFN 795x random number generator" 218 depends on CRYPTO_DEV_HIFN_795X 219 help 220 Select this option if you want to enable the random number generator 221 on the HIFN 795x crypto adapters. 222 223source drivers/crypto/caam/Kconfig 224 225config CRYPTO_DEV_TALITOS 226 tristate "Talitos Freescale Security Engine (SEC)" 227 select CRYPTO_AEAD 228 select CRYPTO_AUTHENC 229 select CRYPTO_BLKCIPHER 230 select CRYPTO_HASH 231 select HW_RANDOM 232 depends on FSL_SOC 233 help 234 Say 'Y' here to use the Freescale Security Engine (SEC) 235 to offload cryptographic algorithm computation. 236 237 The Freescale SEC is present on PowerQUICC 'E' processors, such 238 as the MPC8349E and MPC8548E. 239 240 To compile this driver as a module, choose M here: the module 241 will be called talitos. 242 243config CRYPTO_DEV_TALITOS1 244 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 245 depends on CRYPTO_DEV_TALITOS 246 depends on PPC_8xx || PPC_82xx 247 default y 248 help 249 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 250 found on MPC82xx or the Freescale Security Engine (SEC Lite) 251 version 1.2 found on MPC8xx 252 253config CRYPTO_DEV_TALITOS2 254 bool "SEC2+ (SEC version 2.0 or upper)" 255 depends on CRYPTO_DEV_TALITOS 256 default y if !PPC_8xx 257 help 258 Say 'Y' here to use the Freescale Security Engine (SEC) 259 version 2 and following as found on MPC83xx, MPC85xx, etc ... 260 261config CRYPTO_DEV_IXP4XX 262 tristate "Driver for IXP4xx crypto hardware acceleration" 263 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 264 select CRYPTO_DES 265 select CRYPTO_AEAD 266 select CRYPTO_AUTHENC 267 select CRYPTO_BLKCIPHER 268 help 269 Driver for the IXP4xx NPE crypto engine. 270 271config CRYPTO_DEV_PPC4XX 272 tristate "Driver AMCC PPC4xx crypto accelerator" 273 depends on PPC && 4xx 274 select CRYPTO_HASH 275 select CRYPTO_BLKCIPHER 276 help 277 This option allows you to have support for AMCC crypto acceleration. 278 279config CRYPTO_DEV_OMAP_SHAM 280 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 281 depends on ARCH_OMAP2PLUS 282 select CRYPTO_SHA1 283 select CRYPTO_MD5 284 select CRYPTO_SHA256 285 select CRYPTO_SHA512 286 select CRYPTO_HMAC 287 help 288 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 289 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 290 291config CRYPTO_DEV_OMAP_AES 292 tristate "Support for OMAP AES hw engine" 293 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 294 select CRYPTO_AES 295 select CRYPTO_BLKCIPHER 296 help 297 OMAP processors have AES module accelerator. Select this if you 298 want to use the OMAP module for AES algorithms. 299 300config CRYPTO_DEV_OMAP_DES 301 tristate "Support for OMAP DES3DES hw engine" 302 depends on ARCH_OMAP2PLUS 303 select CRYPTO_DES 304 select CRYPTO_BLKCIPHER 305 help 306 OMAP processors have DES/3DES module accelerator. Select this if you 307 want to use the OMAP module for DES and 3DES algorithms. Currently 308 the ECB and CBC modes of operation supported by the driver. Also 309 accesses made on unaligned boundaries are also supported. 310 311config CRYPTO_DEV_PICOXCELL 312 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 313 depends on ARCH_PICOXCELL && HAVE_CLK 314 select CRYPTO_AEAD 315 select CRYPTO_AES 316 select CRYPTO_AUTHENC 317 select CRYPTO_BLKCIPHER 318 select CRYPTO_DES 319 select CRYPTO_CBC 320 select CRYPTO_ECB 321 select CRYPTO_SEQIV 322 help 323 This option enables support for the hardware offload engines in the 324 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 325 and for 3gpp Layer 2 ciphering support. 326 327 Saying m here will build a module named pipcoxcell_crypto. 328 329config CRYPTO_DEV_SAHARA 330 tristate "Support for SAHARA crypto accelerator" 331 depends on ARCH_MXC && OF 332 select CRYPTO_BLKCIPHER 333 select CRYPTO_AES 334 select CRYPTO_ECB 335 help 336 This option enables support for the SAHARA HW crypto accelerator 337 found in some Freescale i.MX chips. 338 339config CRYPTO_DEV_S5P 340 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 341 depends on ARCH_S5PV210 || ARCH_EXYNOS 342 select CRYPTO_AES 343 select CRYPTO_BLKCIPHER 344 help 345 This option allows you to have support for S5P crypto acceleration. 346 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 347 algorithms execution. 348 349config CRYPTO_DEV_NX 350 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 351 depends on PPC64 352 help 353 This enables support for the NX hardware cryptographic accelerator 354 coprocessor that is in IBM PowerPC P7+ or later processors. This 355 does not actually enable any drivers, it only allows you to select 356 which acceleration type (encryption and/or compression) to enable. 357 358if CRYPTO_DEV_NX 359 source "drivers/crypto/nx/Kconfig" 360endif 361 362config CRYPTO_DEV_UX500 363 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 364 depends on ARCH_U8500 365 help 366 Driver for ST-Ericsson UX500 crypto engine. 367 368if CRYPTO_DEV_UX500 369 source "drivers/crypto/ux500/Kconfig" 370endif # if CRYPTO_DEV_UX500 371 372config CRYPTO_DEV_BFIN_CRC 373 tristate "Support for Blackfin CRC hardware" 374 depends on BF60x 375 help 376 Newer Blackfin processors have CRC hardware. Select this if you 377 want to use the Blackfin CRC module. 378 379config CRYPTO_DEV_ATMEL_AES 380 tristate "Support for Atmel AES hw accelerator" 381 depends on ARCH_AT91 382 select CRYPTO_AES 383 select CRYPTO_BLKCIPHER 384 select AT_HDMAC 385 help 386 Some Atmel processors have AES hw accelerator. 387 Select this if you want to use the Atmel module for 388 AES algorithms. 389 390 To compile this driver as a module, choose M here: the module 391 will be called atmel-aes. 392 393config CRYPTO_DEV_ATMEL_TDES 394 tristate "Support for Atmel DES/TDES hw accelerator" 395 depends on ARCH_AT91 396 select CRYPTO_DES 397 select CRYPTO_BLKCIPHER 398 help 399 Some Atmel processors have DES/TDES hw accelerator. 400 Select this if you want to use the Atmel module for 401 DES/TDES algorithms. 402 403 To compile this driver as a module, choose M here: the module 404 will be called atmel-tdes. 405 406config CRYPTO_DEV_ATMEL_SHA 407 tristate "Support for Atmel SHA hw accelerator" 408 depends on ARCH_AT91 409 select CRYPTO_HASH 410 help 411 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 412 hw accelerator. 413 Select this if you want to use the Atmel module for 414 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 415 416 To compile this driver as a module, choose M here: the module 417 will be called atmel-sha. 418 419config CRYPTO_DEV_CCP 420 bool "Support for AMD Cryptographic Coprocessor" 421 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 422 help 423 The AMD Cryptographic Coprocessor provides hardware support 424 for encryption, hashing and related operations. 425 426if CRYPTO_DEV_CCP 427 source "drivers/crypto/ccp/Kconfig" 428endif 429 430config CRYPTO_DEV_MXS_DCP 431 tristate "Support for Freescale MXS DCP" 432 depends on ARCH_MXS 433 select CRYPTO_CBC 434 select CRYPTO_ECB 435 select CRYPTO_AES 436 select CRYPTO_BLKCIPHER 437 select CRYPTO_HASH 438 help 439 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 440 co-processor on the die. 441 442 To compile this driver as a module, choose M here: the module 443 will be called mxs-dcp. 444 445source "drivers/crypto/qat/Kconfig" 446 447config CRYPTO_DEV_QCE 448 tristate "Qualcomm crypto engine accelerator" 449 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM 450 select CRYPTO_AES 451 select CRYPTO_DES 452 select CRYPTO_ECB 453 select CRYPTO_CBC 454 select CRYPTO_XTS 455 select CRYPTO_CTR 456 select CRYPTO_BLKCIPHER 457 help 458 This driver supports Qualcomm crypto engine accelerator 459 hardware. To compile this driver as a module, choose M here. The 460 module will be called qcrypto. 461 462config CRYPTO_DEV_VMX 463 bool "Support for VMX cryptographic acceleration instructions" 464 depends on PPC64 && VSX 465 help 466 Support for VMX cryptographic acceleration instructions. 467 468source "drivers/crypto/vmx/Kconfig" 469 470config CRYPTO_DEV_IMGTEC_HASH 471 tristate "Imagination Technologies hardware hash accelerator" 472 depends on MIPS || COMPILE_TEST 473 depends on HAS_DMA 474 select CRYPTO_MD5 475 select CRYPTO_SHA1 476 select CRYPTO_SHA256 477 select CRYPTO_HASH 478 help 479 This driver interfaces with the Imagination Technologies 480 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 481 hashing algorithms. 482 483config CRYPTO_DEV_SUN4I_SS 484 tristate "Support for Allwinner Security System cryptographic accelerator" 485 depends on ARCH_SUNXI 486 select CRYPTO_MD5 487 select CRYPTO_SHA1 488 select CRYPTO_AES 489 select CRYPTO_DES 490 select CRYPTO_BLKCIPHER 491 help 492 Some Allwinner SoC have a crypto accelerator named 493 Security System. Select this if you want to use it. 494 The Security System handle AES/DES/3DES ciphers in CBC mode 495 and SHA1 and MD5 hash algorithms. 496 497 To compile this driver as a module, choose M here: the module 498 will be called sun4i-ss. 499 500endif # CRYPTO_HW 501