xref: /openbmc/linux/drivers/crypto/Kconfig (revision 8730046c)
1
2menuconfig CRYPTO_HW
3	bool "Hardware crypto devices"
4	default y
5	---help---
6	  Say Y here to get to see options for hardware crypto devices and
7	  processors. This option alone does not add any kernel code.
8
9	  If you say N, all options in this submenu will be skipped and disabled.
10
11if CRYPTO_HW
12
13config CRYPTO_DEV_PADLOCK
14	tristate "Support for VIA PadLock ACE"
15	depends on X86 && !UML
16	help
17	  Some VIA processors come with an integrated crypto engine
18	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
19	  that provides instructions for very fast cryptographic
20	  operations with supported algorithms.
21
22	  The instructions are used only when the CPU supports them.
23	  Otherwise software encryption is used.
24
25config CRYPTO_DEV_PADLOCK_AES
26	tristate "PadLock driver for AES algorithm"
27	depends on CRYPTO_DEV_PADLOCK
28	select CRYPTO_BLKCIPHER
29	select CRYPTO_AES
30	help
31	  Use VIA PadLock for AES algorithm.
32
33	  Available in VIA C3 and newer CPUs.
34
35	  If unsure say M. The compiled module will be
36	  called padlock-aes.
37
38config CRYPTO_DEV_PADLOCK_SHA
39	tristate "PadLock driver for SHA1 and SHA256 algorithms"
40	depends on CRYPTO_DEV_PADLOCK
41	select CRYPTO_HASH
42	select CRYPTO_SHA1
43	select CRYPTO_SHA256
44	help
45	  Use VIA PadLock for SHA1/SHA256 algorithms.
46
47	  Available in VIA C7 and newer processors.
48
49	  If unsure say M. The compiled module will be
50	  called padlock-sha.
51
52config CRYPTO_DEV_GEODE
53	tristate "Support for the Geode LX AES engine"
54	depends on X86_32 && PCI
55	select CRYPTO_ALGAPI
56	select CRYPTO_BLKCIPHER
57	help
58	  Say 'Y' here to use the AMD Geode LX processor on-board AES
59	  engine for the CryptoAPI AES algorithm.
60
61	  To compile this driver as a module, choose M here: the module
62	  will be called geode-aes.
63
64config ZCRYPT
65	tristate "Support for PCI-attached cryptographic adapters"
66	depends on S390
67	select HW_RANDOM
68	help
69	  Select this option if you want to use a PCI-attached cryptographic
70	  adapter like:
71	  + PCI Cryptographic Accelerator (PCICA)
72	  + PCI Cryptographic Coprocessor (PCICC)
73	  + PCI-X Cryptographic Coprocessor (PCIXCC)
74	  + Crypto Express2 Coprocessor (CEX2C)
75	  + Crypto Express2 Accelerator (CEX2A)
76	  + Crypto Express3 Coprocessor (CEX3C)
77	  + Crypto Express3 Accelerator (CEX3A)
78
79config CRYPTO_SHA1_S390
80	tristate "SHA1 digest algorithm"
81	depends on S390
82	select CRYPTO_HASH
83	help
84	  This is the s390 hardware accelerated implementation of the
85	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
87	  It is available as of z990.
88
89config CRYPTO_SHA256_S390
90	tristate "SHA256 digest algorithm"
91	depends on S390
92	select CRYPTO_HASH
93	help
94	  This is the s390 hardware accelerated implementation of the
95	  SHA256 secure hash standard (DFIPS 180-2).
96
97	  It is available as of z9.
98
99config CRYPTO_SHA512_S390
100	tristate "SHA384 and SHA512 digest algorithm"
101	depends on S390
102	select CRYPTO_HASH
103	help
104	  This is the s390 hardware accelerated implementation of the
105	  SHA512 secure hash standard.
106
107	  It is available as of z10.
108
109config CRYPTO_DES_S390
110	tristate "DES and Triple DES cipher algorithms"
111	depends on S390
112	select CRYPTO_ALGAPI
113	select CRYPTO_BLKCIPHER
114	select CRYPTO_DES
115	help
116	  This is the s390 hardware accelerated implementation of the
117	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
119	  As of z990 the ECB and CBC mode are hardware accelerated.
120	  As of z196 the CTR mode is hardware accelerated.
121
122config CRYPTO_AES_S390
123	tristate "AES cipher algorithms"
124	depends on S390
125	select CRYPTO_ALGAPI
126	select CRYPTO_BLKCIPHER
127	help
128	  This is the s390 hardware accelerated implementation of the
129	  AES cipher algorithms (FIPS-197).
130
131	  As of z9 the ECB and CBC modes are hardware accelerated
132	  for 128 bit keys.
133	  As of z10 the ECB and CBC modes are hardware accelerated
134	  for all AES key sizes.
135	  As of z196 the CTR mode is hardware accelerated for all AES
136	  key sizes and XTS mode is hardware accelerated for 256 and
137	  512 bit keys.
138
139config S390_PRNG
140	tristate "Pseudo random number generator device driver"
141	depends on S390
142	default "m"
143	help
144	  Select this option if you want to use the s390 pseudo random number
145	  generator. The PRNG is part of the cryptographic processor functions
146	  and uses triple-DES to generate secure random numbers like the
147	  ANSI X9.17 standard. User-space programs access the
148	  pseudo-random-number device through the char device /dev/prandom.
149
150	  It is available as of z9.
151
152config CRYPTO_GHASH_S390
153	tristate "GHASH digest algorithm"
154	depends on S390
155	select CRYPTO_HASH
156	help
157	  This is the s390 hardware accelerated implementation of the
158	  GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160	  It is available as of z196.
161
162config CRYPTO_CRC32_S390
163	tristate "CRC-32 algorithms"
164	depends on S390
165	select CRYPTO_HASH
166	select CRC32
167	help
168	  Select this option if you want to use hardware accelerated
169	  implementations of CRC algorithms.  With this option, you
170	  can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
171	  and CRC-32C (Castagnoli).
172
173	  It is available with IBM z13 or later.
174
175config CRYPTO_DEV_MV_CESA
176	tristate "Marvell's Cryptographic Engine"
177	depends on PLAT_ORION
178	select CRYPTO_AES
179	select CRYPTO_BLKCIPHER
180	select CRYPTO_HASH
181	select SRAM
182	help
183	  This driver allows you to utilize the Cryptographic Engines and
184	  Security Accelerator (CESA) which can be found on the Marvell Orion
185	  and Kirkwood SoCs, such as QNAP's TS-209.
186
187	  Currently the driver supports AES in ECB and CBC mode without DMA.
188
189config CRYPTO_DEV_MARVELL_CESA
190	tristate "New Marvell's Cryptographic Engine driver"
191	depends on PLAT_ORION || ARCH_MVEBU
192	select CRYPTO_AES
193	select CRYPTO_DES
194	select CRYPTO_BLKCIPHER
195	select CRYPTO_HASH
196	select SRAM
197	help
198	  This driver allows you to utilize the Cryptographic Engines and
199	  Security Accelerator (CESA) which can be found on the Armada 370.
200	  This driver supports CPU offload through DMA transfers.
201
202	  This driver is aimed at replacing the mv_cesa driver. This will only
203	  happen once it has received proper testing.
204
205config CRYPTO_DEV_NIAGARA2
206       tristate "Niagara2 Stream Processing Unit driver"
207       select CRYPTO_DES
208       select CRYPTO_BLKCIPHER
209       select CRYPTO_HASH
210       select CRYPTO_MD5
211       select CRYPTO_SHA1
212       select CRYPTO_SHA256
213       depends on SPARC64
214       help
215	  Each core of a Niagara2 processor contains a Stream
216	  Processing Unit, which itself contains several cryptographic
217	  sub-units.  One set provides the Modular Arithmetic Unit,
218	  used for SSL offload.  The other set provides the Cipher
219	  Group, which can perform encryption, decryption, hashing,
220	  checksumming, and raw copies.
221
222config CRYPTO_DEV_HIFN_795X
223	tristate "Driver HIFN 795x crypto accelerator chips"
224	select CRYPTO_DES
225	select CRYPTO_BLKCIPHER
226	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
227	depends on PCI
228	depends on !ARCH_DMA_ADDR_T_64BIT
229	help
230	  This option allows you to have support for HIFN 795x crypto adapters.
231
232config CRYPTO_DEV_HIFN_795X_RNG
233	bool "HIFN 795x random number generator"
234	depends on CRYPTO_DEV_HIFN_795X
235	help
236	  Select this option if you want to enable the random number generator
237	  on the HIFN 795x crypto adapters.
238
239source drivers/crypto/caam/Kconfig
240
241config CRYPTO_DEV_TALITOS
242	tristate "Talitos Freescale Security Engine (SEC)"
243	select CRYPTO_AEAD
244	select CRYPTO_AUTHENC
245	select CRYPTO_BLKCIPHER
246	select CRYPTO_HASH
247	select HW_RANDOM
248	depends on FSL_SOC
249	help
250	  Say 'Y' here to use the Freescale Security Engine (SEC)
251	  to offload cryptographic algorithm computation.
252
253	  The Freescale SEC is present on PowerQUICC 'E' processors, such
254	  as the MPC8349E and MPC8548E.
255
256	  To compile this driver as a module, choose M here: the module
257	  will be called talitos.
258
259config CRYPTO_DEV_TALITOS1
260	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
261	depends on CRYPTO_DEV_TALITOS
262	depends on PPC_8xx || PPC_82xx
263	default y
264	help
265	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
266	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
267	  version 1.2 found on MPC8xx
268
269config CRYPTO_DEV_TALITOS2
270	bool "SEC2+ (SEC version 2.0 or upper)"
271	depends on CRYPTO_DEV_TALITOS
272	default y if !PPC_8xx
273	help
274	  Say 'Y' here to use the Freescale Security Engine (SEC)
275	  version 2 and following as found on MPC83xx, MPC85xx, etc ...
276
277config CRYPTO_DEV_IXP4XX
278	tristate "Driver for IXP4xx crypto hardware acceleration"
279	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
280	select CRYPTO_DES
281	select CRYPTO_AEAD
282	select CRYPTO_AUTHENC
283	select CRYPTO_BLKCIPHER
284	help
285	  Driver for the IXP4xx NPE crypto engine.
286
287config CRYPTO_DEV_PPC4XX
288	tristate "Driver AMCC PPC4xx crypto accelerator"
289	depends on PPC && 4xx
290	select CRYPTO_HASH
291	select CRYPTO_BLKCIPHER
292	help
293	  This option allows you to have support for AMCC crypto acceleration.
294
295config HW_RANDOM_PPC4XX
296	bool "PowerPC 4xx generic true random number generator support"
297	depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
298	default y
299	---help---
300	 This option provides the kernel-side support for the TRNG hardware
301	 found in the security function of some PowerPC 4xx SoCs.
302
303config CRYPTO_DEV_OMAP_SHAM
304	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
305	depends on ARCH_OMAP2PLUS
306	select CRYPTO_SHA1
307	select CRYPTO_MD5
308	select CRYPTO_SHA256
309	select CRYPTO_SHA512
310	select CRYPTO_HMAC
311	help
312	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
313	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
314
315config CRYPTO_DEV_OMAP_AES
316	tristate "Support for OMAP AES hw engine"
317	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
318	select CRYPTO_AES
319	select CRYPTO_BLKCIPHER
320	select CRYPTO_ENGINE
321	select CRYPTO_CBC
322	select CRYPTO_ECB
323	select CRYPTO_CTR
324	help
325	  OMAP processors have AES module accelerator. Select this if you
326	  want to use the OMAP module for AES algorithms.
327
328config CRYPTO_DEV_OMAP_DES
329	tristate "Support for OMAP DES/3DES hw engine"
330	depends on ARCH_OMAP2PLUS
331	select CRYPTO_DES
332	select CRYPTO_BLKCIPHER
333	select CRYPTO_ENGINE
334	help
335	  OMAP processors have DES/3DES module accelerator. Select this if you
336	  want to use the OMAP module for DES and 3DES algorithms. Currently
337	  the ECB and CBC modes of operation are supported by the driver. Also
338	  accesses made on unaligned boundaries are supported.
339
340config CRYPTO_DEV_PICOXCELL
341	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
342	depends on ARCH_PICOXCELL && HAVE_CLK
343	select CRYPTO_AEAD
344	select CRYPTO_AES
345	select CRYPTO_AUTHENC
346	select CRYPTO_BLKCIPHER
347	select CRYPTO_DES
348	select CRYPTO_CBC
349	select CRYPTO_ECB
350	select CRYPTO_SEQIV
351	help
352	  This option enables support for the hardware offload engines in the
353	  Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
354	  and for 3gpp Layer 2 ciphering support.
355
356	  Saying m here will build a module named pipcoxcell_crypto.
357
358config CRYPTO_DEV_SAHARA
359	tristate "Support for SAHARA crypto accelerator"
360	depends on ARCH_MXC && OF
361	select CRYPTO_BLKCIPHER
362	select CRYPTO_AES
363	select CRYPTO_ECB
364	help
365	  This option enables support for the SAHARA HW crypto accelerator
366	  found in some Freescale i.MX chips.
367
368config CRYPTO_DEV_MXC_SCC
369	tristate "Support for Freescale Security Controller (SCC)"
370	depends on ARCH_MXC && OF
371	select CRYPTO_BLKCIPHER
372	select CRYPTO_DES
373	help
374	  This option enables support for the Security Controller (SCC)
375	  found in Freescale i.MX25 chips.
376
377config CRYPTO_DEV_S5P
378	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
379	depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
380	depends on HAS_IOMEM && HAS_DMA
381	select CRYPTO_AES
382	select CRYPTO_BLKCIPHER
383	help
384	  This option allows you to have support for S5P crypto acceleration.
385	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
386	  algorithms execution.
387
388config CRYPTO_DEV_NX
389	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
390	depends on PPC64
391	help
392	  This enables support for the NX hardware cryptographic accelerator
393	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
394	  does not actually enable any drivers, it only allows you to select
395	  which acceleration type (encryption and/or compression) to enable.
396
397if CRYPTO_DEV_NX
398	source "drivers/crypto/nx/Kconfig"
399endif
400
401config CRYPTO_DEV_UX500
402	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
403	depends on ARCH_U8500
404	help
405	  Driver for ST-Ericsson UX500 crypto engine.
406
407if CRYPTO_DEV_UX500
408	source "drivers/crypto/ux500/Kconfig"
409endif # if CRYPTO_DEV_UX500
410
411config CRYPTO_DEV_BFIN_CRC
412	tristate "Support for Blackfin CRC hardware"
413	depends on BF60x
414	help
415	  Newer Blackfin processors have CRC hardware. Select this if you
416	  want to use the Blackfin CRC module.
417
418config CRYPTO_DEV_ATMEL_AES
419	tristate "Support for Atmel AES hw accelerator"
420	depends on HAS_DMA
421	depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
422	select CRYPTO_AES
423	select CRYPTO_AEAD
424	select CRYPTO_BLKCIPHER
425	help
426	  Some Atmel processors have AES hw accelerator.
427	  Select this if you want to use the Atmel module for
428	  AES algorithms.
429
430	  To compile this driver as a module, choose M here: the module
431	  will be called atmel-aes.
432
433config CRYPTO_DEV_ATMEL_TDES
434	tristate "Support for Atmel DES/TDES hw accelerator"
435	depends on ARCH_AT91
436	select CRYPTO_DES
437	select CRYPTO_BLKCIPHER
438	help
439	  Some Atmel processors have DES/TDES hw accelerator.
440	  Select this if you want to use the Atmel module for
441	  DES/TDES algorithms.
442
443	  To compile this driver as a module, choose M here: the module
444	  will be called atmel-tdes.
445
446config CRYPTO_DEV_ATMEL_SHA
447	tristate "Support for Atmel SHA hw accelerator"
448	depends on ARCH_AT91
449	select CRYPTO_HASH
450	help
451	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
452	  hw accelerator.
453	  Select this if you want to use the Atmel module for
454	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
455
456	  To compile this driver as a module, choose M here: the module
457	  will be called atmel-sha.
458
459config CRYPTO_DEV_CCP
460	bool "Support for AMD Cryptographic Coprocessor"
461	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
462	help
463	  The AMD Cryptographic Coprocessor provides hardware offload support
464	  for encryption, hashing and related operations.
465
466if CRYPTO_DEV_CCP
467	source "drivers/crypto/ccp/Kconfig"
468endif
469
470config CRYPTO_DEV_MXS_DCP
471	tristate "Support for Freescale MXS DCP"
472	depends on (ARCH_MXS || ARCH_MXC)
473	select STMP_DEVICE
474	select CRYPTO_CBC
475	select CRYPTO_ECB
476	select CRYPTO_AES
477	select CRYPTO_BLKCIPHER
478	select CRYPTO_HASH
479	help
480	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
481	  co-processor on the die.
482
483	  To compile this driver as a module, choose M here: the module
484	  will be called mxs-dcp.
485
486source "drivers/crypto/qat/Kconfig"
487
488config CRYPTO_DEV_QCE
489	tristate "Qualcomm crypto engine accelerator"
490	depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
491	select CRYPTO_AES
492	select CRYPTO_DES
493	select CRYPTO_ECB
494	select CRYPTO_CBC
495	select CRYPTO_XTS
496	select CRYPTO_CTR
497	select CRYPTO_BLKCIPHER
498	help
499	  This driver supports Qualcomm crypto engine accelerator
500	  hardware. To compile this driver as a module, choose M here. The
501	  module will be called qcrypto.
502
503config CRYPTO_DEV_VMX
504	bool "Support for VMX cryptographic acceleration instructions"
505	depends on PPC64 && VSX
506	help
507	  Support for VMX cryptographic acceleration instructions.
508
509source "drivers/crypto/vmx/Kconfig"
510
511config CRYPTO_DEV_IMGTEC_HASH
512	tristate "Imagination Technologies hardware hash accelerator"
513	depends on MIPS || COMPILE_TEST
514	depends on HAS_DMA
515	select CRYPTO_MD5
516	select CRYPTO_SHA1
517	select CRYPTO_SHA256
518	select CRYPTO_HASH
519	help
520	  This driver interfaces with the Imagination Technologies
521	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
522	  hashing algorithms.
523
524config CRYPTO_DEV_SUN4I_SS
525	tristate "Support for Allwinner Security System cryptographic accelerator"
526	depends on ARCH_SUNXI && !64BIT
527	select CRYPTO_MD5
528	select CRYPTO_SHA1
529	select CRYPTO_AES
530	select CRYPTO_DES
531	select CRYPTO_BLKCIPHER
532	help
533	  Some Allwinner SoC have a crypto accelerator named
534	  Security System. Select this if you want to use it.
535	  The Security System handle AES/DES/3DES ciphers in CBC mode
536	  and SHA1 and MD5 hash algorithms.
537
538	  To compile this driver as a module, choose M here: the module
539	  will be called sun4i-ss.
540
541config CRYPTO_DEV_ROCKCHIP
542	tristate "Rockchip's Cryptographic Engine driver"
543	depends on OF && ARCH_ROCKCHIP
544	select CRYPTO_AES
545	select CRYPTO_DES
546	select CRYPTO_MD5
547	select CRYPTO_SHA1
548	select CRYPTO_SHA256
549	select CRYPTO_HASH
550	select CRYPTO_BLKCIPHER
551
552	help
553	  This driver interfaces with the hardware crypto accelerator.
554	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
555
556source "drivers/crypto/chelsio/Kconfig"
557
558source "drivers/crypto/virtio/Kconfig"
559
560endif # CRYPTO_HW
561