1 2menuconfig CRYPTO_HW 3 bool "Hardware crypto devices" 4 default y 5 ---help--- 6 Say Y here to get to see options for hardware crypto devices and 7 processors. This option alone does not add any kernel code. 8 9 If you say N, all options in this submenu will be skipped and disabled. 10 11if CRYPTO_HW 12 13config CRYPTO_DEV_PADLOCK 14 tristate "Support for VIA PadLock ACE" 15 depends on X86 && !UML 16 help 17 Some VIA processors come with an integrated crypto engine 18 (so called VIA PadLock ACE, Advanced Cryptography Engine) 19 that provides instructions for very fast cryptographic 20 operations with supported algorithms. 21 22 The instructions are used only when the CPU supports them. 23 Otherwise software encryption is used. 24 25config CRYPTO_DEV_PADLOCK_AES 26 tristate "PadLock driver for AES algorithm" 27 depends on CRYPTO_DEV_PADLOCK 28 select CRYPTO_BLKCIPHER 29 select CRYPTO_AES 30 help 31 Use VIA PadLock for AES algorithm. 32 33 Available in VIA C3 and newer CPUs. 34 35 If unsure say M. The compiled module will be 36 called padlock-aes. 37 38config CRYPTO_DEV_PADLOCK_SHA 39 tristate "PadLock driver for SHA1 and SHA256 algorithms" 40 depends on CRYPTO_DEV_PADLOCK 41 select CRYPTO_HASH 42 select CRYPTO_SHA1 43 select CRYPTO_SHA256 44 help 45 Use VIA PadLock for SHA1/SHA256 algorithms. 46 47 Available in VIA C7 and newer processors. 48 49 If unsure say M. The compiled module will be 50 called padlock-sha. 51 52config CRYPTO_DEV_GEODE 53 tristate "Support for the Geode LX AES engine" 54 depends on X86_32 && PCI 55 select CRYPTO_ALGAPI 56 select CRYPTO_BLKCIPHER 57 help 58 Say 'Y' here to use the AMD Geode LX processor on-board AES 59 engine for the CryptoAPI AES algorithm. 60 61 To compile this driver as a module, choose M here: the module 62 will be called geode-aes. 63 64config ZCRYPT 65 tristate "Support for s390 cryptographic adapters" 66 depends on S390 67 select HW_RANDOM 68 help 69 Select this option if you want to enable support for 70 s390 cryptographic adapters like: 71 + PCI-X Cryptographic Coprocessor (PCIXCC) 72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) 73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) 74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) 75 76config PKEY 77 tristate "Kernel API for protected key handling" 78 depends on S390 79 depends on ZCRYPT 80 help 81 With this option enabled the pkey kernel module provides an API 82 for creation and handling of protected keys. Other parts of the 83 kernel or userspace applications may use these functions. 84 85 Select this option if you want to enable the kernel and userspace 86 API for proteced key handling. 87 88 Please note that creation of protected keys from secure keys 89 requires to have at least one CEX card in coprocessor mode 90 available at runtime. 91 92config CRYPTO_PAES_S390 93 tristate "PAES cipher algorithms" 94 depends on S390 95 depends on ZCRYPT 96 depends on PKEY 97 select CRYPTO_ALGAPI 98 select CRYPTO_BLKCIPHER 99 help 100 This is the s390 hardware accelerated implementation of the 101 AES cipher algorithms for use with protected key. 102 103 Select this option if you want to use the paes cipher 104 for example to use protected key encrypted devices. 105 106config CRYPTO_SHA1_S390 107 tristate "SHA1 digest algorithm" 108 depends on S390 109 select CRYPTO_HASH 110 help 111 This is the s390 hardware accelerated implementation of the 112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 113 114 It is available as of z990. 115 116config CRYPTO_SHA256_S390 117 tristate "SHA256 digest algorithm" 118 depends on S390 119 select CRYPTO_HASH 120 help 121 This is the s390 hardware accelerated implementation of the 122 SHA256 secure hash standard (DFIPS 180-2). 123 124 It is available as of z9. 125 126config CRYPTO_SHA512_S390 127 tristate "SHA384 and SHA512 digest algorithm" 128 depends on S390 129 select CRYPTO_HASH 130 help 131 This is the s390 hardware accelerated implementation of the 132 SHA512 secure hash standard. 133 134 It is available as of z10. 135 136config CRYPTO_DES_S390 137 tristate "DES and Triple DES cipher algorithms" 138 depends on S390 139 select CRYPTO_ALGAPI 140 select CRYPTO_BLKCIPHER 141 select CRYPTO_DES 142 help 143 This is the s390 hardware accelerated implementation of the 144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 145 146 As of z990 the ECB and CBC mode are hardware accelerated. 147 As of z196 the CTR mode is hardware accelerated. 148 149config CRYPTO_AES_S390 150 tristate "AES cipher algorithms" 151 depends on S390 152 select CRYPTO_ALGAPI 153 select CRYPTO_BLKCIPHER 154 help 155 This is the s390 hardware accelerated implementation of the 156 AES cipher algorithms (FIPS-197). 157 158 As of z9 the ECB and CBC modes are hardware accelerated 159 for 128 bit keys. 160 As of z10 the ECB and CBC modes are hardware accelerated 161 for all AES key sizes. 162 As of z196 the CTR mode is hardware accelerated for all AES 163 key sizes and XTS mode is hardware accelerated for 256 and 164 512 bit keys. 165 166config S390_PRNG 167 tristate "Pseudo random number generator device driver" 168 depends on S390 169 default "m" 170 help 171 Select this option if you want to use the s390 pseudo random number 172 generator. The PRNG is part of the cryptographic processor functions 173 and uses triple-DES to generate secure random numbers like the 174 ANSI X9.17 standard. User-space programs access the 175 pseudo-random-number device through the char device /dev/prandom. 176 177 It is available as of z9. 178 179config CRYPTO_GHASH_S390 180 tristate "GHASH digest algorithm" 181 depends on S390 182 select CRYPTO_HASH 183 help 184 This is the s390 hardware accelerated implementation of the 185 GHASH message digest algorithm for GCM (Galois/Counter Mode). 186 187 It is available as of z196. 188 189config CRYPTO_CRC32_S390 190 tristate "CRC-32 algorithms" 191 depends on S390 192 select CRYPTO_HASH 193 select CRC32 194 help 195 Select this option if you want to use hardware accelerated 196 implementations of CRC algorithms. With this option, you 197 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) 198 and CRC-32C (Castagnoli). 199 200 It is available with IBM z13 or later. 201 202config CRYPTO_DEV_MARVELL_CESA 203 tristate "Marvell's Cryptographic Engine driver" 204 depends on PLAT_ORION || ARCH_MVEBU 205 select CRYPTO_AES 206 select CRYPTO_DES 207 select CRYPTO_BLKCIPHER 208 select CRYPTO_HASH 209 select SRAM 210 help 211 This driver allows you to utilize the Cryptographic Engines and 212 Security Accelerator (CESA) which can be found on MVEBU and ORION 213 platforms. 214 This driver supports CPU offload through DMA transfers. 215 216config CRYPTO_DEV_NIAGARA2 217 tristate "Niagara2 Stream Processing Unit driver" 218 select CRYPTO_DES 219 select CRYPTO_BLKCIPHER 220 select CRYPTO_HASH 221 select CRYPTO_MD5 222 select CRYPTO_SHA1 223 select CRYPTO_SHA256 224 depends on SPARC64 225 help 226 Each core of a Niagara2 processor contains a Stream 227 Processing Unit, which itself contains several cryptographic 228 sub-units. One set provides the Modular Arithmetic Unit, 229 used for SSL offload. The other set provides the Cipher 230 Group, which can perform encryption, decryption, hashing, 231 checksumming, and raw copies. 232 233config CRYPTO_DEV_HIFN_795X 234 tristate "Driver HIFN 795x crypto accelerator chips" 235 select CRYPTO_DES 236 select CRYPTO_BLKCIPHER 237 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 238 depends on PCI 239 depends on !ARCH_DMA_ADDR_T_64BIT 240 help 241 This option allows you to have support for HIFN 795x crypto adapters. 242 243config CRYPTO_DEV_HIFN_795X_RNG 244 bool "HIFN 795x random number generator" 245 depends on CRYPTO_DEV_HIFN_795X 246 help 247 Select this option if you want to enable the random number generator 248 on the HIFN 795x crypto adapters. 249 250source drivers/crypto/caam/Kconfig 251 252config CRYPTO_DEV_TALITOS 253 tristate "Talitos Freescale Security Engine (SEC)" 254 select CRYPTO_AEAD 255 select CRYPTO_AUTHENC 256 select CRYPTO_BLKCIPHER 257 select CRYPTO_HASH 258 select HW_RANDOM 259 depends on FSL_SOC 260 help 261 Say 'Y' here to use the Freescale Security Engine (SEC) 262 to offload cryptographic algorithm computation. 263 264 The Freescale SEC is present on PowerQUICC 'E' processors, such 265 as the MPC8349E and MPC8548E. 266 267 To compile this driver as a module, choose M here: the module 268 will be called talitos. 269 270config CRYPTO_DEV_TALITOS1 271 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 272 depends on CRYPTO_DEV_TALITOS 273 depends on PPC_8xx || PPC_82xx 274 default y 275 help 276 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 277 found on MPC82xx or the Freescale Security Engine (SEC Lite) 278 version 1.2 found on MPC8xx 279 280config CRYPTO_DEV_TALITOS2 281 bool "SEC2+ (SEC version 2.0 or upper)" 282 depends on CRYPTO_DEV_TALITOS 283 default y if !PPC_8xx 284 help 285 Say 'Y' here to use the Freescale Security Engine (SEC) 286 version 2 and following as found on MPC83xx, MPC85xx, etc ... 287 288config CRYPTO_DEV_IXP4XX 289 tristate "Driver for IXP4xx crypto hardware acceleration" 290 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 291 select CRYPTO_DES 292 select CRYPTO_AEAD 293 select CRYPTO_AUTHENC 294 select CRYPTO_BLKCIPHER 295 help 296 Driver for the IXP4xx NPE crypto engine. 297 298config CRYPTO_DEV_PPC4XX 299 tristate "Driver AMCC PPC4xx crypto accelerator" 300 depends on PPC && 4xx 301 select CRYPTO_HASH 302 select CRYPTO_AEAD 303 select CRYPTO_AES 304 select CRYPTO_CCM 305 select CRYPTO_GCM 306 select CRYPTO_BLKCIPHER 307 help 308 This option allows you to have support for AMCC crypto acceleration. 309 310config HW_RANDOM_PPC4XX 311 bool "PowerPC 4xx generic true random number generator support" 312 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM 313 default y 314 ---help--- 315 This option provides the kernel-side support for the TRNG hardware 316 found in the security function of some PowerPC 4xx SoCs. 317 318config CRYPTO_DEV_OMAP 319 tristate "Support for OMAP crypto HW accelerators" 320 depends on ARCH_OMAP2PLUS 321 help 322 OMAP processors have various crypto HW accelerators. Select this if 323 you want to use the OMAP modules for any of the crypto algorithms. 324 325if CRYPTO_DEV_OMAP 326 327config CRYPTO_DEV_OMAP_SHAM 328 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 329 depends on ARCH_OMAP2PLUS 330 select CRYPTO_SHA1 331 select CRYPTO_MD5 332 select CRYPTO_SHA256 333 select CRYPTO_SHA512 334 select CRYPTO_HMAC 335 help 336 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 337 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 338 339config CRYPTO_DEV_OMAP_AES 340 tristate "Support for OMAP AES hw engine" 341 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 342 select CRYPTO_AES 343 select CRYPTO_BLKCIPHER 344 select CRYPTO_ENGINE 345 select CRYPTO_CBC 346 select CRYPTO_ECB 347 select CRYPTO_CTR 348 select CRYPTO_AEAD 349 help 350 OMAP processors have AES module accelerator. Select this if you 351 want to use the OMAP module for AES algorithms. 352 353config CRYPTO_DEV_OMAP_DES 354 tristate "Support for OMAP DES/3DES hw engine" 355 depends on ARCH_OMAP2PLUS 356 select CRYPTO_DES 357 select CRYPTO_BLKCIPHER 358 select CRYPTO_ENGINE 359 help 360 OMAP processors have DES/3DES module accelerator. Select this if you 361 want to use the OMAP module for DES and 3DES algorithms. Currently 362 the ECB and CBC modes of operation are supported by the driver. Also 363 accesses made on unaligned boundaries are supported. 364 365endif # CRYPTO_DEV_OMAP 366 367config CRYPTO_DEV_PICOXCELL 368 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 369 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK 370 select CRYPTO_AEAD 371 select CRYPTO_AES 372 select CRYPTO_AUTHENC 373 select CRYPTO_BLKCIPHER 374 select CRYPTO_DES 375 select CRYPTO_CBC 376 select CRYPTO_ECB 377 select CRYPTO_SEQIV 378 help 379 This option enables support for the hardware offload engines in the 380 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 381 and for 3gpp Layer 2 ciphering support. 382 383 Saying m here will build a module named pipcoxcell_crypto. 384 385config CRYPTO_DEV_SAHARA 386 tristate "Support for SAHARA crypto accelerator" 387 depends on ARCH_MXC && OF 388 select CRYPTO_BLKCIPHER 389 select CRYPTO_AES 390 select CRYPTO_ECB 391 help 392 This option enables support for the SAHARA HW crypto accelerator 393 found in some Freescale i.MX chips. 394 395config CRYPTO_DEV_MXC_SCC 396 tristate "Support for Freescale Security Controller (SCC)" 397 depends on ARCH_MXC && OF 398 select CRYPTO_BLKCIPHER 399 select CRYPTO_DES 400 help 401 This option enables support for the Security Controller (SCC) 402 found in Freescale i.MX25 chips. 403 404config CRYPTO_DEV_EXYNOS_RNG 405 tristate "EXYNOS HW pseudo random number generator support" 406 depends on ARCH_EXYNOS || COMPILE_TEST 407 depends on HAS_IOMEM 408 select CRYPTO_RNG 409 ---help--- 410 This driver provides kernel-side support through the 411 cryptographic API for the pseudo random number generator hardware 412 found on Exynos SoCs. 413 414 To compile this driver as a module, choose M here: the 415 module will be called exynos-rng. 416 417 If unsure, say Y. 418 419config CRYPTO_DEV_S5P 420 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 421 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 422 depends on HAS_IOMEM && HAS_DMA 423 select CRYPTO_AES 424 select CRYPTO_BLKCIPHER 425 help 426 This option allows you to have support for S5P crypto acceleration. 427 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 428 algorithms execution. 429 430config CRYPTO_DEV_EXYNOS_HASH 431 bool "Support for Samsung Exynos HASH accelerator" 432 depends on CRYPTO_DEV_S5P 433 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 434 select CRYPTO_SHA1 435 select CRYPTO_MD5 436 select CRYPTO_SHA256 437 help 438 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 439 This will select software SHA1, MD5 and SHA256 as they are 440 needed for small and zero-size messages. 441 HASH algorithms will be disabled if EXYNOS_RNG 442 is enabled due to hw conflict. 443 444config CRYPTO_DEV_NX 445 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 446 depends on PPC64 447 help 448 This enables support for the NX hardware cryptographic accelerator 449 coprocessor that is in IBM PowerPC P7+ or later processors. This 450 does not actually enable any drivers, it only allows you to select 451 which acceleration type (encryption and/or compression) to enable. 452 453if CRYPTO_DEV_NX 454 source "drivers/crypto/nx/Kconfig" 455endif 456 457config CRYPTO_DEV_UX500 458 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 459 depends on ARCH_U8500 460 help 461 Driver for ST-Ericsson UX500 crypto engine. 462 463if CRYPTO_DEV_UX500 464 source "drivers/crypto/ux500/Kconfig" 465endif # if CRYPTO_DEV_UX500 466 467config CRYPTO_DEV_ATMEL_AUTHENC 468 tristate "Support for Atmel IPSEC/SSL hw accelerator" 469 depends on HAS_DMA 470 depends on ARCH_AT91 || COMPILE_TEST 471 select CRYPTO_AUTHENC 472 select CRYPTO_DEV_ATMEL_AES 473 select CRYPTO_DEV_ATMEL_SHA 474 help 475 Some Atmel processors can combine the AES and SHA hw accelerators 476 to enhance support of IPSEC/SSL. 477 Select this if you want to use the Atmel modules for 478 authenc(hmac(shaX),Y(cbc)) algorithms. 479 480config CRYPTO_DEV_ATMEL_AES 481 tristate "Support for Atmel AES hw accelerator" 482 depends on HAS_DMA 483 depends on ARCH_AT91 || COMPILE_TEST 484 select CRYPTO_AES 485 select CRYPTO_AEAD 486 select CRYPTO_BLKCIPHER 487 help 488 Some Atmel processors have AES hw accelerator. 489 Select this if you want to use the Atmel module for 490 AES algorithms. 491 492 To compile this driver as a module, choose M here: the module 493 will be called atmel-aes. 494 495config CRYPTO_DEV_ATMEL_TDES 496 tristate "Support for Atmel DES/TDES hw accelerator" 497 depends on HAS_DMA 498 depends on ARCH_AT91 || COMPILE_TEST 499 select CRYPTO_DES 500 select CRYPTO_BLKCIPHER 501 help 502 Some Atmel processors have DES/TDES hw accelerator. 503 Select this if you want to use the Atmel module for 504 DES/TDES algorithms. 505 506 To compile this driver as a module, choose M here: the module 507 will be called atmel-tdes. 508 509config CRYPTO_DEV_ATMEL_SHA 510 tristate "Support for Atmel SHA hw accelerator" 511 depends on HAS_DMA 512 depends on ARCH_AT91 || COMPILE_TEST 513 select CRYPTO_HASH 514 help 515 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 516 hw accelerator. 517 Select this if you want to use the Atmel module for 518 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 519 520 To compile this driver as a module, choose M here: the module 521 will be called atmel-sha. 522 523config CRYPTO_DEV_ATMEL_ECC 524 tristate "Support for Microchip / Atmel ECC hw accelerator" 525 depends on ARCH_AT91 || COMPILE_TEST 526 depends on I2C 527 select CRYPTO_ECDH 528 select CRC16 529 help 530 Microhip / Atmel ECC hw accelerator. 531 Select this if you want to use the Microchip / Atmel module for 532 ECDH algorithm. 533 534 To compile this driver as a module, choose M here: the module 535 will be called atmel-ecc. 536 537config CRYPTO_DEV_CCP 538 bool "Support for AMD Secure Processor" 539 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 540 help 541 The AMD Secure Processor provides support for the Cryptographic Coprocessor 542 (CCP) and the Platform Security Processor (PSP) devices. 543 544if CRYPTO_DEV_CCP 545 source "drivers/crypto/ccp/Kconfig" 546endif 547 548config CRYPTO_DEV_MXS_DCP 549 tristate "Support for Freescale MXS DCP" 550 depends on (ARCH_MXS || ARCH_MXC) 551 select STMP_DEVICE 552 select CRYPTO_CBC 553 select CRYPTO_ECB 554 select CRYPTO_AES 555 select CRYPTO_BLKCIPHER 556 select CRYPTO_HASH 557 help 558 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 559 co-processor on the die. 560 561 To compile this driver as a module, choose M here: the module 562 will be called mxs-dcp. 563 564source "drivers/crypto/qat/Kconfig" 565source "drivers/crypto/cavium/cpt/Kconfig" 566source "drivers/crypto/cavium/nitrox/Kconfig" 567 568config CRYPTO_DEV_CAVIUM_ZIP 569 tristate "Cavium ZIP driver" 570 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 571 ---help--- 572 Select this option if you want to enable compression/decompression 573 acceleration on Cavium's ARM based SoCs 574 575config CRYPTO_DEV_QCE 576 tristate "Qualcomm crypto engine accelerator" 577 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM 578 select CRYPTO_AES 579 select CRYPTO_DES 580 select CRYPTO_ECB 581 select CRYPTO_CBC 582 select CRYPTO_XTS 583 select CRYPTO_CTR 584 select CRYPTO_BLKCIPHER 585 help 586 This driver supports Qualcomm crypto engine accelerator 587 hardware. To compile this driver as a module, choose M here. The 588 module will be called qcrypto. 589 590config CRYPTO_DEV_VMX 591 bool "Support for VMX cryptographic acceleration instructions" 592 depends on PPC64 && VSX 593 help 594 Support for VMX cryptographic acceleration instructions. 595 596source "drivers/crypto/vmx/Kconfig" 597 598config CRYPTO_DEV_IMGTEC_HASH 599 tristate "Imagination Technologies hardware hash accelerator" 600 depends on MIPS || COMPILE_TEST 601 depends on HAS_DMA 602 select CRYPTO_MD5 603 select CRYPTO_SHA1 604 select CRYPTO_SHA256 605 select CRYPTO_HASH 606 help 607 This driver interfaces with the Imagination Technologies 608 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 609 hashing algorithms. 610 611config CRYPTO_DEV_SUN4I_SS 612 tristate "Support for Allwinner Security System cryptographic accelerator" 613 depends on ARCH_SUNXI && !64BIT 614 select CRYPTO_MD5 615 select CRYPTO_SHA1 616 select CRYPTO_AES 617 select CRYPTO_DES 618 select CRYPTO_BLKCIPHER 619 help 620 Some Allwinner SoC have a crypto accelerator named 621 Security System. Select this if you want to use it. 622 The Security System handle AES/DES/3DES ciphers in CBC mode 623 and SHA1 and MD5 hash algorithms. 624 625 To compile this driver as a module, choose M here: the module 626 will be called sun4i-ss. 627 628config CRYPTO_DEV_SUN4I_SS_PRNG 629 bool "Support for Allwinner Security System PRNG" 630 depends on CRYPTO_DEV_SUN4I_SS 631 select CRYPTO_RNG 632 help 633 Select this option if you want to provide kernel-side support for 634 the Pseudo-Random Number Generator found in the Security System. 635 636config CRYPTO_DEV_ROCKCHIP 637 tristate "Rockchip's Cryptographic Engine driver" 638 depends on OF && ARCH_ROCKCHIP 639 select CRYPTO_AES 640 select CRYPTO_DES 641 select CRYPTO_MD5 642 select CRYPTO_SHA1 643 select CRYPTO_SHA256 644 select CRYPTO_HASH 645 select CRYPTO_BLKCIPHER 646 647 help 648 This driver interfaces with the hardware crypto accelerator. 649 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 650 651config CRYPTO_DEV_MEDIATEK 652 tristate "MediaTek's EIP97 Cryptographic Engine driver" 653 depends on HAS_DMA 654 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST 655 select CRYPTO_AES 656 select CRYPTO_AEAD 657 select CRYPTO_BLKCIPHER 658 select CRYPTO_CTR 659 select CRYPTO_SHA1 660 select CRYPTO_SHA256 661 select CRYPTO_SHA512 662 select CRYPTO_HMAC 663 help 664 This driver allows you to utilize the hardware crypto accelerator 665 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... 666 Select this if you want to use it for AES/SHA1/SHA2 algorithms. 667 668source "drivers/crypto/chelsio/Kconfig" 669 670source "drivers/crypto/virtio/Kconfig" 671 672config CRYPTO_DEV_BCM_SPU 673 tristate "Broadcom symmetric crypto/hash acceleration support" 674 depends on ARCH_BCM_IPROC 675 depends on MAILBOX 676 default m 677 select CRYPTO_DES 678 select CRYPTO_MD5 679 select CRYPTO_SHA1 680 select CRYPTO_SHA256 681 select CRYPTO_SHA512 682 help 683 This driver provides support for Broadcom crypto acceleration using the 684 Secure Processing Unit (SPU). The SPU driver registers ablkcipher, 685 ahash, and aead algorithms with the kernel cryptographic API. 686 687source "drivers/crypto/stm32/Kconfig" 688 689config CRYPTO_DEV_SAFEXCEL 690 tristate "Inside Secure's SafeXcel cryptographic engine driver" 691 depends on HAS_DMA && OF 692 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT) 693 select CRYPTO_AES 694 select CRYPTO_BLKCIPHER 695 select CRYPTO_HASH 696 select CRYPTO_HMAC 697 select CRYPTO_SHA1 698 select CRYPTO_SHA256 699 select CRYPTO_SHA512 700 help 701 This driver interfaces with the SafeXcel EIP-197 cryptographic engine 702 designed by Inside Secure. Select this if you want to use CBC/ECB 703 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash 704 algorithms. 705 706config CRYPTO_DEV_ARTPEC6 707 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 708 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 709 depends on HAS_DMA 710 depends on OF 711 select CRYPTO_AEAD 712 select CRYPTO_AES 713 select CRYPTO_ALGAPI 714 select CRYPTO_BLKCIPHER 715 select CRYPTO_CTR 716 select CRYPTO_HASH 717 select CRYPTO_SHA1 718 select CRYPTO_SHA256 719 select CRYPTO_SHA512 720 help 721 Enables the driver for the on-chip crypto accelerator 722 of Axis ARTPEC SoCs. 723 724 To compile this driver as a module, choose M here. 725 726config CRYPTO_DEV_CCREE 727 tristate "Support for ARM TrustZone CryptoCell family of security processors" 728 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 729 default n 730 select CRYPTO_HASH 731 select CRYPTO_BLKCIPHER 732 select CRYPTO_DES 733 select CRYPTO_AEAD 734 select CRYPTO_AUTHENC 735 select CRYPTO_SHA1 736 select CRYPTO_MD5 737 select CRYPTO_SHA256 738 select CRYPTO_SHA512 739 select CRYPTO_HMAC 740 select CRYPTO_AES 741 select CRYPTO_CBC 742 select CRYPTO_ECB 743 select CRYPTO_CTR 744 select CRYPTO_XTS 745 help 746 Say 'Y' to enable a driver for the REE interface of the Arm 747 TrustZone CryptoCell family of processors. Currently the 748 CryptoCell 712, 710 and 630 are supported. 749 Choose this if you wish to use hardware acceleration of 750 cryptographic operations on the system REE. 751 If unsure say Y. 752 753endif # CRYPTO_HW 754