1860fbde4SDmitry Osipenko // SPDX-License-Identifier: GPL-2.0-only
2860fbde4SDmitry Osipenko /*
3860fbde4SDmitry Osipenko * CPU idle driver for Tegra CPUs
4860fbde4SDmitry Osipenko *
5860fbde4SDmitry Osipenko * Copyright (c) 2010-2013, NVIDIA Corporation.
6860fbde4SDmitry Osipenko * Copyright (c) 2011 Google, Inc.
7860fbde4SDmitry Osipenko * Author: Colin Cross <ccross@android.com>
8860fbde4SDmitry Osipenko * Gary King <gking@nvidia.com>
9860fbde4SDmitry Osipenko *
10860fbde4SDmitry Osipenko * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
11860fbde4SDmitry Osipenko *
12860fbde4SDmitry Osipenko * Tegra20/124 driver unification by Dmitry Osipenko <digetx@gmail.com>
13860fbde4SDmitry Osipenko */
14860fbde4SDmitry Osipenko
15860fbde4SDmitry Osipenko #define pr_fmt(fmt) "tegra-cpuidle: " fmt
16860fbde4SDmitry Osipenko
17860fbde4SDmitry Osipenko #include <linux/atomic.h>
18860fbde4SDmitry Osipenko #include <linux/cpuidle.h>
19860fbde4SDmitry Osipenko #include <linux/cpumask.h>
20860fbde4SDmitry Osipenko #include <linux/cpu_pm.h>
21860fbde4SDmitry Osipenko #include <linux/delay.h>
22860fbde4SDmitry Osipenko #include <linux/errno.h>
23860fbde4SDmitry Osipenko #include <linux/platform_device.h>
24860fbde4SDmitry Osipenko #include <linux/types.h>
25860fbde4SDmitry Osipenko
26860fbde4SDmitry Osipenko #include <linux/clk/tegra.h>
2714e086baSDmitry Osipenko #include <linux/firmware/trusted_foundations.h>
28860fbde4SDmitry Osipenko
29860fbde4SDmitry Osipenko #include <soc/tegra/cpuidle.h>
30860fbde4SDmitry Osipenko #include <soc/tegra/flowctrl.h>
31860fbde4SDmitry Osipenko #include <soc/tegra/fuse.h>
32860fbde4SDmitry Osipenko #include <soc/tegra/irq.h>
33860fbde4SDmitry Osipenko #include <soc/tegra/pm.h>
34382ac8e2SDmitry Osipenko #include <soc/tegra/pmc.h>
35860fbde4SDmitry Osipenko
36860fbde4SDmitry Osipenko #include <asm/cpuidle.h>
3714e086baSDmitry Osipenko #include <asm/firmware.h>
38860fbde4SDmitry Osipenko #include <asm/smp_plat.h>
39860fbde4SDmitry Osipenko #include <asm/suspend.h>
40860fbde4SDmitry Osipenko
41860fbde4SDmitry Osipenko enum tegra_state {
42860fbde4SDmitry Osipenko TEGRA_C1,
4319461a49SDmitry Osipenko TEGRA_C7,
44860fbde4SDmitry Osipenko TEGRA_CC6,
45860fbde4SDmitry Osipenko TEGRA_STATE_COUNT,
46860fbde4SDmitry Osipenko };
47860fbde4SDmitry Osipenko
48860fbde4SDmitry Osipenko static atomic_t tegra_idle_barrier;
49860fbde4SDmitry Osipenko static atomic_t tegra_abort_flag;
50860fbde4SDmitry Osipenko
tegra_cpuidle_report_cpus_state(void)51860fbde4SDmitry Osipenko static void tegra_cpuidle_report_cpus_state(void)
52860fbde4SDmitry Osipenko {
53860fbde4SDmitry Osipenko unsigned long cpu, lcpu, csr;
54860fbde4SDmitry Osipenko
55860fbde4SDmitry Osipenko for_each_cpu(lcpu, cpu_possible_mask) {
56860fbde4SDmitry Osipenko cpu = cpu_logical_map(lcpu);
57860fbde4SDmitry Osipenko csr = flowctrl_read_cpu_csr(cpu);
58860fbde4SDmitry Osipenko
59860fbde4SDmitry Osipenko pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n",
60860fbde4SDmitry Osipenko cpu, cpu_online(lcpu), csr);
61860fbde4SDmitry Osipenko }
62860fbde4SDmitry Osipenko }
63860fbde4SDmitry Osipenko
tegra_cpuidle_wait_for_secondary_cpus_parking(void)64860fbde4SDmitry Osipenko static int tegra_cpuidle_wait_for_secondary_cpus_parking(void)
65860fbde4SDmitry Osipenko {
66860fbde4SDmitry Osipenko unsigned int retries = 3;
67860fbde4SDmitry Osipenko
68860fbde4SDmitry Osipenko while (retries--) {
69860fbde4SDmitry Osipenko unsigned int delay_us = 10;
70860fbde4SDmitry Osipenko unsigned int timeout_us = 500 * 1000 / delay_us;
71860fbde4SDmitry Osipenko
72860fbde4SDmitry Osipenko /*
73860fbde4SDmitry Osipenko * The primary CPU0 core shall wait for the secondaries
74860fbde4SDmitry Osipenko * shutdown in order to power-off CPU's cluster safely.
75860fbde4SDmitry Osipenko * The timeout value depends on the current CPU frequency,
76860fbde4SDmitry Osipenko * it takes about 40-150us in average and over 1000us in
77860fbde4SDmitry Osipenko * a worst case scenario.
78860fbde4SDmitry Osipenko */
79860fbde4SDmitry Osipenko do {
80860fbde4SDmitry Osipenko if (tegra_cpu_rail_off_ready())
81860fbde4SDmitry Osipenko return 0;
82860fbde4SDmitry Osipenko
83860fbde4SDmitry Osipenko udelay(delay_us);
84860fbde4SDmitry Osipenko
85860fbde4SDmitry Osipenko } while (timeout_us--);
86860fbde4SDmitry Osipenko
87860fbde4SDmitry Osipenko pr_err("secondary CPU taking too long to park\n");
88860fbde4SDmitry Osipenko
89860fbde4SDmitry Osipenko tegra_cpuidle_report_cpus_state();
90860fbde4SDmitry Osipenko }
91860fbde4SDmitry Osipenko
92860fbde4SDmitry Osipenko pr_err("timed out waiting secondaries to park\n");
93860fbde4SDmitry Osipenko
94860fbde4SDmitry Osipenko return -ETIMEDOUT;
95860fbde4SDmitry Osipenko }
96860fbde4SDmitry Osipenko
tegra_cpuidle_unpark_secondary_cpus(void)97860fbde4SDmitry Osipenko static void tegra_cpuidle_unpark_secondary_cpus(void)
98860fbde4SDmitry Osipenko {
99860fbde4SDmitry Osipenko unsigned int cpu, lcpu;
100860fbde4SDmitry Osipenko
101860fbde4SDmitry Osipenko for_each_cpu(lcpu, cpu_online_mask) {
102860fbde4SDmitry Osipenko cpu = cpu_logical_map(lcpu);
103860fbde4SDmitry Osipenko
104860fbde4SDmitry Osipenko if (cpu > 0) {
105860fbde4SDmitry Osipenko tegra_enable_cpu_clock(cpu);
106860fbde4SDmitry Osipenko tegra_cpu_out_of_reset(cpu);
107860fbde4SDmitry Osipenko flowctrl_write_cpu_halt(cpu, 0);
108860fbde4SDmitry Osipenko }
109860fbde4SDmitry Osipenko }
110860fbde4SDmitry Osipenko }
111860fbde4SDmitry Osipenko
tegra_cpuidle_cc6_enter(unsigned int cpu)112860fbde4SDmitry Osipenko static int tegra_cpuidle_cc6_enter(unsigned int cpu)
113860fbde4SDmitry Osipenko {
114860fbde4SDmitry Osipenko int ret;
115860fbde4SDmitry Osipenko
116860fbde4SDmitry Osipenko if (cpu > 0) {
117860fbde4SDmitry Osipenko ret = cpu_suspend(cpu, tegra_pm_park_secondary_cpu);
118860fbde4SDmitry Osipenko } else {
119860fbde4SDmitry Osipenko ret = tegra_cpuidle_wait_for_secondary_cpus_parking();
120860fbde4SDmitry Osipenko if (!ret)
121860fbde4SDmitry Osipenko ret = tegra_pm_enter_lp2();
122860fbde4SDmitry Osipenko
123860fbde4SDmitry Osipenko tegra_cpuidle_unpark_secondary_cpus();
124860fbde4SDmitry Osipenko }
125860fbde4SDmitry Osipenko
126860fbde4SDmitry Osipenko return ret;
127860fbde4SDmitry Osipenko }
128860fbde4SDmitry Osipenko
tegra_cpuidle_c7_enter(void)12919461a49SDmitry Osipenko static int tegra_cpuidle_c7_enter(void)
13019461a49SDmitry Osipenko {
13114e086baSDmitry Osipenko int err;
13214e086baSDmitry Osipenko
13314e086baSDmitry Osipenko err = call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
13432c8c34dSDmitry Osipenko if (err && err != -ENOSYS)
13514e086baSDmitry Osipenko return err;
13614e086baSDmitry Osipenko
13719461a49SDmitry Osipenko return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
13819461a49SDmitry Osipenko }
13919461a49SDmitry Osipenko
tegra_cpuidle_coupled_barrier(struct cpuidle_device * dev)140860fbde4SDmitry Osipenko static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev)
141860fbde4SDmitry Osipenko {
142860fbde4SDmitry Osipenko if (tegra_pending_sgi()) {
143860fbde4SDmitry Osipenko /*
144860fbde4SDmitry Osipenko * CPU got local interrupt that will be lost after GIC's
145860fbde4SDmitry Osipenko * shutdown because GIC driver doesn't save/restore the
146860fbde4SDmitry Osipenko * pending SGI state across CPU cluster PM. Abort and retry
147860fbde4SDmitry Osipenko * next time.
148860fbde4SDmitry Osipenko */
149860fbde4SDmitry Osipenko atomic_set(&tegra_abort_flag, 1);
150860fbde4SDmitry Osipenko }
151860fbde4SDmitry Osipenko
152860fbde4SDmitry Osipenko cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier);
153860fbde4SDmitry Osipenko
154860fbde4SDmitry Osipenko if (atomic_read(&tegra_abort_flag)) {
155860fbde4SDmitry Osipenko cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier);
156860fbde4SDmitry Osipenko atomic_set(&tegra_abort_flag, 0);
157860fbde4SDmitry Osipenko return -EINTR;
158860fbde4SDmitry Osipenko }
159860fbde4SDmitry Osipenko
160860fbde4SDmitry Osipenko return 0;
161860fbde4SDmitry Osipenko }
162860fbde4SDmitry Osipenko
tegra_cpuidle_state_enter(struct cpuidle_device * dev,int index,unsigned int cpu)163*69e26b4fSPeter Zijlstra static __cpuidle int tegra_cpuidle_state_enter(struct cpuidle_device *dev,
164860fbde4SDmitry Osipenko int index, unsigned int cpu)
165860fbde4SDmitry Osipenko {
1661170433eSDmitry Osipenko int err;
167860fbde4SDmitry Osipenko
168860fbde4SDmitry Osipenko /*
169860fbde4SDmitry Osipenko * CC6 state is the "CPU cluster power-off" state. In order to
170860fbde4SDmitry Osipenko * enter this state, at first the secondary CPU cores need to be
171860fbde4SDmitry Osipenko * parked into offline mode, then the last CPU should clean out
172860fbde4SDmitry Osipenko * remaining dirty cache lines into DRAM and trigger Flow Controller
173860fbde4SDmitry Osipenko * logic that turns off the cluster's power domain (which includes
174860fbde4SDmitry Osipenko * CPU cores, GIC and L2 cache).
175860fbde4SDmitry Osipenko */
176860fbde4SDmitry Osipenko if (index == TEGRA_CC6) {
1771170433eSDmitry Osipenko err = tegra_cpuidle_coupled_barrier(dev);
1781170433eSDmitry Osipenko if (err)
1791170433eSDmitry Osipenko return err;
180860fbde4SDmitry Osipenko }
181860fbde4SDmitry Osipenko
182860fbde4SDmitry Osipenko local_fiq_disable();
1835fca0d9fSPeter Zijlstra tegra_pm_set_cpu_in_lp2();
184860fbde4SDmitry Osipenko cpu_pm_enter();
185860fbde4SDmitry Osipenko
186a01353cfSPeter Zijlstra ct_cpuidle_enter();
1875fca0d9fSPeter Zijlstra
188860fbde4SDmitry Osipenko switch (index) {
18919461a49SDmitry Osipenko case TEGRA_C7:
1901170433eSDmitry Osipenko err = tegra_cpuidle_c7_enter();
19119461a49SDmitry Osipenko break;
19219461a49SDmitry Osipenko
193860fbde4SDmitry Osipenko case TEGRA_CC6:
1941170433eSDmitry Osipenko err = tegra_cpuidle_cc6_enter(cpu);
195860fbde4SDmitry Osipenko break;
196860fbde4SDmitry Osipenko
197860fbde4SDmitry Osipenko default:
1981170433eSDmitry Osipenko err = -EINVAL;
199860fbde4SDmitry Osipenko break;
200860fbde4SDmitry Osipenko }
201860fbde4SDmitry Osipenko
202a01353cfSPeter Zijlstra ct_cpuidle_exit();
2035fca0d9fSPeter Zijlstra
204860fbde4SDmitry Osipenko cpu_pm_exit();
2055fca0d9fSPeter Zijlstra tegra_pm_clear_cpu_in_lp2();
206860fbde4SDmitry Osipenko local_fiq_enable();
207860fbde4SDmitry Osipenko
2081170433eSDmitry Osipenko return err ?: index;
209860fbde4SDmitry Osipenko }
210860fbde4SDmitry Osipenko
tegra_cpuidle_adjust_state_index(int index,unsigned int cpu)21119461a49SDmitry Osipenko static int tegra_cpuidle_adjust_state_index(int index, unsigned int cpu)
21219461a49SDmitry Osipenko {
21319461a49SDmitry Osipenko /*
21419461a49SDmitry Osipenko * On Tegra30 CPU0 can't be power-gated separately from secondary
21519461a49SDmitry Osipenko * cores because it gates the whole CPU cluster.
21619461a49SDmitry Osipenko */
21719461a49SDmitry Osipenko if (cpu > 0 || index != TEGRA_C7 || tegra_get_chip_id() != TEGRA30)
21819461a49SDmitry Osipenko return index;
21919461a49SDmitry Osipenko
22019461a49SDmitry Osipenko /* put CPU0 into C1 if C7 is requested and secondaries are online */
22119461a49SDmitry Osipenko if (!IS_ENABLED(CONFIG_PM_SLEEP) || num_online_cpus() > 1)
22219461a49SDmitry Osipenko index = TEGRA_C1;
22319461a49SDmitry Osipenko else
22419461a49SDmitry Osipenko index = TEGRA_CC6;
22519461a49SDmitry Osipenko
22619461a49SDmitry Osipenko return index;
22719461a49SDmitry Osipenko }
22819461a49SDmitry Osipenko
tegra_cpuidle_enter(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)229*69e26b4fSPeter Zijlstra static __cpuidle int tegra_cpuidle_enter(struct cpuidle_device *dev,
230860fbde4SDmitry Osipenko struct cpuidle_driver *drv,
231860fbde4SDmitry Osipenko int index)
232860fbde4SDmitry Osipenko {
2335fca0d9fSPeter Zijlstra bool do_rcu = drv->states[index].flags & CPUIDLE_FLAG_RCU_IDLE;
234860fbde4SDmitry Osipenko unsigned int cpu = cpu_logical_map(dev->cpu);
2351170433eSDmitry Osipenko int ret;
236860fbde4SDmitry Osipenko
23719461a49SDmitry Osipenko index = tegra_cpuidle_adjust_state_index(index, cpu);
23819461a49SDmitry Osipenko if (dev->states_usage[index].disable)
23919461a49SDmitry Osipenko return -1;
24019461a49SDmitry Osipenko
2415fca0d9fSPeter Zijlstra if (index == TEGRA_C1) {
2425fca0d9fSPeter Zijlstra if (do_rcu)
243a01353cfSPeter Zijlstra ct_cpuidle_enter();
2441170433eSDmitry Osipenko ret = arm_cpuidle_simple_enter(dev, drv, index);
2455fca0d9fSPeter Zijlstra if (do_rcu)
246a01353cfSPeter Zijlstra ct_cpuidle_exit();
2475fca0d9fSPeter Zijlstra } else
2481170433eSDmitry Osipenko ret = tegra_cpuidle_state_enter(dev, index, cpu);
24919461a49SDmitry Osipenko
2501170433eSDmitry Osipenko if (ret < 0) {
2511170433eSDmitry Osipenko if (ret != -EINTR || index != TEGRA_CC6)
2521170433eSDmitry Osipenko pr_err_once("failed to enter state %d err: %d\n",
2531170433eSDmitry Osipenko index, ret);
2541170433eSDmitry Osipenko index = -1;
2551170433eSDmitry Osipenko } else {
2561170433eSDmitry Osipenko index = ret;
2571170433eSDmitry Osipenko }
258860fbde4SDmitry Osipenko
2591170433eSDmitry Osipenko return index;
260860fbde4SDmitry Osipenko }
261860fbde4SDmitry Osipenko
tegra114_enter_s2idle(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)262efe97112SNeal Liu static int tegra114_enter_s2idle(struct cpuidle_device *dev,
26314e086baSDmitry Osipenko struct cpuidle_driver *drv,
26414e086baSDmitry Osipenko int index)
26514e086baSDmitry Osipenko {
26614e086baSDmitry Osipenko tegra_cpuidle_enter(dev, drv, index);
267efe97112SNeal Liu
268efe97112SNeal Liu return 0;
26914e086baSDmitry Osipenko }
27014e086baSDmitry Osipenko
271860fbde4SDmitry Osipenko /*
272860fbde4SDmitry Osipenko * The previous versions of Tegra CPUIDLE driver used a different "legacy"
273860fbde4SDmitry Osipenko * terminology for naming of the idling states, while this driver uses the
274860fbde4SDmitry Osipenko * new terminology.
275860fbde4SDmitry Osipenko *
276860fbde4SDmitry Osipenko * Mapping of the old terms into the new ones:
277860fbde4SDmitry Osipenko *
278860fbde4SDmitry Osipenko * Old | New
279860fbde4SDmitry Osipenko * ---------
280860fbde4SDmitry Osipenko * LP3 | C1 (CPU core clock gating)
281860fbde4SDmitry Osipenko * LP2 | C7 (CPU core power gating)
282860fbde4SDmitry Osipenko * LP2 | CC6 (CPU cluster power gating)
283860fbde4SDmitry Osipenko *
284860fbde4SDmitry Osipenko * Note that that the older CPUIDLE driver versions didn't explicitly
285860fbde4SDmitry Osipenko * differentiate the LP2 states because these states either used the same
286860fbde4SDmitry Osipenko * code path or because CC6 wasn't supported.
287860fbde4SDmitry Osipenko */
288860fbde4SDmitry Osipenko static struct cpuidle_driver tegra_idle_driver = {
289860fbde4SDmitry Osipenko .name = "tegra_idle",
290860fbde4SDmitry Osipenko .states = {
291860fbde4SDmitry Osipenko [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600),
29219461a49SDmitry Osipenko [TEGRA_C7] = {
29319461a49SDmitry Osipenko .enter = tegra_cpuidle_enter,
29419461a49SDmitry Osipenko .exit_latency = 2000,
29519461a49SDmitry Osipenko .target_residency = 2200,
29619461a49SDmitry Osipenko .power_usage = 100,
2975fca0d9fSPeter Zijlstra .flags = CPUIDLE_FLAG_TIMER_STOP |
2985fca0d9fSPeter Zijlstra CPUIDLE_FLAG_RCU_IDLE,
29919461a49SDmitry Osipenko .name = "C7",
30019461a49SDmitry Osipenko .desc = "CPU core powered off",
30119461a49SDmitry Osipenko },
302860fbde4SDmitry Osipenko [TEGRA_CC6] = {
303860fbde4SDmitry Osipenko .enter = tegra_cpuidle_enter,
304860fbde4SDmitry Osipenko .exit_latency = 5000,
305860fbde4SDmitry Osipenko .target_residency = 10000,
306860fbde4SDmitry Osipenko .power_usage = 0,
307860fbde4SDmitry Osipenko .flags = CPUIDLE_FLAG_TIMER_STOP |
3085fca0d9fSPeter Zijlstra CPUIDLE_FLAG_RCU_IDLE |
309860fbde4SDmitry Osipenko CPUIDLE_FLAG_COUPLED,
310860fbde4SDmitry Osipenko .name = "CC6",
311860fbde4SDmitry Osipenko .desc = "CPU cluster powered off",
312860fbde4SDmitry Osipenko },
313860fbde4SDmitry Osipenko },
314860fbde4SDmitry Osipenko .state_count = TEGRA_STATE_COUNT,
315860fbde4SDmitry Osipenko .safe_state_index = TEGRA_C1,
316860fbde4SDmitry Osipenko };
317860fbde4SDmitry Osipenko
tegra_cpuidle_disable_state(enum tegra_state state)318860fbde4SDmitry Osipenko static inline void tegra_cpuidle_disable_state(enum tegra_state state)
319860fbde4SDmitry Osipenko {
320860fbde4SDmitry Osipenko cpuidle_driver_state_disabled(&tegra_idle_driver, state, true);
321860fbde4SDmitry Osipenko }
322860fbde4SDmitry Osipenko
323860fbde4SDmitry Osipenko /*
324860fbde4SDmitry Osipenko * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether
325860fbde4SDmitry Osipenko * they are legacy IRQs or MSI, are lost when CC6 is enabled. To work around
326860fbde4SDmitry Osipenko * this, simply disable CC6 if the PCI driver and DT node are both enabled.
327860fbde4SDmitry Osipenko */
tegra_cpuidle_pcie_irqs_in_use(void)328860fbde4SDmitry Osipenko void tegra_cpuidle_pcie_irqs_in_use(void)
329860fbde4SDmitry Osipenko {
330860fbde4SDmitry Osipenko struct cpuidle_state *state_cc6 = &tegra_idle_driver.states[TEGRA_CC6];
331860fbde4SDmitry Osipenko
332860fbde4SDmitry Osipenko if ((state_cc6->flags & CPUIDLE_FLAG_UNUSABLE) ||
333860fbde4SDmitry Osipenko tegra_get_chip_id() != TEGRA20)
334860fbde4SDmitry Osipenko return;
335860fbde4SDmitry Osipenko
336860fbde4SDmitry Osipenko pr_info("disabling CC6 state, since PCIe IRQs are in use\n");
337860fbde4SDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_CC6);
338860fbde4SDmitry Osipenko }
339860fbde4SDmitry Osipenko
tegra_cpuidle_setup_tegra114_c7_state(void)34014e086baSDmitry Osipenko static void tegra_cpuidle_setup_tegra114_c7_state(void)
34114e086baSDmitry Osipenko {
34214e086baSDmitry Osipenko struct cpuidle_state *s = &tegra_idle_driver.states[TEGRA_C7];
34314e086baSDmitry Osipenko
34414e086baSDmitry Osipenko s->enter_s2idle = tegra114_enter_s2idle;
34514e086baSDmitry Osipenko s->target_residency = 1000;
34614e086baSDmitry Osipenko s->exit_latency = 500;
34714e086baSDmitry Osipenko }
34814e086baSDmitry Osipenko
tegra_cpuidle_probe(struct platform_device * pdev)349860fbde4SDmitry Osipenko static int tegra_cpuidle_probe(struct platform_device *pdev)
350860fbde4SDmitry Osipenko {
351bdb1ffdaSDmitry Osipenko if (tegra_pmc_get_suspend_mode() == TEGRA_SUSPEND_NOT_READY)
352bdb1ffdaSDmitry Osipenko return -EPROBE_DEFER;
353bdb1ffdaSDmitry Osipenko
354382ac8e2SDmitry Osipenko /* LP2 could be disabled in device-tree */
355382ac8e2SDmitry Osipenko if (tegra_pmc_get_suspend_mode() < TEGRA_SUSPEND_LP2)
356382ac8e2SDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_CC6);
357382ac8e2SDmitry Osipenko
358860fbde4SDmitry Osipenko /*
359860fbde4SDmitry Osipenko * Required suspend-resume functionality, which is provided by the
360860fbde4SDmitry Osipenko * Tegra-arch core and PMC driver, is unavailable if PM-sleep option
361860fbde4SDmitry Osipenko * is disabled.
362860fbde4SDmitry Osipenko */
36319461a49SDmitry Osipenko if (!IS_ENABLED(CONFIG_PM_SLEEP)) {
36419461a49SDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_C7);
365860fbde4SDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_CC6);
36619461a49SDmitry Osipenko }
36719461a49SDmitry Osipenko
36819461a49SDmitry Osipenko /*
36919461a49SDmitry Osipenko * Generic WFI state (also known as C1 or LP3) and the coupled CPU
37019461a49SDmitry Osipenko * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs.
37119461a49SDmitry Osipenko */
37219461a49SDmitry Osipenko switch (tegra_get_chip_id()) {
37319461a49SDmitry Osipenko case TEGRA20:
37419461a49SDmitry Osipenko /* Tegra20 isn't capable to power-off individual CPU cores */
37519461a49SDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_C7);
37619461a49SDmitry Osipenko break;
37719461a49SDmitry Osipenko
37819461a49SDmitry Osipenko case TEGRA30:
37919461a49SDmitry Osipenko break;
38019461a49SDmitry Osipenko
38114e086baSDmitry Osipenko case TEGRA114:
38214e086baSDmitry Osipenko case TEGRA124:
38314e086baSDmitry Osipenko tegra_cpuidle_setup_tegra114_c7_state();
38414e086baSDmitry Osipenko
38514e086baSDmitry Osipenko /* coupled CC6 (LP2) state isn't implemented yet */
38614e086baSDmitry Osipenko tegra_cpuidle_disable_state(TEGRA_CC6);
38714e086baSDmitry Osipenko break;
38814e086baSDmitry Osipenko
38919461a49SDmitry Osipenko default:
39019461a49SDmitry Osipenko return -EINVAL;
39119461a49SDmitry Osipenko }
392860fbde4SDmitry Osipenko
393860fbde4SDmitry Osipenko return cpuidle_register(&tegra_idle_driver, cpu_possible_mask);
394860fbde4SDmitry Osipenko }
395860fbde4SDmitry Osipenko
396860fbde4SDmitry Osipenko static struct platform_driver tegra_cpuidle_driver = {
397860fbde4SDmitry Osipenko .probe = tegra_cpuidle_probe,
398860fbde4SDmitry Osipenko .driver = {
399860fbde4SDmitry Osipenko .name = "tegra-cpuidle",
400860fbde4SDmitry Osipenko },
401860fbde4SDmitry Osipenko };
402860fbde4SDmitry Osipenko builtin_platform_driver(tegra_cpuidle_driver);
403