12849dd8bSTaniya Das // SPDX-License-Identifier: GPL-2.0 22849dd8bSTaniya Das /* 32849dd8bSTaniya Das * Copyright (c) 2018, The Linux Foundation. All rights reserved. 42849dd8bSTaniya Das */ 52849dd8bSTaniya Das 62849dd8bSTaniya Das #include <linux/bitfield.h> 72849dd8bSTaniya Das #include <linux/cpufreq.h> 82849dd8bSTaniya Das #include <linux/init.h> 951c843cfSSibi Sankar #include <linux/interconnect.h> 102849dd8bSTaniya Das #include <linux/kernel.h> 112849dd8bSTaniya Das #include <linux/module.h> 122849dd8bSTaniya Das #include <linux/of_address.h> 132849dd8bSTaniya Das #include <linux/of_platform.h> 1455538fbcSTaniya Das #include <linux/pm_opp.h> 152849dd8bSTaniya Das #include <linux/slab.h> 162849dd8bSTaniya Das 172849dd8bSTaniya Das #define LUT_MAX_ENTRIES 40U 182849dd8bSTaniya Das #define LUT_SRC GENMASK(31, 30) 192849dd8bSTaniya Das #define LUT_L_VAL GENMASK(7, 0) 202849dd8bSTaniya Das #define LUT_CORE_COUNT GENMASK(18, 16) 2155538fbcSTaniya Das #define LUT_VOLT GENMASK(11, 0) 222849dd8bSTaniya Das #define LUT_ROW_SIZE 32 232849dd8bSTaniya Das #define CLK_HW_DIV 2 240eae1e37SSibi Sankar #define LUT_TURBO_IND 1 252849dd8bSTaniya Das 262849dd8bSTaniya Das /* Register offsets */ 272849dd8bSTaniya Das #define REG_ENABLE 0x0 2855538fbcSTaniya Das #define REG_FREQ_LUT 0x110 2955538fbcSTaniya Das #define REG_VOLT_LUT 0x114 302849dd8bSTaniya Das #define REG_PERF_STATE 0x920 312849dd8bSTaniya Das 322849dd8bSTaniya Das static unsigned long cpu_hw_rate, xo_rate; 332849dd8bSTaniya Das static struct platform_device *global_pdev; 3451c843cfSSibi Sankar static bool icc_scaling_enabled; 3551c843cfSSibi Sankar 3651c843cfSSibi Sankar static int qcom_cpufreq_set_bw(struct cpufreq_policy *policy, 3751c843cfSSibi Sankar unsigned long freq_khz) 3851c843cfSSibi Sankar { 3951c843cfSSibi Sankar unsigned long freq_hz = freq_khz * 1000; 4051c843cfSSibi Sankar struct dev_pm_opp *opp; 4151c843cfSSibi Sankar struct device *dev; 4251c843cfSSibi Sankar int ret; 4351c843cfSSibi Sankar 4451c843cfSSibi Sankar dev = get_cpu_device(policy->cpu); 4551c843cfSSibi Sankar if (!dev) 4651c843cfSSibi Sankar return -ENODEV; 4751c843cfSSibi Sankar 4851c843cfSSibi Sankar opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); 4951c843cfSSibi Sankar if (IS_ERR(opp)) 5051c843cfSSibi Sankar return PTR_ERR(opp); 5151c843cfSSibi Sankar 5251c843cfSSibi Sankar ret = dev_pm_opp_set_bw(dev, opp); 5351c843cfSSibi Sankar dev_pm_opp_put(opp); 5451c843cfSSibi Sankar return ret; 5551c843cfSSibi Sankar } 5651c843cfSSibi Sankar 5751c843cfSSibi Sankar static int qcom_cpufreq_update_opp(struct device *cpu_dev, 5851c843cfSSibi Sankar unsigned long freq_khz, 5951c843cfSSibi Sankar unsigned long volt) 6051c843cfSSibi Sankar { 6151c843cfSSibi Sankar unsigned long freq_hz = freq_khz * 1000; 6251c843cfSSibi Sankar int ret; 6351c843cfSSibi Sankar 6451c843cfSSibi Sankar /* Skip voltage update if the opp table is not available */ 6551c843cfSSibi Sankar if (!icc_scaling_enabled) 6651c843cfSSibi Sankar return dev_pm_opp_add(cpu_dev, freq_hz, volt); 6751c843cfSSibi Sankar 6851c843cfSSibi Sankar ret = dev_pm_opp_adjust_voltage(cpu_dev, freq_hz, volt, volt, volt); 6951c843cfSSibi Sankar if (ret) { 7051c843cfSSibi Sankar dev_err(cpu_dev, "Voltage update failed freq=%ld\n", freq_khz); 7151c843cfSSibi Sankar return ret; 7251c843cfSSibi Sankar } 7351c843cfSSibi Sankar 7451c843cfSSibi Sankar return dev_pm_opp_enable(cpu_dev, freq_hz); 7551c843cfSSibi Sankar } 762849dd8bSTaniya Das 772849dd8bSTaniya Das static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, 782849dd8bSTaniya Das unsigned int index) 792849dd8bSTaniya Das { 802849dd8bSTaniya Das void __iomem *perf_state_reg = policy->driver_data; 81ada54f35SDouglas RAILLARD unsigned long freq = policy->freq_table[index].frequency; 822849dd8bSTaniya Das 832849dd8bSTaniya Das writel_relaxed(index, perf_state_reg); 842849dd8bSTaniya Das 8551c843cfSSibi Sankar if (icc_scaling_enabled) 8651c843cfSSibi Sankar qcom_cpufreq_set_bw(policy, freq); 8751c843cfSSibi Sankar 88ada54f35SDouglas RAILLARD arch_set_freq_scale(policy->related_cpus, freq, 89ada54f35SDouglas RAILLARD policy->cpuinfo.max_freq); 902849dd8bSTaniya Das return 0; 912849dd8bSTaniya Das } 922849dd8bSTaniya Das 932849dd8bSTaniya Das static unsigned int qcom_cpufreq_hw_get(unsigned int cpu) 942849dd8bSTaniya Das { 952849dd8bSTaniya Das void __iomem *perf_state_reg; 962849dd8bSTaniya Das struct cpufreq_policy *policy; 972849dd8bSTaniya Das unsigned int index; 982849dd8bSTaniya Das 992849dd8bSTaniya Das policy = cpufreq_cpu_get_raw(cpu); 1002849dd8bSTaniya Das if (!policy) 1012849dd8bSTaniya Das return 0; 1022849dd8bSTaniya Das 1032849dd8bSTaniya Das perf_state_reg = policy->driver_data; 1042849dd8bSTaniya Das 1052849dd8bSTaniya Das index = readl_relaxed(perf_state_reg); 1062849dd8bSTaniya Das index = min(index, LUT_MAX_ENTRIES - 1); 1072849dd8bSTaniya Das 1082849dd8bSTaniya Das return policy->freq_table[index].frequency; 1092849dd8bSTaniya Das } 1102849dd8bSTaniya Das 1112849dd8bSTaniya Das static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, 1122849dd8bSTaniya Das unsigned int target_freq) 1132849dd8bSTaniya Das { 1142849dd8bSTaniya Das void __iomem *perf_state_reg = policy->driver_data; 1152849dd8bSTaniya Das int index; 116ada54f35SDouglas RAILLARD unsigned long freq; 1172849dd8bSTaniya Das 1182849dd8bSTaniya Das index = policy->cached_resolved_idx; 1192849dd8bSTaniya Das if (index < 0) 1202849dd8bSTaniya Das return 0; 1212849dd8bSTaniya Das 1222849dd8bSTaniya Das writel_relaxed(index, perf_state_reg); 1232849dd8bSTaniya Das 124ada54f35SDouglas RAILLARD freq = policy->freq_table[index].frequency; 125ada54f35SDouglas RAILLARD arch_set_freq_scale(policy->related_cpus, freq, 126ada54f35SDouglas RAILLARD policy->cpuinfo.max_freq); 127ada54f35SDouglas RAILLARD 128ada54f35SDouglas RAILLARD return freq; 1292849dd8bSTaniya Das } 1302849dd8bSTaniya Das 13155538fbcSTaniya Das static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, 1322849dd8bSTaniya Das struct cpufreq_policy *policy, 1332849dd8bSTaniya Das void __iomem *base) 1342849dd8bSTaniya Das { 1350eae1e37SSibi Sankar u32 data, src, lval, i, core_count, prev_freq = 0, freq; 13655538fbcSTaniya Das u32 volt; 1372849dd8bSTaniya Das struct cpufreq_frequency_table *table; 13851c843cfSSibi Sankar struct dev_pm_opp *opp; 13951c843cfSSibi Sankar unsigned long rate; 14051c843cfSSibi Sankar int ret; 1412849dd8bSTaniya Das 1422849dd8bSTaniya Das table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL); 1432849dd8bSTaniya Das if (!table) 1442849dd8bSTaniya Das return -ENOMEM; 1452849dd8bSTaniya Das 14651c843cfSSibi Sankar ret = dev_pm_opp_of_add_table(cpu_dev); 14751c843cfSSibi Sankar if (!ret) { 14851c843cfSSibi Sankar /* Disable all opps and cross-validate against LUT later */ 14951c843cfSSibi Sankar icc_scaling_enabled = true; 15051c843cfSSibi Sankar for (rate = 0; ; rate++) { 15151c843cfSSibi Sankar opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); 15251c843cfSSibi Sankar if (IS_ERR(opp)) 15351c843cfSSibi Sankar break; 15451c843cfSSibi Sankar 15551c843cfSSibi Sankar dev_pm_opp_put(opp); 15651c843cfSSibi Sankar dev_pm_opp_disable(cpu_dev, rate); 15751c843cfSSibi Sankar } 15851c843cfSSibi Sankar } else if (ret != -ENODEV) { 15951c843cfSSibi Sankar dev_err(cpu_dev, "Invalid opp table in device tree\n"); 16051c843cfSSibi Sankar return ret; 16151c843cfSSibi Sankar } else { 162afdb219bSSibi Sankar policy->fast_switch_possible = true; 16351c843cfSSibi Sankar icc_scaling_enabled = false; 16451c843cfSSibi Sankar } 16551c843cfSSibi Sankar 1662849dd8bSTaniya Das for (i = 0; i < LUT_MAX_ENTRIES; i++) { 16755538fbcSTaniya Das data = readl_relaxed(base + REG_FREQ_LUT + 16855538fbcSTaniya Das i * LUT_ROW_SIZE); 1692849dd8bSTaniya Das src = FIELD_GET(LUT_SRC, data); 1702849dd8bSTaniya Das lval = FIELD_GET(LUT_L_VAL, data); 1712849dd8bSTaniya Das core_count = FIELD_GET(LUT_CORE_COUNT, data); 1722849dd8bSTaniya Das 17355538fbcSTaniya Das data = readl_relaxed(base + REG_VOLT_LUT + 17455538fbcSTaniya Das i * LUT_ROW_SIZE); 17555538fbcSTaniya Das volt = FIELD_GET(LUT_VOLT, data) * 1000; 17655538fbcSTaniya Das 1772849dd8bSTaniya Das if (src) 1782849dd8bSTaniya Das freq = xo_rate * lval / 1000; 1792849dd8bSTaniya Das else 1802849dd8bSTaniya Das freq = cpu_hw_rate / 1000; 1812849dd8bSTaniya Das 1820eae1e37SSibi Sankar if (freq != prev_freq && core_count != LUT_TURBO_IND) { 1832849dd8bSTaniya Das table[i].frequency = freq; 18451c843cfSSibi Sankar qcom_cpufreq_update_opp(cpu_dev, freq, volt); 18555538fbcSTaniya Das dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i, 1862849dd8bSTaniya Das freq, core_count); 1870eae1e37SSibi Sankar } else if (core_count == LUT_TURBO_IND) { 18855538fbcSTaniya Das table[i].frequency = CPUFREQ_ENTRY_INVALID; 1892849dd8bSTaniya Das } 1902849dd8bSTaniya Das 1912849dd8bSTaniya Das /* 1922849dd8bSTaniya Das * Two of the same frequencies with the same core counts means 1932849dd8bSTaniya Das * end of table 1942849dd8bSTaniya Das */ 1950eae1e37SSibi Sankar if (i > 0 && prev_freq == freq) { 1962849dd8bSTaniya Das struct cpufreq_frequency_table *prev = &table[i - 1]; 1972849dd8bSTaniya Das 1982849dd8bSTaniya Das /* 1992849dd8bSTaniya Das * Only treat the last frequency that might be a boost 2002849dd8bSTaniya Das * as the boost frequency 2012849dd8bSTaniya Das */ 2020eae1e37SSibi Sankar if (prev->frequency == CPUFREQ_ENTRY_INVALID) { 2032849dd8bSTaniya Das prev->frequency = prev_freq; 2042849dd8bSTaniya Das prev->flags = CPUFREQ_BOOST_FREQ; 20551c843cfSSibi Sankar qcom_cpufreq_update_opp(cpu_dev, prev_freq, volt); 2062849dd8bSTaniya Das } 2072849dd8bSTaniya Das 2082849dd8bSTaniya Das break; 2092849dd8bSTaniya Das } 2102849dd8bSTaniya Das 2112849dd8bSTaniya Das prev_freq = freq; 2122849dd8bSTaniya Das } 2132849dd8bSTaniya Das 2142849dd8bSTaniya Das table[i].frequency = CPUFREQ_TABLE_END; 2152849dd8bSTaniya Das policy->freq_table = table; 21655538fbcSTaniya Das dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); 2172849dd8bSTaniya Das 2182849dd8bSTaniya Das return 0; 2192849dd8bSTaniya Das } 2202849dd8bSTaniya Das 2212849dd8bSTaniya Das static void qcom_get_related_cpus(int index, struct cpumask *m) 2222849dd8bSTaniya Das { 2232849dd8bSTaniya Das struct device_node *cpu_np; 2242849dd8bSTaniya Das struct of_phandle_args args; 2252849dd8bSTaniya Das int cpu, ret; 2262849dd8bSTaniya Das 2272849dd8bSTaniya Das for_each_possible_cpu(cpu) { 2282849dd8bSTaniya Das cpu_np = of_cpu_device_node_get(cpu); 2292849dd8bSTaniya Das if (!cpu_np) 2302849dd8bSTaniya Das continue; 2312849dd8bSTaniya Das 2322849dd8bSTaniya Das ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain", 2332849dd8bSTaniya Das "#freq-domain-cells", 0, 2342849dd8bSTaniya Das &args); 2352849dd8bSTaniya Das of_node_put(cpu_np); 2362849dd8bSTaniya Das if (ret < 0) 2372849dd8bSTaniya Das continue; 2382849dd8bSTaniya Das 2392849dd8bSTaniya Das if (index == args.args[0]) 2402849dd8bSTaniya Das cpumask_set_cpu(cpu, m); 2412849dd8bSTaniya Das } 2422849dd8bSTaniya Das } 2432849dd8bSTaniya Das 2442849dd8bSTaniya Das static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) 2452849dd8bSTaniya Das { 2462849dd8bSTaniya Das struct device *dev = &global_pdev->dev; 2472849dd8bSTaniya Das struct of_phandle_args args; 2482849dd8bSTaniya Das struct device_node *cpu_np; 24955538fbcSTaniya Das struct device *cpu_dev; 2502849dd8bSTaniya Das struct resource *res; 2512849dd8bSTaniya Das void __iomem *base; 2522849dd8bSTaniya Das int ret, index; 2532849dd8bSTaniya Das 25455538fbcSTaniya Das cpu_dev = get_cpu_device(policy->cpu); 25555538fbcSTaniya Das if (!cpu_dev) { 25655538fbcSTaniya Das pr_err("%s: failed to get cpu%d device\n", __func__, 25755538fbcSTaniya Das policy->cpu); 25855538fbcSTaniya Das return -ENODEV; 25955538fbcSTaniya Das } 26055538fbcSTaniya Das 2612849dd8bSTaniya Das cpu_np = of_cpu_device_node_get(policy->cpu); 2622849dd8bSTaniya Das if (!cpu_np) 2632849dd8bSTaniya Das return -EINVAL; 2642849dd8bSTaniya Das 2652849dd8bSTaniya Das ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain", 2662849dd8bSTaniya Das "#freq-domain-cells", 0, &args); 2672849dd8bSTaniya Das of_node_put(cpu_np); 2682849dd8bSTaniya Das if (ret) 2692849dd8bSTaniya Das return ret; 2702849dd8bSTaniya Das 2712849dd8bSTaniya Das index = args.args[0]; 2722849dd8bSTaniya Das 2732849dd8bSTaniya Das res = platform_get_resource(global_pdev, IORESOURCE_MEM, index); 2742849dd8bSTaniya Das if (!res) 2752849dd8bSTaniya Das return -ENODEV; 2762849dd8bSTaniya Das 2772849dd8bSTaniya Das base = devm_ioremap(dev, res->start, resource_size(res)); 2782849dd8bSTaniya Das if (!base) 2792849dd8bSTaniya Das return -ENOMEM; 2802849dd8bSTaniya Das 2812849dd8bSTaniya Das /* HW should be in enabled state to proceed */ 2822849dd8bSTaniya Das if (!(readl_relaxed(base + REG_ENABLE) & 0x1)) { 2832849dd8bSTaniya Das dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index); 2842849dd8bSTaniya Das ret = -ENODEV; 2852849dd8bSTaniya Das goto error; 2862849dd8bSTaniya Das } 2872849dd8bSTaniya Das 2882849dd8bSTaniya Das qcom_get_related_cpus(index, policy->cpus); 2892849dd8bSTaniya Das if (!cpumask_weight(policy->cpus)) { 2902849dd8bSTaniya Das dev_err(dev, "Domain-%d failed to get related CPUs\n", index); 2912849dd8bSTaniya Das ret = -ENOENT; 2922849dd8bSTaniya Das goto error; 2932849dd8bSTaniya Das } 2942849dd8bSTaniya Das 2952849dd8bSTaniya Das policy->driver_data = base + REG_PERF_STATE; 2962849dd8bSTaniya Das 29755538fbcSTaniya Das ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy, base); 2982849dd8bSTaniya Das if (ret) { 2992849dd8bSTaniya Das dev_err(dev, "Domain-%d failed to read LUT\n", index); 3002849dd8bSTaniya Das goto error; 3012849dd8bSTaniya Das } 3022849dd8bSTaniya Das 30355538fbcSTaniya Das ret = dev_pm_opp_get_opp_count(cpu_dev); 30455538fbcSTaniya Das if (ret <= 0) { 30555538fbcSTaniya Das dev_err(cpu_dev, "Failed to add OPPs\n"); 30655538fbcSTaniya Das ret = -ENODEV; 30755538fbcSTaniya Das goto error; 30855538fbcSTaniya Das } 30955538fbcSTaniya Das 310dab53505SMatthias Kaehlcke dev_pm_opp_of_register_em(policy->cpus); 311dab53505SMatthias Kaehlcke 3122849dd8bSTaniya Das return 0; 3132849dd8bSTaniya Das error: 3142849dd8bSTaniya Das devm_iounmap(dev, base); 3152849dd8bSTaniya Das return ret; 3162849dd8bSTaniya Das } 3172849dd8bSTaniya Das 3182849dd8bSTaniya Das static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) 3192849dd8bSTaniya Das { 32055538fbcSTaniya Das struct device *cpu_dev = get_cpu_device(policy->cpu); 3212849dd8bSTaniya Das void __iomem *base = policy->driver_data - REG_PERF_STATE; 3222849dd8bSTaniya Das 32355538fbcSTaniya Das dev_pm_opp_remove_all_dynamic(cpu_dev); 32451c843cfSSibi Sankar dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); 3252849dd8bSTaniya Das kfree(policy->freq_table); 3262849dd8bSTaniya Das devm_iounmap(&global_pdev->dev, base); 3272849dd8bSTaniya Das 3282849dd8bSTaniya Das return 0; 3292849dd8bSTaniya Das } 3302849dd8bSTaniya Das 3312849dd8bSTaniya Das static struct freq_attr *qcom_cpufreq_hw_attr[] = { 3322849dd8bSTaniya Das &cpufreq_freq_attr_scaling_available_freqs, 3332849dd8bSTaniya Das &cpufreq_freq_attr_scaling_boost_freqs, 3342849dd8bSTaniya Das NULL 3352849dd8bSTaniya Das }; 3362849dd8bSTaniya Das 3372849dd8bSTaniya Das static struct cpufreq_driver cpufreq_qcom_hw_driver = { 3382849dd8bSTaniya Das .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK | 3394c5ff1c8SAmit Kucheria CPUFREQ_HAVE_GOVERNOR_PER_POLICY | 3404c5ff1c8SAmit Kucheria CPUFREQ_IS_COOLING_DEV, 3412849dd8bSTaniya Das .verify = cpufreq_generic_frequency_table_verify, 3422849dd8bSTaniya Das .target_index = qcom_cpufreq_hw_target_index, 3432849dd8bSTaniya Das .get = qcom_cpufreq_hw_get, 3442849dd8bSTaniya Das .init = qcom_cpufreq_hw_cpu_init, 3452849dd8bSTaniya Das .exit = qcom_cpufreq_hw_cpu_exit, 3462849dd8bSTaniya Das .fast_switch = qcom_cpufreq_hw_fast_switch, 3472849dd8bSTaniya Das .name = "qcom-cpufreq-hw", 3482849dd8bSTaniya Das .attr = qcom_cpufreq_hw_attr, 3492849dd8bSTaniya Das }; 3502849dd8bSTaniya Das 3512849dd8bSTaniya Das static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) 3522849dd8bSTaniya Das { 35351c843cfSSibi Sankar struct device *cpu_dev; 3542849dd8bSTaniya Das struct clk *clk; 3552849dd8bSTaniya Das int ret; 3562849dd8bSTaniya Das 3572849dd8bSTaniya Das clk = clk_get(&pdev->dev, "xo"); 3582849dd8bSTaniya Das if (IS_ERR(clk)) 3592849dd8bSTaniya Das return PTR_ERR(clk); 3602849dd8bSTaniya Das 3612849dd8bSTaniya Das xo_rate = clk_get_rate(clk); 3622849dd8bSTaniya Das clk_put(clk); 3632849dd8bSTaniya Das 3642849dd8bSTaniya Das clk = clk_get(&pdev->dev, "alternate"); 3652849dd8bSTaniya Das if (IS_ERR(clk)) 3662849dd8bSTaniya Das return PTR_ERR(clk); 3672849dd8bSTaniya Das 3682849dd8bSTaniya Das cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV; 3692849dd8bSTaniya Das clk_put(clk); 3702849dd8bSTaniya Das 3712849dd8bSTaniya Das global_pdev = pdev; 3722849dd8bSTaniya Das 37351c843cfSSibi Sankar /* Check for optional interconnect paths on CPU0 */ 37451c843cfSSibi Sankar cpu_dev = get_cpu_device(0); 37551c843cfSSibi Sankar if (!cpu_dev) 37651c843cfSSibi Sankar return -EPROBE_DEFER; 37751c843cfSSibi Sankar 37851c843cfSSibi Sankar ret = dev_pm_opp_of_find_icc_paths(cpu_dev, NULL); 37951c843cfSSibi Sankar if (ret) 38051c843cfSSibi Sankar return ret; 38151c843cfSSibi Sankar 3822849dd8bSTaniya Das ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver); 3832849dd8bSTaniya Das if (ret) 3842849dd8bSTaniya Das dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n"); 3852849dd8bSTaniya Das else 3862849dd8bSTaniya Das dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n"); 3872849dd8bSTaniya Das 3882849dd8bSTaniya Das return ret; 3892849dd8bSTaniya Das } 3902849dd8bSTaniya Das 3912849dd8bSTaniya Das static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev) 3922849dd8bSTaniya Das { 3932849dd8bSTaniya Das return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver); 3942849dd8bSTaniya Das } 3952849dd8bSTaniya Das 3962849dd8bSTaniya Das static const struct of_device_id qcom_cpufreq_hw_match[] = { 3972849dd8bSTaniya Das { .compatible = "qcom,cpufreq-hw" }, 3982849dd8bSTaniya Das {} 3992849dd8bSTaniya Das }; 4002849dd8bSTaniya Das MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match); 4012849dd8bSTaniya Das 4022849dd8bSTaniya Das static struct platform_driver qcom_cpufreq_hw_driver = { 4032849dd8bSTaniya Das .probe = qcom_cpufreq_hw_driver_probe, 4042849dd8bSTaniya Das .remove = qcom_cpufreq_hw_driver_remove, 4052849dd8bSTaniya Das .driver = { 4062849dd8bSTaniya Das .name = "qcom-cpufreq-hw", 4072849dd8bSTaniya Das .of_match_table = qcom_cpufreq_hw_match, 4082849dd8bSTaniya Das }, 4092849dd8bSTaniya Das }; 4102849dd8bSTaniya Das 4112849dd8bSTaniya Das static int __init qcom_cpufreq_hw_init(void) 4122849dd8bSTaniya Das { 4132849dd8bSTaniya Das return platform_driver_register(&qcom_cpufreq_hw_driver); 4142849dd8bSTaniya Das } 41511ff4bddSAmit Kucheria postcore_initcall(qcom_cpufreq_hw_init); 4162849dd8bSTaniya Das 4172849dd8bSTaniya Das static void __exit qcom_cpufreq_hw_exit(void) 4182849dd8bSTaniya Das { 4192849dd8bSTaniya Das platform_driver_unregister(&qcom_cpufreq_hw_driver); 4202849dd8bSTaniya Das } 4212849dd8bSTaniya Das module_exit(qcom_cpufreq_hw_exit); 4222849dd8bSTaniya Das 4232849dd8bSTaniya Das MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver"); 4242849dd8bSTaniya Das MODULE_LICENSE("GPL v2"); 425