1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2008 Marvell International Ltd.
4  */
5 
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/init.h>
10 #include <linux/cpufreq.h>
11 #include <linux/slab.h>
12 #include <linux/io.h>
13 
14 #include <mach/generic.h>
15 #include <mach/pxa3xx-regs.h>
16 
17 #define HSS_104M	(0)
18 #define HSS_156M	(1)
19 #define HSS_208M	(2)
20 #define HSS_312M	(3)
21 
22 #define SMCFS_78M	(0)
23 #define SMCFS_104M	(2)
24 #define SMCFS_208M	(5)
25 
26 #define SFLFS_104M	(0)
27 #define SFLFS_156M	(1)
28 #define SFLFS_208M	(2)
29 #define SFLFS_312M	(3)
30 
31 #define XSPCLK_156M	(0)
32 #define XSPCLK_NONE	(3)
33 
34 #define DMCFS_26M	(0)
35 #define DMCFS_260M	(3)
36 
37 struct pxa3xx_freq_info {
38 	unsigned int cpufreq_mhz;
39 	unsigned int core_xl : 5;
40 	unsigned int core_xn : 3;
41 	unsigned int hss : 2;
42 	unsigned int dmcfs : 2;
43 	unsigned int smcfs : 3;
44 	unsigned int sflfs : 2;
45 	unsigned int df_clkdiv : 3;
46 
47 	int	vcc_core;	/* in mV */
48 	int	vcc_sram;	/* in mV */
49 };
50 
51 #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
52 {									\
53 	.cpufreq_mhz	= cpufreq,					\
54 	.core_xl	= _xl,						\
55 	.core_xn	= _xn,						\
56 	.hss		= HSS_##_hss##M,				\
57 	.dmcfs		= DMCFS_##_dmc##M,				\
58 	.smcfs		= SMCFS_##_smc##M,				\
59 	.sflfs		= SFLFS_##_sfl##M,				\
60 	.df_clkdiv	= _dfi,						\
61 	.vcc_core	= vcore,					\
62 	.vcc_sram	= vsram,					\
63 }
64 
65 static struct pxa3xx_freq_info pxa300_freqs[] = {
66 	/*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
67 	OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
68 	OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
69 	OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
70 	OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
71 };
72 
73 static struct pxa3xx_freq_info pxa320_freqs[] = {
74 	/*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
75 	OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
76 	OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
77 	OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
78 	OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
79 	OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
80 };
81 
82 static unsigned int pxa3xx_freqs_num;
83 static struct pxa3xx_freq_info *pxa3xx_freqs;
84 static struct cpufreq_frequency_table *pxa3xx_freqs_table;
85 
86 static int setup_freqs_table(struct cpufreq_policy *policy,
87 			     struct pxa3xx_freq_info *freqs, int num)
88 {
89 	struct cpufreq_frequency_table *table;
90 	int i;
91 
92 	table = kcalloc(num + 1, sizeof(*table), GFP_KERNEL);
93 	if (table == NULL)
94 		return -ENOMEM;
95 
96 	for (i = 0; i < num; i++) {
97 		table[i].driver_data = i;
98 		table[i].frequency = freqs[i].cpufreq_mhz * 1000;
99 	}
100 	table[num].driver_data = i;
101 	table[num].frequency = CPUFREQ_TABLE_END;
102 
103 	pxa3xx_freqs = freqs;
104 	pxa3xx_freqs_num = num;
105 	pxa3xx_freqs_table = table;
106 
107 	policy->freq_table = table;
108 
109 	return 0;
110 }
111 
112 static void __update_core_freq(struct pxa3xx_freq_info *info)
113 {
114 	uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
115 	uint32_t accr = ACCR;
116 	uint32_t xclkcfg;
117 
118 	accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
119 	accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
120 
121 	/* No clock until core PLL is re-locked */
122 	accr |= ACCR_XSPCLK(XSPCLK_NONE);
123 
124 	xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2;	/* turbo bit */
125 
126 	ACCR = accr;
127 	__asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
128 
129 	while ((ACSR & mask) != (accr & mask))
130 		cpu_relax();
131 }
132 
133 static void __update_bus_freq(struct pxa3xx_freq_info *info)
134 {
135 	uint32_t mask;
136 	uint32_t accr = ACCR;
137 
138 	mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
139 		ACCR_DMCFS_MASK;
140 
141 	accr &= ~mask;
142 	accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
143 		ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
144 
145 	ACCR = accr;
146 
147 	while ((ACSR & mask) != (accr & mask))
148 		cpu_relax();
149 }
150 
151 static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
152 {
153 	return pxa3xx_get_clk_frequency_khz(0);
154 }
155 
156 static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, unsigned int index)
157 {
158 	struct pxa3xx_freq_info *next;
159 	unsigned long flags;
160 
161 	if (policy->cpu != 0)
162 		return -EINVAL;
163 
164 	next = &pxa3xx_freqs[index];
165 
166 	local_irq_save(flags);
167 	__update_core_freq(next);
168 	__update_bus_freq(next);
169 	local_irq_restore(flags);
170 
171 	return 0;
172 }
173 
174 static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
175 {
176 	int ret = -EINVAL;
177 
178 	/* set default policy and cpuinfo */
179 	policy->min = policy->cpuinfo.min_freq = 104000;
180 	policy->max = policy->cpuinfo.max_freq =
181 		(cpu_is_pxa320()) ? 806000 : 624000;
182 	policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
183 
184 	if (cpu_is_pxa300() || cpu_is_pxa310())
185 		ret = setup_freqs_table(policy, pxa300_freqs,
186 					ARRAY_SIZE(pxa300_freqs));
187 
188 	if (cpu_is_pxa320())
189 		ret = setup_freqs_table(policy, pxa320_freqs,
190 					ARRAY_SIZE(pxa320_freqs));
191 
192 	if (ret) {
193 		pr_err("failed to setup frequency table\n");
194 		return ret;
195 	}
196 
197 	pr_info("CPUFREQ support for PXA3xx initialized\n");
198 	return 0;
199 }
200 
201 static struct cpufreq_driver pxa3xx_cpufreq_driver = {
202 	.flags		= CPUFREQ_NEED_INITIAL_FREQ_CHECK,
203 	.verify		= cpufreq_generic_frequency_table_verify,
204 	.target_index	= pxa3xx_cpufreq_set,
205 	.init		= pxa3xx_cpufreq_init,
206 	.get		= pxa3xx_cpufreq_get,
207 	.name		= "pxa3xx-cpufreq",
208 };
209 
210 static int __init cpufreq_init(void)
211 {
212 	if (cpu_is_pxa3xx())
213 		return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
214 
215 	return 0;
216 }
217 module_init(cpufreq_init);
218 
219 static void __exit cpufreq_exit(void)
220 {
221 	cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
222 }
223 module_exit(cpufreq_exit);
224 
225 MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
226 MODULE_LICENSE("GPL");
227