1 /* 2 * POWERNV cpufreq driver for the IBM POWER processors 3 * 4 * (C) Copyright IBM 2014 5 * 6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 */ 19 20 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 21 22 #include <linux/kernel.h> 23 #include <linux/sysfs.h> 24 #include <linux/cpumask.h> 25 #include <linux/module.h> 26 #include <linux/cpufreq.h> 27 #include <linux/smp.h> 28 #include <linux/of.h> 29 #include <linux/reboot.h> 30 #include <linux/slab.h> 31 #include <linux/cpu.h> 32 #include <trace/events/power.h> 33 34 #include <asm/cputhreads.h> 35 #include <asm/firmware.h> 36 #include <asm/reg.h> 37 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 38 #include <asm/opal.h> 39 #include <linux/timer.h> 40 41 #define POWERNV_MAX_PSTATES 256 42 #define PMSR_PSAFE_ENABLE (1UL << 30) 43 #define PMSR_SPR_EM_DISABLE (1UL << 31) 44 #define PMSR_MAX(x) ((x >> 32) & 0xFF) 45 #define LPSTATE_SHIFT 48 46 #define GPSTATE_SHIFT 56 47 #define GET_LPSTATE(x) (((x) >> LPSTATE_SHIFT) & 0xFF) 48 #define GET_GPSTATE(x) (((x) >> GPSTATE_SHIFT) & 0xFF) 49 50 #define MAX_RAMP_DOWN_TIME 5120 51 /* 52 * On an idle system we want the global pstate to ramp-down from max value to 53 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 54 * then ramp-down rapidly later on. 55 * 56 * This gives a percentage rampdown for time elapsed in milliseconds. 57 * ramp_down_percentage = ((ms * ms) >> 18) 58 * ~= 3.8 * (sec * sec) 59 * 60 * At 0 ms ramp_down_percent = 0 61 * At 5120 ms ramp_down_percent = 100 62 */ 63 #define ramp_down_percent(time) ((time * time) >> 18) 64 65 /* Interval after which the timer is queued to bring down global pstate */ 66 #define GPSTATE_TIMER_INTERVAL 2000 67 68 /** 69 * struct global_pstate_info - Per policy data structure to maintain history of 70 * global pstates 71 * @highest_lpstate_idx: The local pstate index from which we are 72 * ramping down 73 * @elapsed_time: Time in ms spent in ramping down from 74 * highest_lpstate_idx 75 * @last_sampled_time: Time from boot in ms when global pstates were 76 * last set 77 * @last_lpstate_idx, Last set value of local pstate and global 78 * last_gpstate_idx pstate in terms of cpufreq table index 79 * @timer: Is used for ramping down if cpu goes idle for 80 * a long time with global pstate held high 81 * @gpstate_lock: A spinlock to maintain synchronization between 82 * routines called by the timer handler and 83 * governer's target_index calls 84 */ 85 struct global_pstate_info { 86 int highest_lpstate_idx; 87 unsigned int elapsed_time; 88 unsigned int last_sampled_time; 89 int last_lpstate_idx; 90 int last_gpstate_idx; 91 spinlock_t gpstate_lock; 92 struct timer_list timer; 93 struct cpufreq_policy *policy; 94 }; 95 96 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 97 static bool rebooting, throttled, occ_reset; 98 99 static const char * const throttle_reason[] = { 100 "No throttling", 101 "Power Cap", 102 "Processor Over Temperature", 103 "Power Supply Failure", 104 "Over Current", 105 "OCC Reset" 106 }; 107 108 enum throttle_reason_type { 109 NO_THROTTLE = 0, 110 POWERCAP, 111 CPU_OVERTEMP, 112 POWER_SUPPLY_FAILURE, 113 OVERCURRENT, 114 OCC_RESET_THROTTLE, 115 OCC_MAX_REASON 116 }; 117 118 static struct chip { 119 unsigned int id; 120 bool throttled; 121 bool restore; 122 u8 throttle_reason; 123 cpumask_t mask; 124 struct work_struct throttle; 125 int throttle_turbo; 126 int throttle_sub_turbo; 127 int reason[OCC_MAX_REASON]; 128 } *chips; 129 130 static int nr_chips; 131 static DEFINE_PER_CPU(struct chip *, chip_info); 132 133 /* 134 * Note: 135 * The set of pstates consists of contiguous integers. 136 * powernv_pstate_info stores the index of the frequency table for 137 * max, min and nominal frequencies. It also stores number of 138 * available frequencies. 139 * 140 * powernv_pstate_info.nominal indicates the index to the highest 141 * non-turbo frequency. 142 */ 143 static struct powernv_pstate_info { 144 unsigned int min; 145 unsigned int max; 146 unsigned int nominal; 147 unsigned int nr_pstates; 148 bool wof_enabled; 149 } powernv_pstate_info; 150 151 /* Use following macros for conversions between pstate_id and index */ 152 static inline int idx_to_pstate(unsigned int i) 153 { 154 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 155 pr_warn_once("index %u is out of bound\n", i); 156 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 157 } 158 159 return powernv_freqs[i].driver_data; 160 } 161 162 static inline unsigned int pstate_to_idx(int pstate) 163 { 164 int min = powernv_freqs[powernv_pstate_info.min].driver_data; 165 int max = powernv_freqs[powernv_pstate_info.max].driver_data; 166 167 if (min > 0) { 168 if (unlikely((pstate < max) || (pstate > min))) { 169 pr_warn_once("pstate %d is out of bound\n", pstate); 170 return powernv_pstate_info.nominal; 171 } 172 } else { 173 if (unlikely((pstate > max) || (pstate < min))) { 174 pr_warn_once("pstate %d is out of bound\n", pstate); 175 return powernv_pstate_info.nominal; 176 } 177 } 178 /* 179 * abs() is deliberately used so that is works with 180 * both monotonically increasing and decreasing 181 * pstate values 182 */ 183 return abs(pstate - idx_to_pstate(powernv_pstate_info.max)); 184 } 185 186 static inline void reset_gpstates(struct cpufreq_policy *policy) 187 { 188 struct global_pstate_info *gpstates = policy->driver_data; 189 190 gpstates->highest_lpstate_idx = 0; 191 gpstates->elapsed_time = 0; 192 gpstates->last_sampled_time = 0; 193 gpstates->last_lpstate_idx = 0; 194 gpstates->last_gpstate_idx = 0; 195 } 196 197 /* 198 * Initialize the freq table based on data obtained 199 * from the firmware passed via device-tree 200 */ 201 static int init_powernv_pstates(void) 202 { 203 struct device_node *power_mgt; 204 int i, nr_pstates = 0; 205 const __be32 *pstate_ids, *pstate_freqs; 206 u32 len_ids, len_freqs; 207 u32 pstate_min, pstate_max, pstate_nominal; 208 u32 pstate_turbo, pstate_ultra_turbo; 209 210 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 211 if (!power_mgt) { 212 pr_warn("power-mgt node not found\n"); 213 return -ENODEV; 214 } 215 216 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 217 pr_warn("ibm,pstate-min node not found\n"); 218 return -ENODEV; 219 } 220 221 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 222 pr_warn("ibm,pstate-max node not found\n"); 223 return -ENODEV; 224 } 225 226 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 227 &pstate_nominal)) { 228 pr_warn("ibm,pstate-nominal not found\n"); 229 return -ENODEV; 230 } 231 232 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo", 233 &pstate_ultra_turbo)) { 234 powernv_pstate_info.wof_enabled = false; 235 goto next; 236 } 237 238 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo", 239 &pstate_turbo)) { 240 powernv_pstate_info.wof_enabled = false; 241 goto next; 242 } 243 244 if (pstate_turbo == pstate_ultra_turbo) 245 powernv_pstate_info.wof_enabled = false; 246 else 247 powernv_pstate_info.wof_enabled = true; 248 249 next: 250 pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min, 251 pstate_nominal, pstate_max); 252 pr_info("Workload Optimized Frequency is %s in the platform\n", 253 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled"); 254 255 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 256 if (!pstate_ids) { 257 pr_warn("ibm,pstate-ids not found\n"); 258 return -ENODEV; 259 } 260 261 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 262 &len_freqs); 263 if (!pstate_freqs) { 264 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 265 return -ENODEV; 266 } 267 268 if (len_ids != len_freqs) { 269 pr_warn("Entries in ibm,pstate-ids and " 270 "ibm,pstate-frequencies-mhz does not match\n"); 271 } 272 273 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 274 if (!nr_pstates) { 275 pr_warn("No PStates found\n"); 276 return -ENODEV; 277 } 278 279 powernv_pstate_info.nr_pstates = nr_pstates; 280 pr_debug("NR PStates %d\n", nr_pstates); 281 for (i = 0; i < nr_pstates; i++) { 282 u32 id = be32_to_cpu(pstate_ids[i]); 283 u32 freq = be32_to_cpu(pstate_freqs[i]); 284 285 pr_debug("PState id %d freq %d MHz\n", id, freq); 286 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 287 powernv_freqs[i].driver_data = id; 288 289 if (id == pstate_max) 290 powernv_pstate_info.max = i; 291 else if (id == pstate_nominal) 292 powernv_pstate_info.nominal = i; 293 else if (id == pstate_min) 294 powernv_pstate_info.min = i; 295 296 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) { 297 int j; 298 299 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--) 300 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ; 301 } 302 } 303 304 /* End of list marker entry */ 305 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 306 return 0; 307 } 308 309 /* Returns the CPU frequency corresponding to the pstate_id. */ 310 static unsigned int pstate_id_to_freq(int pstate_id) 311 { 312 int i; 313 314 i = pstate_to_idx(pstate_id); 315 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 316 pr_warn("PState id %d outside of PState table, " 317 "reporting nominal id %d instead\n", 318 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 319 i = powernv_pstate_info.nominal; 320 } 321 322 return powernv_freqs[i].frequency; 323 } 324 325 /* 326 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 327 * the firmware 328 */ 329 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 330 char *buf) 331 { 332 return sprintf(buf, "%u\n", 333 powernv_freqs[powernv_pstate_info.nominal].frequency); 334 } 335 336 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 337 __ATTR_RO(cpuinfo_nominal_freq); 338 339 #define SCALING_BOOST_FREQS_ATTR_INDEX 2 340 341 static struct freq_attr *powernv_cpu_freq_attr[] = { 342 &cpufreq_freq_attr_scaling_available_freqs, 343 &cpufreq_freq_attr_cpuinfo_nominal_freq, 344 &cpufreq_freq_attr_scaling_boost_freqs, 345 NULL, 346 }; 347 348 #define throttle_attr(name, member) \ 349 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 350 { \ 351 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 352 \ 353 return sprintf(buf, "%u\n", chip->member); \ 354 } \ 355 \ 356 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 357 358 throttle_attr(unthrottle, reason[NO_THROTTLE]); 359 throttle_attr(powercap, reason[POWERCAP]); 360 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 361 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 362 throttle_attr(overcurrent, reason[OVERCURRENT]); 363 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 364 throttle_attr(turbo_stat, throttle_turbo); 365 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 366 367 static struct attribute *throttle_attrs[] = { 368 &throttle_attr_unthrottle.attr, 369 &throttle_attr_powercap.attr, 370 &throttle_attr_overtemp.attr, 371 &throttle_attr_supply_fault.attr, 372 &throttle_attr_overcurrent.attr, 373 &throttle_attr_occ_reset.attr, 374 &throttle_attr_turbo_stat.attr, 375 &throttle_attr_sub_turbo_stat.attr, 376 NULL, 377 }; 378 379 static const struct attribute_group throttle_attr_grp = { 380 .name = "throttle_stats", 381 .attrs = throttle_attrs, 382 }; 383 384 /* Helper routines */ 385 386 /* Access helpers to power mgt SPR */ 387 388 static inline unsigned long get_pmspr(unsigned long sprn) 389 { 390 switch (sprn) { 391 case SPRN_PMCR: 392 return mfspr(SPRN_PMCR); 393 394 case SPRN_PMICR: 395 return mfspr(SPRN_PMICR); 396 397 case SPRN_PMSR: 398 return mfspr(SPRN_PMSR); 399 } 400 BUG(); 401 } 402 403 static inline void set_pmspr(unsigned long sprn, unsigned long val) 404 { 405 switch (sprn) { 406 case SPRN_PMCR: 407 mtspr(SPRN_PMCR, val); 408 return; 409 410 case SPRN_PMICR: 411 mtspr(SPRN_PMICR, val); 412 return; 413 } 414 BUG(); 415 } 416 417 /* 418 * Use objects of this type to query/update 419 * pstates on a remote CPU via smp_call_function. 420 */ 421 struct powernv_smp_call_data { 422 unsigned int freq; 423 int pstate_id; 424 int gpstate_id; 425 }; 426 427 /* 428 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 429 * 430 * Called via smp_call_function. 431 * 432 * Note: The caller of the smp_call_function should pass an argument of 433 * the type 'struct powernv_smp_call_data *' along with this function. 434 * 435 * The current frequency on this CPU will be returned via 436 * ((struct powernv_smp_call_data *)arg)->freq; 437 */ 438 static void powernv_read_cpu_freq(void *arg) 439 { 440 unsigned long pmspr_val; 441 s8 local_pstate_id; 442 struct powernv_smp_call_data *freq_data = arg; 443 444 pmspr_val = get_pmspr(SPRN_PMSR); 445 446 /* 447 * The local pstate id corresponds bits 48..55 in the PMSR. 448 * Note: Watch out for the sign! 449 */ 450 local_pstate_id = (pmspr_val >> 48) & 0xFF; 451 freq_data->pstate_id = local_pstate_id; 452 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 453 454 pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n", 455 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 456 freq_data->freq); 457 } 458 459 /* 460 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 461 * firmware for CPU 'cpu'. This value is reported through the sysfs 462 * file cpuinfo_cur_freq. 463 */ 464 static unsigned int powernv_cpufreq_get(unsigned int cpu) 465 { 466 struct powernv_smp_call_data freq_data; 467 468 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 469 &freq_data, 1); 470 471 return freq_data.freq; 472 } 473 474 /* 475 * set_pstate: Sets the pstate on this CPU. 476 * 477 * This is called via an smp_call_function. 478 * 479 * The caller must ensure that freq_data is of the type 480 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 481 * on this CPU should be present in freq_data->pstate_id. 482 */ 483 static void set_pstate(void *data) 484 { 485 unsigned long val; 486 struct powernv_smp_call_data *freq_data = data; 487 unsigned long pstate_ul = freq_data->pstate_id; 488 unsigned long gpstate_ul = freq_data->gpstate_id; 489 490 val = get_pmspr(SPRN_PMCR); 491 val = val & 0x0000FFFFFFFFFFFFULL; 492 493 pstate_ul = pstate_ul & 0xFF; 494 gpstate_ul = gpstate_ul & 0xFF; 495 496 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 497 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 498 499 pr_debug("Setting cpu %d pmcr to %016lX\n", 500 raw_smp_processor_id(), val); 501 set_pmspr(SPRN_PMCR, val); 502 } 503 504 /* 505 * get_nominal_index: Returns the index corresponding to the nominal 506 * pstate in the cpufreq table 507 */ 508 static inline unsigned int get_nominal_index(void) 509 { 510 return powernv_pstate_info.nominal; 511 } 512 513 static void powernv_cpufreq_throttle_check(void *data) 514 { 515 struct chip *chip; 516 unsigned int cpu = smp_processor_id(); 517 unsigned long pmsr; 518 int pmsr_pmax; 519 unsigned int pmsr_pmax_idx; 520 521 pmsr = get_pmspr(SPRN_PMSR); 522 chip = this_cpu_read(chip_info); 523 524 /* Check for Pmax Capping */ 525 pmsr_pmax = (s8)PMSR_MAX(pmsr); 526 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 527 if (pmsr_pmax_idx != powernv_pstate_info.max) { 528 if (chip->throttled) 529 goto next; 530 chip->throttled = true; 531 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 532 pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n", 533 cpu, chip->id, pmsr_pmax, 534 idx_to_pstate(powernv_pstate_info.nominal)); 535 chip->throttle_sub_turbo++; 536 } else { 537 chip->throttle_turbo++; 538 } 539 trace_powernv_throttle(chip->id, 540 throttle_reason[chip->throttle_reason], 541 pmsr_pmax); 542 } else if (chip->throttled) { 543 chip->throttled = false; 544 trace_powernv_throttle(chip->id, 545 throttle_reason[chip->throttle_reason], 546 pmsr_pmax); 547 } 548 549 /* Check if Psafe_mode_active is set in PMSR. */ 550 next: 551 if (pmsr & PMSR_PSAFE_ENABLE) { 552 throttled = true; 553 pr_info("Pstate set to safe frequency\n"); 554 } 555 556 /* Check if SPR_EM_DISABLE is set in PMSR */ 557 if (pmsr & PMSR_SPR_EM_DISABLE) { 558 throttled = true; 559 pr_info("Frequency Control disabled from OS\n"); 560 } 561 562 if (throttled) { 563 pr_info("PMSR = %16lx\n", pmsr); 564 pr_warn("CPU Frequency could be throttled\n"); 565 } 566 } 567 568 /** 569 * calc_global_pstate - Calculate global pstate 570 * @elapsed_time: Elapsed time in milliseconds 571 * @local_pstate_idx: New local pstate 572 * @highest_lpstate_idx: pstate from which its ramping down 573 * 574 * Finds the appropriate global pstate based on the pstate from which its 575 * ramping down and the time elapsed in ramping down. It follows a quadratic 576 * equation which ensures that it reaches ramping down to pmin in 5sec. 577 */ 578 static inline int calc_global_pstate(unsigned int elapsed_time, 579 int highest_lpstate_idx, 580 int local_pstate_idx) 581 { 582 int index_diff; 583 584 /* 585 * Using ramp_down_percent we get the percentage of rampdown 586 * that we are expecting to be dropping. Difference between 587 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 588 * number of how many pstates we will drop eventually by the end of 589 * 5 seconds, then just scale it get the number pstates to be dropped. 590 */ 591 index_diff = ((int)ramp_down_percent(elapsed_time) * 592 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 593 594 /* Ensure that global pstate is >= to local pstate */ 595 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 596 return local_pstate_idx; 597 else 598 return highest_lpstate_idx + index_diff; 599 } 600 601 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 602 { 603 unsigned int timer_interval; 604 605 /* 606 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 607 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 608 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 609 * seconds of ramp down time. 610 */ 611 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 612 > MAX_RAMP_DOWN_TIME) 613 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 614 else 615 timer_interval = GPSTATE_TIMER_INTERVAL; 616 617 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 618 } 619 620 /** 621 * gpstate_timer_handler 622 * 623 * @data: pointer to cpufreq_policy on which timer was queued 624 * 625 * This handler brings down the global pstate closer to the local pstate 626 * according quadratic equation. Queues a new timer if it is still not equal 627 * to local pstate 628 */ 629 void gpstate_timer_handler(struct timer_list *t) 630 { 631 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer); 632 struct cpufreq_policy *policy = gpstates->policy; 633 int gpstate_idx, lpstate_idx; 634 unsigned long val; 635 unsigned int time_diff = jiffies_to_msecs(jiffies) 636 - gpstates->last_sampled_time; 637 struct powernv_smp_call_data freq_data; 638 639 if (!spin_trylock(&gpstates->gpstate_lock)) 640 return; 641 642 /* 643 * If PMCR was last updated was using fast_swtich then 644 * We may have wrong in gpstate->last_lpstate_idx 645 * value. Hence, read from PMCR to get correct data. 646 */ 647 val = get_pmspr(SPRN_PMCR); 648 freq_data.gpstate_id = (s8)GET_GPSTATE(val); 649 freq_data.pstate_id = (s8)GET_LPSTATE(val); 650 if (freq_data.gpstate_id == freq_data.pstate_id) { 651 reset_gpstates(policy); 652 spin_unlock(&gpstates->gpstate_lock); 653 return; 654 } 655 656 gpstates->last_sampled_time += time_diff; 657 gpstates->elapsed_time += time_diff; 658 659 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 660 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 661 lpstate_idx = gpstate_idx; 662 reset_gpstates(policy); 663 gpstates->highest_lpstate_idx = gpstate_idx; 664 } else { 665 lpstate_idx = pstate_to_idx(freq_data.pstate_id); 666 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 667 gpstates->highest_lpstate_idx, 668 lpstate_idx); 669 } 670 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 671 gpstates->last_gpstate_idx = gpstate_idx; 672 gpstates->last_lpstate_idx = lpstate_idx; 673 /* 674 * If local pstate is equal to global pstate, rampdown is over 675 * So timer is not required to be queued. 676 */ 677 if (gpstate_idx != gpstates->last_lpstate_idx) 678 queue_gpstate_timer(gpstates); 679 680 spin_unlock(&gpstates->gpstate_lock); 681 682 /* Timer may get migrated to a different cpu on cpu hot unplug */ 683 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 684 } 685 686 /* 687 * powernv_cpufreq_target_index: Sets the frequency corresponding to 688 * the cpufreq table entry indexed by new_index on the cpus in the 689 * mask policy->cpus 690 */ 691 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 692 unsigned int new_index) 693 { 694 struct powernv_smp_call_data freq_data; 695 unsigned int cur_msec, gpstate_idx; 696 struct global_pstate_info *gpstates = policy->driver_data; 697 698 if (unlikely(rebooting) && new_index != get_nominal_index()) 699 return 0; 700 701 if (!throttled) { 702 /* we don't want to be preempted while 703 * checking if the CPU frequency has been throttled 704 */ 705 preempt_disable(); 706 powernv_cpufreq_throttle_check(NULL); 707 preempt_enable(); 708 } 709 710 cur_msec = jiffies_to_msecs(get_jiffies_64()); 711 712 spin_lock(&gpstates->gpstate_lock); 713 freq_data.pstate_id = idx_to_pstate(new_index); 714 715 if (!gpstates->last_sampled_time) { 716 gpstate_idx = new_index; 717 gpstates->highest_lpstate_idx = new_index; 718 goto gpstates_done; 719 } 720 721 if (gpstates->last_gpstate_idx < new_index) { 722 gpstates->elapsed_time += cur_msec - 723 gpstates->last_sampled_time; 724 725 /* 726 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 727 * we should be resetting all global pstate related data. Set it 728 * equal to local pstate to start fresh. 729 */ 730 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 731 reset_gpstates(policy); 732 gpstates->highest_lpstate_idx = new_index; 733 gpstate_idx = new_index; 734 } else { 735 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 736 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 737 gpstates->highest_lpstate_idx, 738 new_index); 739 } 740 } else { 741 reset_gpstates(policy); 742 gpstates->highest_lpstate_idx = new_index; 743 gpstate_idx = new_index; 744 } 745 746 /* 747 * If local pstate is equal to global pstate, rampdown is over 748 * So timer is not required to be queued. 749 */ 750 if (gpstate_idx != new_index) 751 queue_gpstate_timer(gpstates); 752 else 753 del_timer_sync(&gpstates->timer); 754 755 gpstates_done: 756 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 757 gpstates->last_sampled_time = cur_msec; 758 gpstates->last_gpstate_idx = gpstate_idx; 759 gpstates->last_lpstate_idx = new_index; 760 761 spin_unlock(&gpstates->gpstate_lock); 762 763 /* 764 * Use smp_call_function to send IPI and execute the 765 * mtspr on target CPU. We could do that without IPI 766 * if current CPU is within policy->cpus (core) 767 */ 768 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 769 return 0; 770 } 771 772 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 773 { 774 int base, i, ret; 775 struct kernfs_node *kn; 776 struct global_pstate_info *gpstates; 777 778 base = cpu_first_thread_sibling(policy->cpu); 779 780 for (i = 0; i < threads_per_core; i++) 781 cpumask_set_cpu(base + i, policy->cpus); 782 783 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 784 if (!kn) { 785 int ret; 786 787 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 788 if (ret) { 789 pr_info("Failed to create throttle stats directory for cpu %d\n", 790 policy->cpu); 791 return ret; 792 } 793 } else { 794 kernfs_put(kn); 795 } 796 797 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 798 if (!gpstates) 799 return -ENOMEM; 800 801 policy->driver_data = gpstates; 802 803 /* initialize timer */ 804 gpstates->policy = policy; 805 timer_setup(&gpstates->timer, gpstate_timer_handler, 806 TIMER_PINNED | TIMER_DEFERRABLE); 807 gpstates->timer.expires = jiffies + 808 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 809 spin_lock_init(&gpstates->gpstate_lock); 810 ret = cpufreq_table_validate_and_show(policy, powernv_freqs); 811 812 if (ret < 0) { 813 kfree(policy->driver_data); 814 return ret; 815 } 816 817 policy->fast_switch_possible = true; 818 return ret; 819 } 820 821 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 822 { 823 /* timer is deleted in cpufreq_cpu_stop() */ 824 kfree(policy->driver_data); 825 826 return 0; 827 } 828 829 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 830 unsigned long action, void *unused) 831 { 832 int cpu; 833 struct cpufreq_policy cpu_policy; 834 835 rebooting = true; 836 for_each_online_cpu(cpu) { 837 cpufreq_get_policy(&cpu_policy, cpu); 838 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index()); 839 } 840 841 return NOTIFY_DONE; 842 } 843 844 static struct notifier_block powernv_cpufreq_reboot_nb = { 845 .notifier_call = powernv_cpufreq_reboot_notifier, 846 }; 847 848 void powernv_cpufreq_work_fn(struct work_struct *work) 849 { 850 struct chip *chip = container_of(work, struct chip, throttle); 851 unsigned int cpu; 852 cpumask_t mask; 853 854 get_online_cpus(); 855 cpumask_and(&mask, &chip->mask, cpu_online_mask); 856 smp_call_function_any(&mask, 857 powernv_cpufreq_throttle_check, NULL, 0); 858 859 if (!chip->restore) 860 goto out; 861 862 chip->restore = false; 863 for_each_cpu(cpu, &mask) { 864 int index; 865 struct cpufreq_policy policy; 866 867 cpufreq_get_policy(&policy, cpu); 868 index = cpufreq_table_find_index_c(&policy, policy.cur); 869 powernv_cpufreq_target_index(&policy, index); 870 cpumask_andnot(&mask, &mask, policy.cpus); 871 } 872 out: 873 put_online_cpus(); 874 } 875 876 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 877 unsigned long msg_type, void *_msg) 878 { 879 struct opal_msg *msg = _msg; 880 struct opal_occ_msg omsg; 881 int i; 882 883 if (msg_type != OPAL_MSG_OCC) 884 return 0; 885 886 omsg.type = be64_to_cpu(msg->params[0]); 887 888 switch (omsg.type) { 889 case OCC_RESET: 890 occ_reset = true; 891 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 892 /* 893 * powernv_cpufreq_throttle_check() is called in 894 * target() callback which can detect the throttle state 895 * for governors like ondemand. 896 * But static governors will not call target() often thus 897 * report throttling here. 898 */ 899 if (!throttled) { 900 throttled = true; 901 pr_warn("CPU frequency is throttled for duration\n"); 902 } 903 904 break; 905 case OCC_LOAD: 906 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 907 break; 908 case OCC_THROTTLE: 909 omsg.chip = be64_to_cpu(msg->params[1]); 910 omsg.throttle_status = be64_to_cpu(msg->params[2]); 911 912 if (occ_reset) { 913 occ_reset = false; 914 throttled = false; 915 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 916 917 for (i = 0; i < nr_chips; i++) { 918 chips[i].restore = true; 919 schedule_work(&chips[i].throttle); 920 } 921 922 return 0; 923 } 924 925 for (i = 0; i < nr_chips; i++) 926 if (chips[i].id == omsg.chip) 927 break; 928 929 if (omsg.throttle_status >= 0 && 930 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 931 chips[i].throttle_reason = omsg.throttle_status; 932 chips[i].reason[omsg.throttle_status]++; 933 } 934 935 if (!omsg.throttle_status) 936 chips[i].restore = true; 937 938 schedule_work(&chips[i].throttle); 939 } 940 return 0; 941 } 942 943 static struct notifier_block powernv_cpufreq_opal_nb = { 944 .notifier_call = powernv_cpufreq_occ_msg, 945 .next = NULL, 946 .priority = 0, 947 }; 948 949 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy) 950 { 951 struct powernv_smp_call_data freq_data; 952 struct global_pstate_info *gpstates = policy->driver_data; 953 954 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 955 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 956 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 957 del_timer_sync(&gpstates->timer); 958 } 959 960 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy, 961 unsigned int target_freq) 962 { 963 int index; 964 struct powernv_smp_call_data freq_data; 965 966 index = cpufreq_table_find_index_dl(policy, target_freq); 967 freq_data.pstate_id = powernv_freqs[index].driver_data; 968 freq_data.gpstate_id = powernv_freqs[index].driver_data; 969 set_pstate(&freq_data); 970 971 return powernv_freqs[index].frequency; 972 } 973 974 static struct cpufreq_driver powernv_cpufreq_driver = { 975 .name = "powernv-cpufreq", 976 .flags = CPUFREQ_CONST_LOOPS, 977 .init = powernv_cpufreq_cpu_init, 978 .exit = powernv_cpufreq_cpu_exit, 979 .verify = cpufreq_generic_frequency_table_verify, 980 .target_index = powernv_cpufreq_target_index, 981 .fast_switch = powernv_fast_switch, 982 .get = powernv_cpufreq_get, 983 .stop_cpu = powernv_cpufreq_stop_cpu, 984 .attr = powernv_cpu_freq_attr, 985 }; 986 987 static int init_chip_info(void) 988 { 989 unsigned int chip[256]; 990 unsigned int cpu, i; 991 unsigned int prev_chip_id = UINT_MAX; 992 993 for_each_possible_cpu(cpu) { 994 unsigned int id = cpu_to_chip_id(cpu); 995 996 if (prev_chip_id != id) { 997 prev_chip_id = id; 998 chip[nr_chips++] = id; 999 } 1000 } 1001 1002 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 1003 if (!chips) 1004 return -ENOMEM; 1005 1006 for (i = 0; i < nr_chips; i++) { 1007 chips[i].id = chip[i]; 1008 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i])); 1009 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 1010 for_each_cpu(cpu, &chips[i].mask) 1011 per_cpu(chip_info, cpu) = &chips[i]; 1012 } 1013 1014 return 0; 1015 } 1016 1017 static inline void clean_chip_info(void) 1018 { 1019 kfree(chips); 1020 } 1021 1022 static inline void unregister_all_notifiers(void) 1023 { 1024 opal_message_notifier_unregister(OPAL_MSG_OCC, 1025 &powernv_cpufreq_opal_nb); 1026 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 1027 } 1028 1029 static int __init powernv_cpufreq_init(void) 1030 { 1031 int rc = 0; 1032 1033 /* Don't probe on pseries (guest) platforms */ 1034 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1035 return -ENODEV; 1036 1037 /* Discover pstates from device tree and init */ 1038 rc = init_powernv_pstates(); 1039 if (rc) 1040 goto out; 1041 1042 /* Populate chip info */ 1043 rc = init_chip_info(); 1044 if (rc) 1045 goto out; 1046 1047 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 1048 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 1049 1050 if (powernv_pstate_info.wof_enabled) 1051 powernv_cpufreq_driver.boost_enabled = true; 1052 else 1053 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL; 1054 1055 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 1056 if (rc) { 1057 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 1058 goto cleanup_notifiers; 1059 } 1060 1061 if (powernv_pstate_info.wof_enabled) 1062 cpufreq_enable_boost_support(); 1063 1064 return 0; 1065 cleanup_notifiers: 1066 unregister_all_notifiers(); 1067 clean_chip_info(); 1068 out: 1069 pr_info("Platform driver disabled. System does not support PState control\n"); 1070 return rc; 1071 } 1072 module_init(powernv_cpufreq_init); 1073 1074 static void __exit powernv_cpufreq_exit(void) 1075 { 1076 cpufreq_unregister_driver(&powernv_cpufreq_driver); 1077 unregister_all_notifiers(); 1078 clean_chip_info(); 1079 } 1080 module_exit(powernv_cpufreq_exit); 1081 1082 MODULE_LICENSE("GPL"); 1083 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 1084