1 /* 2 * POWERNV cpufreq driver for the IBM POWER processors 3 * 4 * (C) Copyright IBM 2014 5 * 6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 */ 19 20 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 21 22 #include <linux/kernel.h> 23 #include <linux/sysfs.h> 24 #include <linux/cpumask.h> 25 #include <linux/module.h> 26 #include <linux/cpufreq.h> 27 #include <linux/smp.h> 28 #include <linux/of.h> 29 #include <linux/reboot.h> 30 #include <linux/slab.h> 31 #include <linux/cpu.h> 32 #include <linux/hashtable.h> 33 #include <trace/events/power.h> 34 35 #include <asm/cputhreads.h> 36 #include <asm/firmware.h> 37 #include <asm/reg.h> 38 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 39 #include <asm/opal.h> 40 #include <linux/timer.h> 41 42 #define POWERNV_MAX_PSTATES_ORDER 8 43 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER)) 44 #define PMSR_PSAFE_ENABLE (1UL << 30) 45 #define PMSR_SPR_EM_DISABLE (1UL << 31) 46 #define MAX_PSTATE_SHIFT 32 47 #define LPSTATE_SHIFT 48 48 #define GPSTATE_SHIFT 56 49 50 #define MAX_RAMP_DOWN_TIME 5120 51 /* 52 * On an idle system we want the global pstate to ramp-down from max value to 53 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 54 * then ramp-down rapidly later on. 55 * 56 * This gives a percentage rampdown for time elapsed in milliseconds. 57 * ramp_down_percentage = ((ms * ms) >> 18) 58 * ~= 3.8 * (sec * sec) 59 * 60 * At 0 ms ramp_down_percent = 0 61 * At 5120 ms ramp_down_percent = 100 62 */ 63 #define ramp_down_percent(time) ((time * time) >> 18) 64 65 /* Interval after which the timer is queued to bring down global pstate */ 66 #define GPSTATE_TIMER_INTERVAL 2000 67 68 /** 69 * struct global_pstate_info - Per policy data structure to maintain history of 70 * global pstates 71 * @highest_lpstate_idx: The local pstate index from which we are 72 * ramping down 73 * @elapsed_time: Time in ms spent in ramping down from 74 * highest_lpstate_idx 75 * @last_sampled_time: Time from boot in ms when global pstates were 76 * last set 77 * @last_lpstate_idx, Last set value of local pstate and global 78 * last_gpstate_idx pstate in terms of cpufreq table index 79 * @timer: Is used for ramping down if cpu goes idle for 80 * a long time with global pstate held high 81 * @gpstate_lock: A spinlock to maintain synchronization between 82 * routines called by the timer handler and 83 * governer's target_index calls 84 */ 85 struct global_pstate_info { 86 int highest_lpstate_idx; 87 unsigned int elapsed_time; 88 unsigned int last_sampled_time; 89 int last_lpstate_idx; 90 int last_gpstate_idx; 91 spinlock_t gpstate_lock; 92 struct timer_list timer; 93 struct cpufreq_policy *policy; 94 }; 95 96 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 97 98 DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER); 99 /** 100 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap 101 * indexed by a function of pstate id. 102 * 103 * @pstate_id: pstate id for this entry. 104 * 105 * @cpufreq_table_idx: Index into the powernv_freqs 106 * cpufreq_frequency_table for frequency 107 * corresponding to pstate_id. 108 * 109 * @hentry: hlist_node that hooks this entry into the pstate_revmap 110 * hashtable 111 */ 112 struct pstate_idx_revmap_data { 113 u8 pstate_id; 114 unsigned int cpufreq_table_idx; 115 struct hlist_node hentry; 116 }; 117 118 static bool rebooting, throttled, occ_reset; 119 120 static const char * const throttle_reason[] = { 121 "No throttling", 122 "Power Cap", 123 "Processor Over Temperature", 124 "Power Supply Failure", 125 "Over Current", 126 "OCC Reset" 127 }; 128 129 enum throttle_reason_type { 130 NO_THROTTLE = 0, 131 POWERCAP, 132 CPU_OVERTEMP, 133 POWER_SUPPLY_FAILURE, 134 OVERCURRENT, 135 OCC_RESET_THROTTLE, 136 OCC_MAX_REASON 137 }; 138 139 static struct chip { 140 unsigned int id; 141 bool throttled; 142 bool restore; 143 u8 throttle_reason; 144 cpumask_t mask; 145 struct work_struct throttle; 146 int throttle_turbo; 147 int throttle_sub_turbo; 148 int reason[OCC_MAX_REASON]; 149 } *chips; 150 151 static int nr_chips; 152 static DEFINE_PER_CPU(struct chip *, chip_info); 153 154 /* 155 * Note: 156 * The set of pstates consists of contiguous integers. 157 * powernv_pstate_info stores the index of the frequency table for 158 * max, min and nominal frequencies. It also stores number of 159 * available frequencies. 160 * 161 * powernv_pstate_info.nominal indicates the index to the highest 162 * non-turbo frequency. 163 */ 164 static struct powernv_pstate_info { 165 unsigned int min; 166 unsigned int max; 167 unsigned int nominal; 168 unsigned int nr_pstates; 169 bool wof_enabled; 170 } powernv_pstate_info; 171 172 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift) 173 { 174 return ((pmsr_val >> shift) & 0xFF); 175 } 176 177 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT) 178 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT) 179 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT) 180 181 /* Use following functions for conversions between pstate_id and index */ 182 183 /** 184 * idx_to_pstate : Returns the pstate id corresponding to the 185 * frequency in the cpufreq frequency table 186 * powernv_freqs indexed by @i. 187 * 188 * If @i is out of bound, this will return the pstate 189 * corresponding to the nominal frequency. 190 */ 191 static inline u8 idx_to_pstate(unsigned int i) 192 { 193 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 194 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i); 195 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 196 } 197 198 return powernv_freqs[i].driver_data; 199 } 200 201 /** 202 * pstate_to_idx : Returns the index in the cpufreq frequencytable 203 * powernv_freqs for the frequency whose corresponding 204 * pstate id is @pstate. 205 * 206 * If no frequency corresponding to @pstate is found, 207 * this will return the index of the nominal 208 * frequency. 209 */ 210 static unsigned int pstate_to_idx(u8 pstate) 211 { 212 unsigned int key = pstate % POWERNV_MAX_PSTATES; 213 struct pstate_idx_revmap_data *revmap_data; 214 215 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) { 216 if (revmap_data->pstate_id == pstate) 217 return revmap_data->cpufreq_table_idx; 218 } 219 220 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate); 221 return powernv_pstate_info.nominal; 222 } 223 224 static inline void reset_gpstates(struct cpufreq_policy *policy) 225 { 226 struct global_pstate_info *gpstates = policy->driver_data; 227 228 gpstates->highest_lpstate_idx = 0; 229 gpstates->elapsed_time = 0; 230 gpstates->last_sampled_time = 0; 231 gpstates->last_lpstate_idx = 0; 232 gpstates->last_gpstate_idx = 0; 233 } 234 235 /* 236 * Initialize the freq table based on data obtained 237 * from the firmware passed via device-tree 238 */ 239 static int init_powernv_pstates(void) 240 { 241 struct device_node *power_mgt; 242 int i, nr_pstates = 0; 243 const __be32 *pstate_ids, *pstate_freqs; 244 u32 len_ids, len_freqs; 245 u32 pstate_min, pstate_max, pstate_nominal; 246 u32 pstate_turbo, pstate_ultra_turbo; 247 int rc = -ENODEV; 248 249 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 250 if (!power_mgt) { 251 pr_warn("power-mgt node not found\n"); 252 return -ENODEV; 253 } 254 255 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 256 pr_warn("ibm,pstate-min node not found\n"); 257 goto out; 258 } 259 260 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 261 pr_warn("ibm,pstate-max node not found\n"); 262 goto out; 263 } 264 265 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 266 &pstate_nominal)) { 267 pr_warn("ibm,pstate-nominal not found\n"); 268 goto out; 269 } 270 271 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo", 272 &pstate_ultra_turbo)) { 273 powernv_pstate_info.wof_enabled = false; 274 goto next; 275 } 276 277 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo", 278 &pstate_turbo)) { 279 powernv_pstate_info.wof_enabled = false; 280 goto next; 281 } 282 283 if (pstate_turbo == pstate_ultra_turbo) 284 powernv_pstate_info.wof_enabled = false; 285 else 286 powernv_pstate_info.wof_enabled = true; 287 288 next: 289 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min, 290 pstate_nominal, pstate_max); 291 pr_info("Workload Optimized Frequency is %s in the platform\n", 292 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled"); 293 294 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 295 if (!pstate_ids) { 296 pr_warn("ibm,pstate-ids not found\n"); 297 goto out; 298 } 299 300 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 301 &len_freqs); 302 if (!pstate_freqs) { 303 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 304 goto out; 305 } 306 307 if (len_ids != len_freqs) { 308 pr_warn("Entries in ibm,pstate-ids and " 309 "ibm,pstate-frequencies-mhz does not match\n"); 310 } 311 312 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 313 if (!nr_pstates) { 314 pr_warn("No PStates found\n"); 315 goto out; 316 } 317 318 powernv_pstate_info.nr_pstates = nr_pstates; 319 pr_debug("NR PStates %d\n", nr_pstates); 320 321 for (i = 0; i < nr_pstates; i++) { 322 u32 id = be32_to_cpu(pstate_ids[i]); 323 u32 freq = be32_to_cpu(pstate_freqs[i]); 324 struct pstate_idx_revmap_data *revmap_data; 325 unsigned int key; 326 327 pr_debug("PState id %d freq %d MHz\n", id, freq); 328 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 329 powernv_freqs[i].driver_data = id & 0xFF; 330 331 revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL); 332 if (!revmap_data) { 333 rc = -ENOMEM; 334 goto out; 335 } 336 337 revmap_data->pstate_id = id & 0xFF; 338 revmap_data->cpufreq_table_idx = i; 339 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES; 340 hash_add(pstate_revmap, &revmap_data->hentry, key); 341 342 if (id == pstate_max) 343 powernv_pstate_info.max = i; 344 if (id == pstate_nominal) 345 powernv_pstate_info.nominal = i; 346 if (id == pstate_min) 347 powernv_pstate_info.min = i; 348 349 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) { 350 int j; 351 352 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--) 353 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ; 354 } 355 } 356 357 /* End of list marker entry */ 358 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 359 360 of_node_put(power_mgt); 361 return 0; 362 out: 363 of_node_put(power_mgt); 364 return rc; 365 } 366 367 /* Returns the CPU frequency corresponding to the pstate_id. */ 368 static unsigned int pstate_id_to_freq(u8 pstate_id) 369 { 370 int i; 371 372 i = pstate_to_idx(pstate_id); 373 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 374 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n", 375 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 376 i = powernv_pstate_info.nominal; 377 } 378 379 return powernv_freqs[i].frequency; 380 } 381 382 /* 383 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 384 * the firmware 385 */ 386 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 387 char *buf) 388 { 389 return sprintf(buf, "%u\n", 390 powernv_freqs[powernv_pstate_info.nominal].frequency); 391 } 392 393 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 394 __ATTR_RO(cpuinfo_nominal_freq); 395 396 #define SCALING_BOOST_FREQS_ATTR_INDEX 2 397 398 static struct freq_attr *powernv_cpu_freq_attr[] = { 399 &cpufreq_freq_attr_scaling_available_freqs, 400 &cpufreq_freq_attr_cpuinfo_nominal_freq, 401 &cpufreq_freq_attr_scaling_boost_freqs, 402 NULL, 403 }; 404 405 #define throttle_attr(name, member) \ 406 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 407 { \ 408 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 409 \ 410 return sprintf(buf, "%u\n", chip->member); \ 411 } \ 412 \ 413 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 414 415 throttle_attr(unthrottle, reason[NO_THROTTLE]); 416 throttle_attr(powercap, reason[POWERCAP]); 417 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 418 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 419 throttle_attr(overcurrent, reason[OVERCURRENT]); 420 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 421 throttle_attr(turbo_stat, throttle_turbo); 422 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 423 424 static struct attribute *throttle_attrs[] = { 425 &throttle_attr_unthrottle.attr, 426 &throttle_attr_powercap.attr, 427 &throttle_attr_overtemp.attr, 428 &throttle_attr_supply_fault.attr, 429 &throttle_attr_overcurrent.attr, 430 &throttle_attr_occ_reset.attr, 431 &throttle_attr_turbo_stat.attr, 432 &throttle_attr_sub_turbo_stat.attr, 433 NULL, 434 }; 435 436 static const struct attribute_group throttle_attr_grp = { 437 .name = "throttle_stats", 438 .attrs = throttle_attrs, 439 }; 440 441 /* Helper routines */ 442 443 /* Access helpers to power mgt SPR */ 444 445 static inline unsigned long get_pmspr(unsigned long sprn) 446 { 447 switch (sprn) { 448 case SPRN_PMCR: 449 return mfspr(SPRN_PMCR); 450 451 case SPRN_PMICR: 452 return mfspr(SPRN_PMICR); 453 454 case SPRN_PMSR: 455 return mfspr(SPRN_PMSR); 456 } 457 BUG(); 458 } 459 460 static inline void set_pmspr(unsigned long sprn, unsigned long val) 461 { 462 switch (sprn) { 463 case SPRN_PMCR: 464 mtspr(SPRN_PMCR, val); 465 return; 466 467 case SPRN_PMICR: 468 mtspr(SPRN_PMICR, val); 469 return; 470 } 471 BUG(); 472 } 473 474 /* 475 * Use objects of this type to query/update 476 * pstates on a remote CPU via smp_call_function. 477 */ 478 struct powernv_smp_call_data { 479 unsigned int freq; 480 u8 pstate_id; 481 u8 gpstate_id; 482 }; 483 484 /* 485 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 486 * 487 * Called via smp_call_function. 488 * 489 * Note: The caller of the smp_call_function should pass an argument of 490 * the type 'struct powernv_smp_call_data *' along with this function. 491 * 492 * The current frequency on this CPU will be returned via 493 * ((struct powernv_smp_call_data *)arg)->freq; 494 */ 495 static void powernv_read_cpu_freq(void *arg) 496 { 497 unsigned long pmspr_val; 498 struct powernv_smp_call_data *freq_data = arg; 499 500 pmspr_val = get_pmspr(SPRN_PMSR); 501 freq_data->pstate_id = extract_local_pstate(pmspr_val); 502 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 503 504 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n", 505 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 506 freq_data->freq); 507 } 508 509 /* 510 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 511 * firmware for CPU 'cpu'. This value is reported through the sysfs 512 * file cpuinfo_cur_freq. 513 */ 514 static unsigned int powernv_cpufreq_get(unsigned int cpu) 515 { 516 struct powernv_smp_call_data freq_data; 517 518 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 519 &freq_data, 1); 520 521 return freq_data.freq; 522 } 523 524 /* 525 * set_pstate: Sets the pstate on this CPU. 526 * 527 * This is called via an smp_call_function. 528 * 529 * The caller must ensure that freq_data is of the type 530 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 531 * on this CPU should be present in freq_data->pstate_id. 532 */ 533 static void set_pstate(void *data) 534 { 535 unsigned long val; 536 struct powernv_smp_call_data *freq_data = data; 537 unsigned long pstate_ul = freq_data->pstate_id; 538 unsigned long gpstate_ul = freq_data->gpstate_id; 539 540 val = get_pmspr(SPRN_PMCR); 541 val = val & 0x0000FFFFFFFFFFFFULL; 542 543 pstate_ul = pstate_ul & 0xFF; 544 gpstate_ul = gpstate_ul & 0xFF; 545 546 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 547 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 548 549 pr_debug("Setting cpu %d pmcr to %016lX\n", 550 raw_smp_processor_id(), val); 551 set_pmspr(SPRN_PMCR, val); 552 } 553 554 /* 555 * get_nominal_index: Returns the index corresponding to the nominal 556 * pstate in the cpufreq table 557 */ 558 static inline unsigned int get_nominal_index(void) 559 { 560 return powernv_pstate_info.nominal; 561 } 562 563 static void powernv_cpufreq_throttle_check(void *data) 564 { 565 struct chip *chip; 566 unsigned int cpu = smp_processor_id(); 567 unsigned long pmsr; 568 u8 pmsr_pmax; 569 unsigned int pmsr_pmax_idx; 570 571 pmsr = get_pmspr(SPRN_PMSR); 572 chip = this_cpu_read(chip_info); 573 574 /* Check for Pmax Capping */ 575 pmsr_pmax = extract_max_pstate(pmsr); 576 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 577 if (pmsr_pmax_idx != powernv_pstate_info.max) { 578 if (chip->throttled) 579 goto next; 580 chip->throttled = true; 581 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 582 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n", 583 cpu, chip->id, pmsr_pmax, 584 idx_to_pstate(powernv_pstate_info.nominal)); 585 chip->throttle_sub_turbo++; 586 } else { 587 chip->throttle_turbo++; 588 } 589 trace_powernv_throttle(chip->id, 590 throttle_reason[chip->throttle_reason], 591 pmsr_pmax); 592 } else if (chip->throttled) { 593 chip->throttled = false; 594 trace_powernv_throttle(chip->id, 595 throttle_reason[chip->throttle_reason], 596 pmsr_pmax); 597 } 598 599 /* Check if Psafe_mode_active is set in PMSR. */ 600 next: 601 if (pmsr & PMSR_PSAFE_ENABLE) { 602 throttled = true; 603 pr_info("Pstate set to safe frequency\n"); 604 } 605 606 /* Check if SPR_EM_DISABLE is set in PMSR */ 607 if (pmsr & PMSR_SPR_EM_DISABLE) { 608 throttled = true; 609 pr_info("Frequency Control disabled from OS\n"); 610 } 611 612 if (throttled) { 613 pr_info("PMSR = %16lx\n", pmsr); 614 pr_warn("CPU Frequency could be throttled\n"); 615 } 616 } 617 618 /** 619 * calc_global_pstate - Calculate global pstate 620 * @elapsed_time: Elapsed time in milliseconds 621 * @local_pstate_idx: New local pstate 622 * @highest_lpstate_idx: pstate from which its ramping down 623 * 624 * Finds the appropriate global pstate based on the pstate from which its 625 * ramping down and the time elapsed in ramping down. It follows a quadratic 626 * equation which ensures that it reaches ramping down to pmin in 5sec. 627 */ 628 static inline int calc_global_pstate(unsigned int elapsed_time, 629 int highest_lpstate_idx, 630 int local_pstate_idx) 631 { 632 int index_diff; 633 634 /* 635 * Using ramp_down_percent we get the percentage of rampdown 636 * that we are expecting to be dropping. Difference between 637 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 638 * number of how many pstates we will drop eventually by the end of 639 * 5 seconds, then just scale it get the number pstates to be dropped. 640 */ 641 index_diff = ((int)ramp_down_percent(elapsed_time) * 642 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 643 644 /* Ensure that global pstate is >= to local pstate */ 645 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 646 return local_pstate_idx; 647 else 648 return highest_lpstate_idx + index_diff; 649 } 650 651 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 652 { 653 unsigned int timer_interval; 654 655 /* 656 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 657 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 658 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 659 * seconds of ramp down time. 660 */ 661 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 662 > MAX_RAMP_DOWN_TIME) 663 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 664 else 665 timer_interval = GPSTATE_TIMER_INTERVAL; 666 667 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 668 } 669 670 /** 671 * gpstate_timer_handler 672 * 673 * @data: pointer to cpufreq_policy on which timer was queued 674 * 675 * This handler brings down the global pstate closer to the local pstate 676 * according quadratic equation. Queues a new timer if it is still not equal 677 * to local pstate 678 */ 679 void gpstate_timer_handler(struct timer_list *t) 680 { 681 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer); 682 struct cpufreq_policy *policy = gpstates->policy; 683 int gpstate_idx, lpstate_idx; 684 unsigned long val; 685 unsigned int time_diff = jiffies_to_msecs(jiffies) 686 - gpstates->last_sampled_time; 687 struct powernv_smp_call_data freq_data; 688 689 if (!spin_trylock(&gpstates->gpstate_lock)) 690 return; 691 /* 692 * If the timer has migrated to the different cpu then bring 693 * it back to one of the policy->cpus 694 */ 695 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) { 696 gpstates->timer.expires = jiffies + msecs_to_jiffies(1); 697 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus)); 698 spin_unlock(&gpstates->gpstate_lock); 699 return; 700 } 701 702 /* 703 * If PMCR was last updated was using fast_swtich then 704 * We may have wrong in gpstate->last_lpstate_idx 705 * value. Hence, read from PMCR to get correct data. 706 */ 707 val = get_pmspr(SPRN_PMCR); 708 freq_data.gpstate_id = extract_global_pstate(val); 709 freq_data.pstate_id = extract_local_pstate(val); 710 if (freq_data.gpstate_id == freq_data.pstate_id) { 711 reset_gpstates(policy); 712 spin_unlock(&gpstates->gpstate_lock); 713 return; 714 } 715 716 gpstates->last_sampled_time += time_diff; 717 gpstates->elapsed_time += time_diff; 718 719 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 720 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 721 lpstate_idx = gpstate_idx; 722 reset_gpstates(policy); 723 gpstates->highest_lpstate_idx = gpstate_idx; 724 } else { 725 lpstate_idx = pstate_to_idx(freq_data.pstate_id); 726 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 727 gpstates->highest_lpstate_idx, 728 lpstate_idx); 729 } 730 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 731 gpstates->last_gpstate_idx = gpstate_idx; 732 gpstates->last_lpstate_idx = lpstate_idx; 733 /* 734 * If local pstate is equal to global pstate, rampdown is over 735 * So timer is not required to be queued. 736 */ 737 if (gpstate_idx != gpstates->last_lpstate_idx) 738 queue_gpstate_timer(gpstates); 739 740 set_pstate(&freq_data); 741 spin_unlock(&gpstates->gpstate_lock); 742 } 743 744 /* 745 * powernv_cpufreq_target_index: Sets the frequency corresponding to 746 * the cpufreq table entry indexed by new_index on the cpus in the 747 * mask policy->cpus 748 */ 749 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 750 unsigned int new_index) 751 { 752 struct powernv_smp_call_data freq_data; 753 unsigned int cur_msec, gpstate_idx; 754 struct global_pstate_info *gpstates = policy->driver_data; 755 756 if (unlikely(rebooting) && new_index != get_nominal_index()) 757 return 0; 758 759 if (!throttled) { 760 /* we don't want to be preempted while 761 * checking if the CPU frequency has been throttled 762 */ 763 preempt_disable(); 764 powernv_cpufreq_throttle_check(NULL); 765 preempt_enable(); 766 } 767 768 cur_msec = jiffies_to_msecs(get_jiffies_64()); 769 770 freq_data.pstate_id = idx_to_pstate(new_index); 771 if (!gpstates) { 772 freq_data.gpstate_id = freq_data.pstate_id; 773 goto no_gpstate; 774 } 775 776 spin_lock(&gpstates->gpstate_lock); 777 778 if (!gpstates->last_sampled_time) { 779 gpstate_idx = new_index; 780 gpstates->highest_lpstate_idx = new_index; 781 goto gpstates_done; 782 } 783 784 if (gpstates->last_gpstate_idx < new_index) { 785 gpstates->elapsed_time += cur_msec - 786 gpstates->last_sampled_time; 787 788 /* 789 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 790 * we should be resetting all global pstate related data. Set it 791 * equal to local pstate to start fresh. 792 */ 793 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 794 reset_gpstates(policy); 795 gpstates->highest_lpstate_idx = new_index; 796 gpstate_idx = new_index; 797 } else { 798 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 799 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 800 gpstates->highest_lpstate_idx, 801 new_index); 802 } 803 } else { 804 reset_gpstates(policy); 805 gpstates->highest_lpstate_idx = new_index; 806 gpstate_idx = new_index; 807 } 808 809 /* 810 * If local pstate is equal to global pstate, rampdown is over 811 * So timer is not required to be queued. 812 */ 813 if (gpstate_idx != new_index) 814 queue_gpstate_timer(gpstates); 815 else 816 del_timer_sync(&gpstates->timer); 817 818 gpstates_done: 819 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 820 gpstates->last_sampled_time = cur_msec; 821 gpstates->last_gpstate_idx = gpstate_idx; 822 gpstates->last_lpstate_idx = new_index; 823 824 spin_unlock(&gpstates->gpstate_lock); 825 826 no_gpstate: 827 /* 828 * Use smp_call_function to send IPI and execute the 829 * mtspr on target CPU. We could do that without IPI 830 * if current CPU is within policy->cpus (core) 831 */ 832 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 833 return 0; 834 } 835 836 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 837 { 838 int base, i; 839 struct kernfs_node *kn; 840 struct global_pstate_info *gpstates; 841 842 base = cpu_first_thread_sibling(policy->cpu); 843 844 for (i = 0; i < threads_per_core; i++) 845 cpumask_set_cpu(base + i, policy->cpus); 846 847 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 848 if (!kn) { 849 int ret; 850 851 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 852 if (ret) { 853 pr_info("Failed to create throttle stats directory for cpu %d\n", 854 policy->cpu); 855 return ret; 856 } 857 } else { 858 kernfs_put(kn); 859 } 860 861 policy->freq_table = powernv_freqs; 862 policy->fast_switch_possible = true; 863 864 if (pvr_version_is(PVR_POWER9)) 865 return 0; 866 867 /* Initialise Gpstate ramp-down timer only on POWER8 */ 868 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 869 if (!gpstates) 870 return -ENOMEM; 871 872 policy->driver_data = gpstates; 873 874 /* initialize timer */ 875 gpstates->policy = policy; 876 timer_setup(&gpstates->timer, gpstate_timer_handler, 877 TIMER_PINNED | TIMER_DEFERRABLE); 878 gpstates->timer.expires = jiffies + 879 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 880 spin_lock_init(&gpstates->gpstate_lock); 881 882 return 0; 883 } 884 885 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 886 { 887 /* timer is deleted in cpufreq_cpu_stop() */ 888 kfree(policy->driver_data); 889 890 return 0; 891 } 892 893 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 894 unsigned long action, void *unused) 895 { 896 int cpu; 897 struct cpufreq_policy cpu_policy; 898 899 rebooting = true; 900 for_each_online_cpu(cpu) { 901 cpufreq_get_policy(&cpu_policy, cpu); 902 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index()); 903 } 904 905 return NOTIFY_DONE; 906 } 907 908 static struct notifier_block powernv_cpufreq_reboot_nb = { 909 .notifier_call = powernv_cpufreq_reboot_notifier, 910 }; 911 912 void powernv_cpufreq_work_fn(struct work_struct *work) 913 { 914 struct chip *chip = container_of(work, struct chip, throttle); 915 unsigned int cpu; 916 cpumask_t mask; 917 918 get_online_cpus(); 919 cpumask_and(&mask, &chip->mask, cpu_online_mask); 920 smp_call_function_any(&mask, 921 powernv_cpufreq_throttle_check, NULL, 0); 922 923 if (!chip->restore) 924 goto out; 925 926 chip->restore = false; 927 for_each_cpu(cpu, &mask) { 928 int index; 929 struct cpufreq_policy policy; 930 931 cpufreq_get_policy(&policy, cpu); 932 index = cpufreq_table_find_index_c(&policy, policy.cur); 933 powernv_cpufreq_target_index(&policy, index); 934 cpumask_andnot(&mask, &mask, policy.cpus); 935 } 936 out: 937 put_online_cpus(); 938 } 939 940 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 941 unsigned long msg_type, void *_msg) 942 { 943 struct opal_msg *msg = _msg; 944 struct opal_occ_msg omsg; 945 int i; 946 947 if (msg_type != OPAL_MSG_OCC) 948 return 0; 949 950 omsg.type = be64_to_cpu(msg->params[0]); 951 952 switch (omsg.type) { 953 case OCC_RESET: 954 occ_reset = true; 955 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 956 /* 957 * powernv_cpufreq_throttle_check() is called in 958 * target() callback which can detect the throttle state 959 * for governors like ondemand. 960 * But static governors will not call target() often thus 961 * report throttling here. 962 */ 963 if (!throttled) { 964 throttled = true; 965 pr_warn("CPU frequency is throttled for duration\n"); 966 } 967 968 break; 969 case OCC_LOAD: 970 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 971 break; 972 case OCC_THROTTLE: 973 omsg.chip = be64_to_cpu(msg->params[1]); 974 omsg.throttle_status = be64_to_cpu(msg->params[2]); 975 976 if (occ_reset) { 977 occ_reset = false; 978 throttled = false; 979 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 980 981 for (i = 0; i < nr_chips; i++) { 982 chips[i].restore = true; 983 schedule_work(&chips[i].throttle); 984 } 985 986 return 0; 987 } 988 989 for (i = 0; i < nr_chips; i++) 990 if (chips[i].id == omsg.chip) 991 break; 992 993 if (omsg.throttle_status >= 0 && 994 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 995 chips[i].throttle_reason = omsg.throttle_status; 996 chips[i].reason[omsg.throttle_status]++; 997 } 998 999 if (!omsg.throttle_status) 1000 chips[i].restore = true; 1001 1002 schedule_work(&chips[i].throttle); 1003 } 1004 return 0; 1005 } 1006 1007 static struct notifier_block powernv_cpufreq_opal_nb = { 1008 .notifier_call = powernv_cpufreq_occ_msg, 1009 .next = NULL, 1010 .priority = 0, 1011 }; 1012 1013 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy) 1014 { 1015 struct powernv_smp_call_data freq_data; 1016 struct global_pstate_info *gpstates = policy->driver_data; 1017 1018 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 1019 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 1020 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 1021 if (gpstates) 1022 del_timer_sync(&gpstates->timer); 1023 } 1024 1025 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy, 1026 unsigned int target_freq) 1027 { 1028 int index; 1029 struct powernv_smp_call_data freq_data; 1030 1031 index = cpufreq_table_find_index_dl(policy, target_freq); 1032 freq_data.pstate_id = powernv_freqs[index].driver_data; 1033 freq_data.gpstate_id = powernv_freqs[index].driver_data; 1034 set_pstate(&freq_data); 1035 1036 return powernv_freqs[index].frequency; 1037 } 1038 1039 static struct cpufreq_driver powernv_cpufreq_driver = { 1040 .name = "powernv-cpufreq", 1041 .flags = CPUFREQ_CONST_LOOPS, 1042 .init = powernv_cpufreq_cpu_init, 1043 .exit = powernv_cpufreq_cpu_exit, 1044 .verify = cpufreq_generic_frequency_table_verify, 1045 .target_index = powernv_cpufreq_target_index, 1046 .fast_switch = powernv_fast_switch, 1047 .get = powernv_cpufreq_get, 1048 .stop_cpu = powernv_cpufreq_stop_cpu, 1049 .attr = powernv_cpu_freq_attr, 1050 }; 1051 1052 static int init_chip_info(void) 1053 { 1054 unsigned int chip[256]; 1055 unsigned int cpu, i; 1056 unsigned int prev_chip_id = UINT_MAX; 1057 1058 for_each_possible_cpu(cpu) { 1059 unsigned int id = cpu_to_chip_id(cpu); 1060 1061 if (prev_chip_id != id) { 1062 prev_chip_id = id; 1063 chip[nr_chips++] = id; 1064 } 1065 } 1066 1067 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 1068 if (!chips) 1069 return -ENOMEM; 1070 1071 for (i = 0; i < nr_chips; i++) { 1072 chips[i].id = chip[i]; 1073 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i])); 1074 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 1075 for_each_cpu(cpu, &chips[i].mask) 1076 per_cpu(chip_info, cpu) = &chips[i]; 1077 } 1078 1079 return 0; 1080 } 1081 1082 static inline void clean_chip_info(void) 1083 { 1084 kfree(chips); 1085 } 1086 1087 static inline void unregister_all_notifiers(void) 1088 { 1089 opal_message_notifier_unregister(OPAL_MSG_OCC, 1090 &powernv_cpufreq_opal_nb); 1091 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 1092 } 1093 1094 static int __init powernv_cpufreq_init(void) 1095 { 1096 int rc = 0; 1097 1098 /* Don't probe on pseries (guest) platforms */ 1099 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1100 return -ENODEV; 1101 1102 /* Discover pstates from device tree and init */ 1103 rc = init_powernv_pstates(); 1104 if (rc) 1105 goto out; 1106 1107 /* Populate chip info */ 1108 rc = init_chip_info(); 1109 if (rc) 1110 goto out; 1111 1112 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 1113 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 1114 1115 if (powernv_pstate_info.wof_enabled) 1116 powernv_cpufreq_driver.boost_enabled = true; 1117 else 1118 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL; 1119 1120 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 1121 if (rc) { 1122 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 1123 goto cleanup_notifiers; 1124 } 1125 1126 if (powernv_pstate_info.wof_enabled) 1127 cpufreq_enable_boost_support(); 1128 1129 return 0; 1130 cleanup_notifiers: 1131 unregister_all_notifiers(); 1132 clean_chip_info(); 1133 out: 1134 pr_info("Platform driver disabled. System does not support PState control\n"); 1135 return rc; 1136 } 1137 module_init(powernv_cpufreq_init); 1138 1139 static void __exit powernv_cpufreq_exit(void) 1140 { 1141 cpufreq_unregister_driver(&powernv_cpufreq_driver); 1142 unregister_all_notifiers(); 1143 clean_chip_info(); 1144 } 1145 module_exit(powernv_cpufreq_exit); 1146 1147 MODULE_LICENSE("GPL"); 1148 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 1149