1 /*
2  * POWERNV cpufreq driver for the IBM POWER processors
3  *
4  * (C) Copyright IBM 2014
5  *
6  * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19 
20 #define pr_fmt(fmt)	"powernv-cpufreq: " fmt
21 
22 #include <linux/kernel.h>
23 #include <linux/sysfs.h>
24 #include <linux/cpumask.h>
25 #include <linux/module.h>
26 #include <linux/cpufreq.h>
27 #include <linux/smp.h>
28 #include <linux/of.h>
29 #include <linux/reboot.h>
30 #include <linux/slab.h>
31 #include <linux/cpu.h>
32 #include <linux/hashtable.h>
33 #include <trace/events/power.h>
34 
35 #include <asm/cputhreads.h>
36 #include <asm/firmware.h>
37 #include <asm/reg.h>
38 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
39 #include <asm/opal.h>
40 #include <linux/timer.h>
41 
42 #define POWERNV_MAX_PSTATES_ORDER  8
43 #define POWERNV_MAX_PSTATES	(1UL << (POWERNV_MAX_PSTATES_ORDER))
44 #define PMSR_PSAFE_ENABLE	(1UL << 30)
45 #define PMSR_SPR_EM_DISABLE	(1UL << 31)
46 #define MAX_PSTATE_SHIFT	32
47 #define LPSTATE_SHIFT		48
48 #define GPSTATE_SHIFT		56
49 
50 #define MAX_RAMP_DOWN_TIME				5120
51 /*
52  * On an idle system we want the global pstate to ramp-down from max value to
53  * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
54  * then ramp-down rapidly later on.
55  *
56  * This gives a percentage rampdown for time elapsed in milliseconds.
57  * ramp_down_percentage = ((ms * ms) >> 18)
58  *			~= 3.8 * (sec * sec)
59  *
60  * At 0 ms	ramp_down_percent = 0
61  * At 5120 ms	ramp_down_percent = 100
62  */
63 #define ramp_down_percent(time)		((time * time) >> 18)
64 
65 /* Interval after which the timer is queued to bring down global pstate */
66 #define GPSTATE_TIMER_INTERVAL				2000
67 
68 /**
69  * struct global_pstate_info -	Per policy data structure to maintain history of
70  *				global pstates
71  * @highest_lpstate_idx:	The local pstate index from which we are
72  *				ramping down
73  * @elapsed_time:		Time in ms spent in ramping down from
74  *				highest_lpstate_idx
75  * @last_sampled_time:		Time from boot in ms when global pstates were
76  *				last set
77  * @last_lpstate_idx,		Last set value of local pstate and global
78  * last_gpstate_idx		pstate in terms of cpufreq table index
79  * @timer:			Is used for ramping down if cpu goes idle for
80  *				a long time with global pstate held high
81  * @gpstate_lock:		A spinlock to maintain synchronization between
82  *				routines called by the timer handler and
83  *				governer's target_index calls
84  */
85 struct global_pstate_info {
86 	int highest_lpstate_idx;
87 	unsigned int elapsed_time;
88 	unsigned int last_sampled_time;
89 	int last_lpstate_idx;
90 	int last_gpstate_idx;
91 	spinlock_t gpstate_lock;
92 	struct timer_list timer;
93 	struct cpufreq_policy *policy;
94 };
95 
96 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
97 
98 DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER);
99 /**
100  * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
101  *				  indexed by a function of pstate id.
102  *
103  * @pstate_id: pstate id for this entry.
104  *
105  * @cpufreq_table_idx: Index into the powernv_freqs
106  *		       cpufreq_frequency_table for frequency
107  *		       corresponding to pstate_id.
108  *
109  * @hentry: hlist_node that hooks this entry into the pstate_revmap
110  *	    hashtable
111  */
112 struct pstate_idx_revmap_data {
113 	u8 pstate_id;
114 	unsigned int cpufreq_table_idx;
115 	struct hlist_node hentry;
116 };
117 
118 static bool rebooting, throttled, occ_reset;
119 
120 static const char * const throttle_reason[] = {
121 	"No throttling",
122 	"Power Cap",
123 	"Processor Over Temperature",
124 	"Power Supply Failure",
125 	"Over Current",
126 	"OCC Reset"
127 };
128 
129 enum throttle_reason_type {
130 	NO_THROTTLE = 0,
131 	POWERCAP,
132 	CPU_OVERTEMP,
133 	POWER_SUPPLY_FAILURE,
134 	OVERCURRENT,
135 	OCC_RESET_THROTTLE,
136 	OCC_MAX_REASON
137 };
138 
139 static struct chip {
140 	unsigned int id;
141 	bool throttled;
142 	bool restore;
143 	u8 throttle_reason;
144 	cpumask_t mask;
145 	struct work_struct throttle;
146 	int throttle_turbo;
147 	int throttle_sub_turbo;
148 	int reason[OCC_MAX_REASON];
149 } *chips;
150 
151 static int nr_chips;
152 static DEFINE_PER_CPU(struct chip *, chip_info);
153 
154 /*
155  * Note:
156  * The set of pstates consists of contiguous integers.
157  * powernv_pstate_info stores the index of the frequency table for
158  * max, min and nominal frequencies. It also stores number of
159  * available frequencies.
160  *
161  * powernv_pstate_info.nominal indicates the index to the highest
162  * non-turbo frequency.
163  */
164 static struct powernv_pstate_info {
165 	unsigned int min;
166 	unsigned int max;
167 	unsigned int nominal;
168 	unsigned int nr_pstates;
169 	bool wof_enabled;
170 } powernv_pstate_info;
171 
172 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)
173 {
174 	return ((pmsr_val >> shift) & 0xFF);
175 }
176 
177 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
178 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
179 #define extract_max_pstate(x)  extract_pstate(x, MAX_PSTATE_SHIFT)
180 
181 /* Use following functions for conversions between pstate_id and index */
182 
183 /**
184  * idx_to_pstate : Returns the pstate id corresponding to the
185  *		   frequency in the cpufreq frequency table
186  *		   powernv_freqs indexed by @i.
187  *
188  *		   If @i is out of bound, this will return the pstate
189  *		   corresponding to the nominal frequency.
190  */
191 static inline u8 idx_to_pstate(unsigned int i)
192 {
193 	if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
194 		pr_warn_once("idx_to_pstate: index %u is out of bound\n", i);
195 		return powernv_freqs[powernv_pstate_info.nominal].driver_data;
196 	}
197 
198 	return powernv_freqs[i].driver_data;
199 }
200 
201 /**
202  * pstate_to_idx : Returns the index in the cpufreq frequencytable
203  *		   powernv_freqs for the frequency whose corresponding
204  *		   pstate id is @pstate.
205  *
206  *		   If no frequency corresponding to @pstate is found,
207  *		   this will return the index of the nominal
208  *		   frequency.
209  */
210 static unsigned int pstate_to_idx(u8 pstate)
211 {
212 	unsigned int key = pstate % POWERNV_MAX_PSTATES;
213 	struct pstate_idx_revmap_data *revmap_data;
214 
215 	hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) {
216 		if (revmap_data->pstate_id == pstate)
217 			return revmap_data->cpufreq_table_idx;
218 	}
219 
220 	pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate);
221 	return powernv_pstate_info.nominal;
222 }
223 
224 static inline void reset_gpstates(struct cpufreq_policy *policy)
225 {
226 	struct global_pstate_info *gpstates = policy->driver_data;
227 
228 	gpstates->highest_lpstate_idx = 0;
229 	gpstates->elapsed_time = 0;
230 	gpstates->last_sampled_time = 0;
231 	gpstates->last_lpstate_idx = 0;
232 	gpstates->last_gpstate_idx = 0;
233 }
234 
235 /*
236  * Initialize the freq table based on data obtained
237  * from the firmware passed via device-tree
238  */
239 static int init_powernv_pstates(void)
240 {
241 	struct device_node *power_mgt;
242 	int i, nr_pstates = 0;
243 	const __be32 *pstate_ids, *pstate_freqs;
244 	u32 len_ids, len_freqs;
245 	u32 pstate_min, pstate_max, pstate_nominal;
246 	u32 pstate_turbo, pstate_ultra_turbo;
247 
248 	power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
249 	if (!power_mgt) {
250 		pr_warn("power-mgt node not found\n");
251 		return -ENODEV;
252 	}
253 
254 	if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
255 		pr_warn("ibm,pstate-min node not found\n");
256 		goto out;
257 	}
258 
259 	if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
260 		pr_warn("ibm,pstate-max node not found\n");
261 		goto out;
262 	}
263 
264 	if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
265 				 &pstate_nominal)) {
266 		pr_warn("ibm,pstate-nominal not found\n");
267 		goto out;
268 	}
269 
270 	if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
271 				 &pstate_ultra_turbo)) {
272 		powernv_pstate_info.wof_enabled = false;
273 		goto next;
274 	}
275 
276 	if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
277 				 &pstate_turbo)) {
278 		powernv_pstate_info.wof_enabled = false;
279 		goto next;
280 	}
281 
282 	if (pstate_turbo == pstate_ultra_turbo)
283 		powernv_pstate_info.wof_enabled = false;
284 	else
285 		powernv_pstate_info.wof_enabled = true;
286 
287 next:
288 	pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min,
289 		pstate_nominal, pstate_max);
290 	pr_info("Workload Optimized Frequency is %s in the platform\n",
291 		(powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
292 
293 	pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
294 	if (!pstate_ids) {
295 		pr_warn("ibm,pstate-ids not found\n");
296 		goto out;
297 	}
298 
299 	pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
300 				      &len_freqs);
301 	if (!pstate_freqs) {
302 		pr_warn("ibm,pstate-frequencies-mhz not found\n");
303 		goto out;
304 	}
305 
306 	if (len_ids != len_freqs) {
307 		pr_warn("Entries in ibm,pstate-ids and "
308 			"ibm,pstate-frequencies-mhz does not match\n");
309 	}
310 
311 	nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
312 	if (!nr_pstates) {
313 		pr_warn("No PStates found\n");
314 		goto out;
315 	}
316 
317 	powernv_pstate_info.nr_pstates = nr_pstates;
318 	pr_debug("NR PStates %d\n", nr_pstates);
319 
320 	for (i = 0; i < nr_pstates; i++) {
321 		u32 id = be32_to_cpu(pstate_ids[i]);
322 		u32 freq = be32_to_cpu(pstate_freqs[i]);
323 		struct pstate_idx_revmap_data *revmap_data;
324 		unsigned int key;
325 
326 		pr_debug("PState id %d freq %d MHz\n", id, freq);
327 		powernv_freqs[i].frequency = freq * 1000; /* kHz */
328 		powernv_freqs[i].driver_data = id & 0xFF;
329 
330 		revmap_data = (struct pstate_idx_revmap_data *)
331 			      kmalloc(sizeof(*revmap_data), GFP_KERNEL);
332 
333 		revmap_data->pstate_id = id & 0xFF;
334 		revmap_data->cpufreq_table_idx = i;
335 		key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES;
336 		hash_add(pstate_revmap, &revmap_data->hentry, key);
337 
338 		if (id == pstate_max)
339 			powernv_pstate_info.max = i;
340 		if (id == pstate_nominal)
341 			powernv_pstate_info.nominal = i;
342 		if (id == pstate_min)
343 			powernv_pstate_info.min = i;
344 
345 		if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
346 			int j;
347 
348 			for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
349 				powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
350 		}
351 	}
352 
353 	/* End of list marker entry */
354 	powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
355 
356 	of_node_put(power_mgt);
357 	return 0;
358 out:
359 	of_node_put(power_mgt);
360 	return -ENODEV;
361 }
362 
363 /* Returns the CPU frequency corresponding to the pstate_id. */
364 static unsigned int pstate_id_to_freq(u8 pstate_id)
365 {
366 	int i;
367 
368 	i = pstate_to_idx(pstate_id);
369 	if (i >= powernv_pstate_info.nr_pstates || i < 0) {
370 		pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
371 			pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
372 		i = powernv_pstate_info.nominal;
373 	}
374 
375 	return powernv_freqs[i].frequency;
376 }
377 
378 /*
379  * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
380  * the firmware
381  */
382 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
383 					char *buf)
384 {
385 	return sprintf(buf, "%u\n",
386 		powernv_freqs[powernv_pstate_info.nominal].frequency);
387 }
388 
389 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
390 	__ATTR_RO(cpuinfo_nominal_freq);
391 
392 #define SCALING_BOOST_FREQS_ATTR_INDEX		2
393 
394 static struct freq_attr *powernv_cpu_freq_attr[] = {
395 	&cpufreq_freq_attr_scaling_available_freqs,
396 	&cpufreq_freq_attr_cpuinfo_nominal_freq,
397 	&cpufreq_freq_attr_scaling_boost_freqs,
398 	NULL,
399 };
400 
401 #define throttle_attr(name, member)					\
402 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf)	\
403 {									\
404 	struct chip *chip = per_cpu(chip_info, policy->cpu);		\
405 									\
406 	return sprintf(buf, "%u\n", chip->member);			\
407 }									\
408 									\
409 static struct freq_attr throttle_attr_##name = __ATTR_RO(name)		\
410 
411 throttle_attr(unthrottle, reason[NO_THROTTLE]);
412 throttle_attr(powercap, reason[POWERCAP]);
413 throttle_attr(overtemp, reason[CPU_OVERTEMP]);
414 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
415 throttle_attr(overcurrent, reason[OVERCURRENT]);
416 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
417 throttle_attr(turbo_stat, throttle_turbo);
418 throttle_attr(sub_turbo_stat, throttle_sub_turbo);
419 
420 static struct attribute *throttle_attrs[] = {
421 	&throttle_attr_unthrottle.attr,
422 	&throttle_attr_powercap.attr,
423 	&throttle_attr_overtemp.attr,
424 	&throttle_attr_supply_fault.attr,
425 	&throttle_attr_overcurrent.attr,
426 	&throttle_attr_occ_reset.attr,
427 	&throttle_attr_turbo_stat.attr,
428 	&throttle_attr_sub_turbo_stat.attr,
429 	NULL,
430 };
431 
432 static const struct attribute_group throttle_attr_grp = {
433 	.name	= "throttle_stats",
434 	.attrs	= throttle_attrs,
435 };
436 
437 /* Helper routines */
438 
439 /* Access helpers to power mgt SPR */
440 
441 static inline unsigned long get_pmspr(unsigned long sprn)
442 {
443 	switch (sprn) {
444 	case SPRN_PMCR:
445 		return mfspr(SPRN_PMCR);
446 
447 	case SPRN_PMICR:
448 		return mfspr(SPRN_PMICR);
449 
450 	case SPRN_PMSR:
451 		return mfspr(SPRN_PMSR);
452 	}
453 	BUG();
454 }
455 
456 static inline void set_pmspr(unsigned long sprn, unsigned long val)
457 {
458 	switch (sprn) {
459 	case SPRN_PMCR:
460 		mtspr(SPRN_PMCR, val);
461 		return;
462 
463 	case SPRN_PMICR:
464 		mtspr(SPRN_PMICR, val);
465 		return;
466 	}
467 	BUG();
468 }
469 
470 /*
471  * Use objects of this type to query/update
472  * pstates on a remote CPU via smp_call_function.
473  */
474 struct powernv_smp_call_data {
475 	unsigned int freq;
476 	u8 pstate_id;
477 	u8 gpstate_id;
478 };
479 
480 /*
481  * powernv_read_cpu_freq: Reads the current frequency on this CPU.
482  *
483  * Called via smp_call_function.
484  *
485  * Note: The caller of the smp_call_function should pass an argument of
486  * the type 'struct powernv_smp_call_data *' along with this function.
487  *
488  * The current frequency on this CPU will be returned via
489  * ((struct powernv_smp_call_data *)arg)->freq;
490  */
491 static void powernv_read_cpu_freq(void *arg)
492 {
493 	unsigned long pmspr_val;
494 	struct powernv_smp_call_data *freq_data = arg;
495 
496 	pmspr_val = get_pmspr(SPRN_PMSR);
497 	freq_data->pstate_id = extract_local_pstate(pmspr_val);
498 	freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
499 
500 	pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
501 		 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
502 		 freq_data->freq);
503 }
504 
505 /*
506  * powernv_cpufreq_get: Returns the CPU frequency as reported by the
507  * firmware for CPU 'cpu'. This value is reported through the sysfs
508  * file cpuinfo_cur_freq.
509  */
510 static unsigned int powernv_cpufreq_get(unsigned int cpu)
511 {
512 	struct powernv_smp_call_data freq_data;
513 
514 	smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
515 			&freq_data, 1);
516 
517 	return freq_data.freq;
518 }
519 
520 /*
521  * set_pstate: Sets the pstate on this CPU.
522  *
523  * This is called via an smp_call_function.
524  *
525  * The caller must ensure that freq_data is of the type
526  * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
527  * on this CPU should be present in freq_data->pstate_id.
528  */
529 static void set_pstate(void *data)
530 {
531 	unsigned long val;
532 	struct powernv_smp_call_data *freq_data = data;
533 	unsigned long pstate_ul = freq_data->pstate_id;
534 	unsigned long gpstate_ul = freq_data->gpstate_id;
535 
536 	val = get_pmspr(SPRN_PMCR);
537 	val = val & 0x0000FFFFFFFFFFFFULL;
538 
539 	pstate_ul = pstate_ul & 0xFF;
540 	gpstate_ul = gpstate_ul & 0xFF;
541 
542 	/* Set both global(bits 56..63) and local(bits 48..55) PStates */
543 	val = val | (gpstate_ul << 56) | (pstate_ul << 48);
544 
545 	pr_debug("Setting cpu %d pmcr to %016lX\n",
546 			raw_smp_processor_id(), val);
547 	set_pmspr(SPRN_PMCR, val);
548 }
549 
550 /*
551  * get_nominal_index: Returns the index corresponding to the nominal
552  * pstate in the cpufreq table
553  */
554 static inline unsigned int get_nominal_index(void)
555 {
556 	return powernv_pstate_info.nominal;
557 }
558 
559 static void powernv_cpufreq_throttle_check(void *data)
560 {
561 	struct chip *chip;
562 	unsigned int cpu = smp_processor_id();
563 	unsigned long pmsr;
564 	u8 pmsr_pmax;
565 	unsigned int pmsr_pmax_idx;
566 
567 	pmsr = get_pmspr(SPRN_PMSR);
568 	chip = this_cpu_read(chip_info);
569 
570 	/* Check for Pmax Capping */
571 	pmsr_pmax = extract_max_pstate(pmsr);
572 	pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
573 	if (pmsr_pmax_idx != powernv_pstate_info.max) {
574 		if (chip->throttled)
575 			goto next;
576 		chip->throttled = true;
577 		if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
578 			pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
579 				     cpu, chip->id, pmsr_pmax,
580 				     idx_to_pstate(powernv_pstate_info.nominal));
581 			chip->throttle_sub_turbo++;
582 		} else {
583 			chip->throttle_turbo++;
584 		}
585 		trace_powernv_throttle(chip->id,
586 				      throttle_reason[chip->throttle_reason],
587 				      pmsr_pmax);
588 	} else if (chip->throttled) {
589 		chip->throttled = false;
590 		trace_powernv_throttle(chip->id,
591 				      throttle_reason[chip->throttle_reason],
592 				      pmsr_pmax);
593 	}
594 
595 	/* Check if Psafe_mode_active is set in PMSR. */
596 next:
597 	if (pmsr & PMSR_PSAFE_ENABLE) {
598 		throttled = true;
599 		pr_info("Pstate set to safe frequency\n");
600 	}
601 
602 	/* Check if SPR_EM_DISABLE is set in PMSR */
603 	if (pmsr & PMSR_SPR_EM_DISABLE) {
604 		throttled = true;
605 		pr_info("Frequency Control disabled from OS\n");
606 	}
607 
608 	if (throttled) {
609 		pr_info("PMSR = %16lx\n", pmsr);
610 		pr_warn("CPU Frequency could be throttled\n");
611 	}
612 }
613 
614 /**
615  * calc_global_pstate - Calculate global pstate
616  * @elapsed_time:		Elapsed time in milliseconds
617  * @local_pstate_idx:		New local pstate
618  * @highest_lpstate_idx:	pstate from which its ramping down
619  *
620  * Finds the appropriate global pstate based on the pstate from which its
621  * ramping down and the time elapsed in ramping down. It follows a quadratic
622  * equation which ensures that it reaches ramping down to pmin in 5sec.
623  */
624 static inline int calc_global_pstate(unsigned int elapsed_time,
625 				     int highest_lpstate_idx,
626 				     int local_pstate_idx)
627 {
628 	int index_diff;
629 
630 	/*
631 	 * Using ramp_down_percent we get the percentage of rampdown
632 	 * that we are expecting to be dropping. Difference between
633 	 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
634 	 * number of how many pstates we will drop eventually by the end of
635 	 * 5 seconds, then just scale it get the number pstates to be dropped.
636 	 */
637 	index_diff =  ((int)ramp_down_percent(elapsed_time) *
638 			(powernv_pstate_info.min - highest_lpstate_idx)) / 100;
639 
640 	/* Ensure that global pstate is >= to local pstate */
641 	if (highest_lpstate_idx + index_diff >= local_pstate_idx)
642 		return local_pstate_idx;
643 	else
644 		return highest_lpstate_idx + index_diff;
645 }
646 
647 static inline void  queue_gpstate_timer(struct global_pstate_info *gpstates)
648 {
649 	unsigned int timer_interval;
650 
651 	/*
652 	 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
653 	 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
654 	 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
655 	 * seconds of ramp down time.
656 	 */
657 	if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
658 	     > MAX_RAMP_DOWN_TIME)
659 		timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
660 	else
661 		timer_interval = GPSTATE_TIMER_INTERVAL;
662 
663 	mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
664 }
665 
666 /**
667  * gpstate_timer_handler
668  *
669  * @data: pointer to cpufreq_policy on which timer was queued
670  *
671  * This handler brings down the global pstate closer to the local pstate
672  * according quadratic equation. Queues a new timer if it is still not equal
673  * to local pstate
674  */
675 void gpstate_timer_handler(struct timer_list *t)
676 {
677 	struct global_pstate_info *gpstates = from_timer(gpstates, t, timer);
678 	struct cpufreq_policy *policy = gpstates->policy;
679 	int gpstate_idx, lpstate_idx;
680 	unsigned long val;
681 	unsigned int time_diff = jiffies_to_msecs(jiffies)
682 					- gpstates->last_sampled_time;
683 	struct powernv_smp_call_data freq_data;
684 
685 	if (!spin_trylock(&gpstates->gpstate_lock))
686 		return;
687 	/*
688 	 * If the timer has migrated to the different cpu then bring
689 	 * it back to one of the policy->cpus
690 	 */
691 	if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) {
692 		gpstates->timer.expires = jiffies + msecs_to_jiffies(1);
693 		add_timer_on(&gpstates->timer, cpumask_first(policy->cpus));
694 		spin_unlock(&gpstates->gpstate_lock);
695 		return;
696 	}
697 
698 	/*
699 	 * If PMCR was last updated was using fast_swtich then
700 	 * We may have wrong in gpstate->last_lpstate_idx
701 	 * value. Hence, read from PMCR to get correct data.
702 	 */
703 	val = get_pmspr(SPRN_PMCR);
704 	freq_data.gpstate_id = extract_global_pstate(val);
705 	freq_data.pstate_id = extract_local_pstate(val);
706 	if (freq_data.gpstate_id  == freq_data.pstate_id) {
707 		reset_gpstates(policy);
708 		spin_unlock(&gpstates->gpstate_lock);
709 		return;
710 	}
711 
712 	gpstates->last_sampled_time += time_diff;
713 	gpstates->elapsed_time += time_diff;
714 
715 	if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
716 		gpstate_idx = pstate_to_idx(freq_data.pstate_id);
717 		lpstate_idx = gpstate_idx;
718 		reset_gpstates(policy);
719 		gpstates->highest_lpstate_idx = gpstate_idx;
720 	} else {
721 		lpstate_idx = pstate_to_idx(freq_data.pstate_id);
722 		gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
723 						 gpstates->highest_lpstate_idx,
724 						 lpstate_idx);
725 	}
726 	freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
727 	gpstates->last_gpstate_idx = gpstate_idx;
728 	gpstates->last_lpstate_idx = lpstate_idx;
729 	/*
730 	 * If local pstate is equal to global pstate, rampdown is over
731 	 * So timer is not required to be queued.
732 	 */
733 	if (gpstate_idx != gpstates->last_lpstate_idx)
734 		queue_gpstate_timer(gpstates);
735 
736 	set_pstate(&freq_data);
737 	spin_unlock(&gpstates->gpstate_lock);
738 }
739 
740 /*
741  * powernv_cpufreq_target_index: Sets the frequency corresponding to
742  * the cpufreq table entry indexed by new_index on the cpus in the
743  * mask policy->cpus
744  */
745 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
746 					unsigned int new_index)
747 {
748 	struct powernv_smp_call_data freq_data;
749 	unsigned int cur_msec, gpstate_idx;
750 	struct global_pstate_info *gpstates = policy->driver_data;
751 
752 	if (unlikely(rebooting) && new_index != get_nominal_index())
753 		return 0;
754 
755 	if (!throttled) {
756 		/* we don't want to be preempted while
757 		 * checking if the CPU frequency has been throttled
758 		 */
759 		preempt_disable();
760 		powernv_cpufreq_throttle_check(NULL);
761 		preempt_enable();
762 	}
763 
764 	cur_msec = jiffies_to_msecs(get_jiffies_64());
765 
766 	freq_data.pstate_id = idx_to_pstate(new_index);
767 	if (!gpstates) {
768 		freq_data.gpstate_id = freq_data.pstate_id;
769 		goto no_gpstate;
770 	}
771 
772 	spin_lock(&gpstates->gpstate_lock);
773 
774 	if (!gpstates->last_sampled_time) {
775 		gpstate_idx = new_index;
776 		gpstates->highest_lpstate_idx = new_index;
777 		goto gpstates_done;
778 	}
779 
780 	if (gpstates->last_gpstate_idx < new_index) {
781 		gpstates->elapsed_time += cur_msec -
782 						 gpstates->last_sampled_time;
783 
784 		/*
785 		 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
786 		 * we should be resetting all global pstate related data. Set it
787 		 * equal to local pstate to start fresh.
788 		 */
789 		if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
790 			reset_gpstates(policy);
791 			gpstates->highest_lpstate_idx = new_index;
792 			gpstate_idx = new_index;
793 		} else {
794 		/* Elaspsed_time is less than 5 seconds, continue to rampdown */
795 			gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
796 							 gpstates->highest_lpstate_idx,
797 							 new_index);
798 		}
799 	} else {
800 		reset_gpstates(policy);
801 		gpstates->highest_lpstate_idx = new_index;
802 		gpstate_idx = new_index;
803 	}
804 
805 	/*
806 	 * If local pstate is equal to global pstate, rampdown is over
807 	 * So timer is not required to be queued.
808 	 */
809 	if (gpstate_idx != new_index)
810 		queue_gpstate_timer(gpstates);
811 	else
812 		del_timer_sync(&gpstates->timer);
813 
814 gpstates_done:
815 	freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
816 	gpstates->last_sampled_time = cur_msec;
817 	gpstates->last_gpstate_idx = gpstate_idx;
818 	gpstates->last_lpstate_idx = new_index;
819 
820 	spin_unlock(&gpstates->gpstate_lock);
821 
822 no_gpstate:
823 	/*
824 	 * Use smp_call_function to send IPI and execute the
825 	 * mtspr on target CPU.  We could do that without IPI
826 	 * if current CPU is within policy->cpus (core)
827 	 */
828 	smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
829 	return 0;
830 }
831 
832 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
833 {
834 	int base, i;
835 	struct kernfs_node *kn;
836 	struct global_pstate_info *gpstates;
837 
838 	base = cpu_first_thread_sibling(policy->cpu);
839 
840 	for (i = 0; i < threads_per_core; i++)
841 		cpumask_set_cpu(base + i, policy->cpus);
842 
843 	kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
844 	if (!kn) {
845 		int ret;
846 
847 		ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
848 		if (ret) {
849 			pr_info("Failed to create throttle stats directory for cpu %d\n",
850 				policy->cpu);
851 			return ret;
852 		}
853 	} else {
854 		kernfs_put(kn);
855 	}
856 
857 	policy->freq_table = powernv_freqs;
858 	policy->fast_switch_possible = true;
859 
860 	if (pvr_version_is(PVR_POWER9))
861 		return 0;
862 
863 	/* Initialise Gpstate ramp-down timer only on POWER8 */
864 	gpstates =  kzalloc(sizeof(*gpstates), GFP_KERNEL);
865 	if (!gpstates)
866 		return -ENOMEM;
867 
868 	policy->driver_data = gpstates;
869 
870 	/* initialize timer */
871 	gpstates->policy = policy;
872 	timer_setup(&gpstates->timer, gpstate_timer_handler,
873 		    TIMER_PINNED | TIMER_DEFERRABLE);
874 	gpstates->timer.expires = jiffies +
875 				msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
876 	spin_lock_init(&gpstates->gpstate_lock);
877 
878 	return 0;
879 }
880 
881 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
882 {
883 	/* timer is deleted in cpufreq_cpu_stop() */
884 	kfree(policy->driver_data);
885 
886 	return 0;
887 }
888 
889 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
890 				unsigned long action, void *unused)
891 {
892 	int cpu;
893 	struct cpufreq_policy cpu_policy;
894 
895 	rebooting = true;
896 	for_each_online_cpu(cpu) {
897 		cpufreq_get_policy(&cpu_policy, cpu);
898 		powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
899 	}
900 
901 	return NOTIFY_DONE;
902 }
903 
904 static struct notifier_block powernv_cpufreq_reboot_nb = {
905 	.notifier_call = powernv_cpufreq_reboot_notifier,
906 };
907 
908 void powernv_cpufreq_work_fn(struct work_struct *work)
909 {
910 	struct chip *chip = container_of(work, struct chip, throttle);
911 	unsigned int cpu;
912 	cpumask_t mask;
913 
914 	get_online_cpus();
915 	cpumask_and(&mask, &chip->mask, cpu_online_mask);
916 	smp_call_function_any(&mask,
917 			      powernv_cpufreq_throttle_check, NULL, 0);
918 
919 	if (!chip->restore)
920 		goto out;
921 
922 	chip->restore = false;
923 	for_each_cpu(cpu, &mask) {
924 		int index;
925 		struct cpufreq_policy policy;
926 
927 		cpufreq_get_policy(&policy, cpu);
928 		index = cpufreq_table_find_index_c(&policy, policy.cur);
929 		powernv_cpufreq_target_index(&policy, index);
930 		cpumask_andnot(&mask, &mask, policy.cpus);
931 	}
932 out:
933 	put_online_cpus();
934 }
935 
936 static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
937 				   unsigned long msg_type, void *_msg)
938 {
939 	struct opal_msg *msg = _msg;
940 	struct opal_occ_msg omsg;
941 	int i;
942 
943 	if (msg_type != OPAL_MSG_OCC)
944 		return 0;
945 
946 	omsg.type = be64_to_cpu(msg->params[0]);
947 
948 	switch (omsg.type) {
949 	case OCC_RESET:
950 		occ_reset = true;
951 		pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
952 		/*
953 		 * powernv_cpufreq_throttle_check() is called in
954 		 * target() callback which can detect the throttle state
955 		 * for governors like ondemand.
956 		 * But static governors will not call target() often thus
957 		 * report throttling here.
958 		 */
959 		if (!throttled) {
960 			throttled = true;
961 			pr_warn("CPU frequency is throttled for duration\n");
962 		}
963 
964 		break;
965 	case OCC_LOAD:
966 		pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
967 		break;
968 	case OCC_THROTTLE:
969 		omsg.chip = be64_to_cpu(msg->params[1]);
970 		omsg.throttle_status = be64_to_cpu(msg->params[2]);
971 
972 		if (occ_reset) {
973 			occ_reset = false;
974 			throttled = false;
975 			pr_info("OCC Active, CPU frequency is no longer throttled\n");
976 
977 			for (i = 0; i < nr_chips; i++) {
978 				chips[i].restore = true;
979 				schedule_work(&chips[i].throttle);
980 			}
981 
982 			return 0;
983 		}
984 
985 		for (i = 0; i < nr_chips; i++)
986 			if (chips[i].id == omsg.chip)
987 				break;
988 
989 		if (omsg.throttle_status >= 0 &&
990 		    omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
991 			chips[i].throttle_reason = omsg.throttle_status;
992 			chips[i].reason[omsg.throttle_status]++;
993 		}
994 
995 		if (!omsg.throttle_status)
996 			chips[i].restore = true;
997 
998 		schedule_work(&chips[i].throttle);
999 	}
1000 	return 0;
1001 }
1002 
1003 static struct notifier_block powernv_cpufreq_opal_nb = {
1004 	.notifier_call	= powernv_cpufreq_occ_msg,
1005 	.next		= NULL,
1006 	.priority	= 0,
1007 };
1008 
1009 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
1010 {
1011 	struct powernv_smp_call_data freq_data;
1012 	struct global_pstate_info *gpstates = policy->driver_data;
1013 
1014 	freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
1015 	freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
1016 	smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
1017 	if (gpstates)
1018 		del_timer_sync(&gpstates->timer);
1019 }
1020 
1021 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
1022 					unsigned int target_freq)
1023 {
1024 	int index;
1025 	struct powernv_smp_call_data freq_data;
1026 
1027 	index = cpufreq_table_find_index_dl(policy, target_freq);
1028 	freq_data.pstate_id = powernv_freqs[index].driver_data;
1029 	freq_data.gpstate_id = powernv_freqs[index].driver_data;
1030 	set_pstate(&freq_data);
1031 
1032 	return powernv_freqs[index].frequency;
1033 }
1034 
1035 static struct cpufreq_driver powernv_cpufreq_driver = {
1036 	.name		= "powernv-cpufreq",
1037 	.flags		= CPUFREQ_CONST_LOOPS,
1038 	.init		= powernv_cpufreq_cpu_init,
1039 	.exit		= powernv_cpufreq_cpu_exit,
1040 	.verify		= cpufreq_generic_frequency_table_verify,
1041 	.target_index	= powernv_cpufreq_target_index,
1042 	.fast_switch	= powernv_fast_switch,
1043 	.get		= powernv_cpufreq_get,
1044 	.stop_cpu	= powernv_cpufreq_stop_cpu,
1045 	.attr		= powernv_cpu_freq_attr,
1046 };
1047 
1048 static int init_chip_info(void)
1049 {
1050 	unsigned int chip[256];
1051 	unsigned int cpu, i;
1052 	unsigned int prev_chip_id = UINT_MAX;
1053 
1054 	for_each_possible_cpu(cpu) {
1055 		unsigned int id = cpu_to_chip_id(cpu);
1056 
1057 		if (prev_chip_id != id) {
1058 			prev_chip_id = id;
1059 			chip[nr_chips++] = id;
1060 		}
1061 	}
1062 
1063 	chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
1064 	if (!chips)
1065 		return -ENOMEM;
1066 
1067 	for (i = 0; i < nr_chips; i++) {
1068 		chips[i].id = chip[i];
1069 		cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
1070 		INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
1071 		for_each_cpu(cpu, &chips[i].mask)
1072 			per_cpu(chip_info, cpu) =  &chips[i];
1073 	}
1074 
1075 	return 0;
1076 }
1077 
1078 static inline void clean_chip_info(void)
1079 {
1080 	kfree(chips);
1081 }
1082 
1083 static inline void unregister_all_notifiers(void)
1084 {
1085 	opal_message_notifier_unregister(OPAL_MSG_OCC,
1086 					 &powernv_cpufreq_opal_nb);
1087 	unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1088 }
1089 
1090 static int __init powernv_cpufreq_init(void)
1091 {
1092 	int rc = 0;
1093 
1094 	/* Don't probe on pseries (guest) platforms */
1095 	if (!firmware_has_feature(FW_FEATURE_OPAL))
1096 		return -ENODEV;
1097 
1098 	/* Discover pstates from device tree and init */
1099 	rc = init_powernv_pstates();
1100 	if (rc)
1101 		goto out;
1102 
1103 	/* Populate chip info */
1104 	rc = init_chip_info();
1105 	if (rc)
1106 		goto out;
1107 
1108 	register_reboot_notifier(&powernv_cpufreq_reboot_nb);
1109 	opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
1110 
1111 	if (powernv_pstate_info.wof_enabled)
1112 		powernv_cpufreq_driver.boost_enabled = true;
1113 	else
1114 		powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
1115 
1116 	rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1117 	if (rc) {
1118 		pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1119 		goto cleanup_notifiers;
1120 	}
1121 
1122 	if (powernv_pstate_info.wof_enabled)
1123 		cpufreq_enable_boost_support();
1124 
1125 	return 0;
1126 cleanup_notifiers:
1127 	unregister_all_notifiers();
1128 	clean_chip_info();
1129 out:
1130 	pr_info("Platform driver disabled. System does not support PState control\n");
1131 	return rc;
1132 }
1133 module_init(powernv_cpufreq_init);
1134 
1135 static void __exit powernv_cpufreq_exit(void)
1136 {
1137 	cpufreq_unregister_driver(&powernv_cpufreq_driver);
1138 	unregister_all_notifiers();
1139 	clean_chip_info();
1140 }
1141 module_exit(powernv_cpufreq_exit);
1142 
1143 MODULE_LICENSE("GPL");
1144 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
1145