1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * POWERNV cpufreq driver for the IBM POWER processors 4 * 5 * (C) Copyright IBM 2014 6 * 7 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 8 */ 9 10 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 11 12 #include <linux/kernel.h> 13 #include <linux/sysfs.h> 14 #include <linux/cpumask.h> 15 #include <linux/module.h> 16 #include <linux/cpufreq.h> 17 #include <linux/smp.h> 18 #include <linux/of.h> 19 #include <linux/reboot.h> 20 #include <linux/slab.h> 21 #include <linux/cpu.h> 22 #include <linux/hashtable.h> 23 #include <trace/events/power.h> 24 25 #include <asm/cputhreads.h> 26 #include <asm/firmware.h> 27 #include <asm/reg.h> 28 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 29 #include <asm/opal.h> 30 #include <linux/timer.h> 31 32 #define POWERNV_MAX_PSTATES_ORDER 8 33 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER)) 34 #define PMSR_PSAFE_ENABLE (1UL << 30) 35 #define PMSR_SPR_EM_DISABLE (1UL << 31) 36 #define MAX_PSTATE_SHIFT 32 37 #define LPSTATE_SHIFT 48 38 #define GPSTATE_SHIFT 56 39 40 #define MAX_RAMP_DOWN_TIME 5120 41 /* 42 * On an idle system we want the global pstate to ramp-down from max value to 43 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 44 * then ramp-down rapidly later on. 45 * 46 * This gives a percentage rampdown for time elapsed in milliseconds. 47 * ramp_down_percentage = ((ms * ms) >> 18) 48 * ~= 3.8 * (sec * sec) 49 * 50 * At 0 ms ramp_down_percent = 0 51 * At 5120 ms ramp_down_percent = 100 52 */ 53 #define ramp_down_percent(time) ((time * time) >> 18) 54 55 /* Interval after which the timer is queued to bring down global pstate */ 56 #define GPSTATE_TIMER_INTERVAL 2000 57 58 /** 59 * struct global_pstate_info - Per policy data structure to maintain history of 60 * global pstates 61 * @highest_lpstate_idx: The local pstate index from which we are 62 * ramping down 63 * @elapsed_time: Time in ms spent in ramping down from 64 * highest_lpstate_idx 65 * @last_sampled_time: Time from boot in ms when global pstates were 66 * last set 67 * @last_lpstate_idx: Last set value of local pstate and global 68 * @last_gpstate_idx: pstate in terms of cpufreq table index 69 * @timer: Is used for ramping down if cpu goes idle for 70 * a long time with global pstate held high 71 * @gpstate_lock: A spinlock to maintain synchronization between 72 * routines called by the timer handler and 73 * governer's target_index calls 74 * @policy: Associated CPUFreq policy 75 */ 76 struct global_pstate_info { 77 int highest_lpstate_idx; 78 unsigned int elapsed_time; 79 unsigned int last_sampled_time; 80 int last_lpstate_idx; 81 int last_gpstate_idx; 82 spinlock_t gpstate_lock; 83 struct timer_list timer; 84 struct cpufreq_policy *policy; 85 }; 86 87 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 88 89 static DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER); 90 /** 91 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap 92 * indexed by a function of pstate id. 93 * 94 * @pstate_id: pstate id for this entry. 95 * 96 * @cpufreq_table_idx: Index into the powernv_freqs 97 * cpufreq_frequency_table for frequency 98 * corresponding to pstate_id. 99 * 100 * @hentry: hlist_node that hooks this entry into the pstate_revmap 101 * hashtable 102 */ 103 struct pstate_idx_revmap_data { 104 u8 pstate_id; 105 unsigned int cpufreq_table_idx; 106 struct hlist_node hentry; 107 }; 108 109 static bool rebooting, throttled, occ_reset; 110 111 static const char * const throttle_reason[] = { 112 "No throttling", 113 "Power Cap", 114 "Processor Over Temperature", 115 "Power Supply Failure", 116 "Over Current", 117 "OCC Reset" 118 }; 119 120 enum throttle_reason_type { 121 NO_THROTTLE = 0, 122 POWERCAP, 123 CPU_OVERTEMP, 124 POWER_SUPPLY_FAILURE, 125 OVERCURRENT, 126 OCC_RESET_THROTTLE, 127 OCC_MAX_REASON 128 }; 129 130 static struct chip { 131 unsigned int id; 132 bool throttled; 133 bool restore; 134 u8 throttle_reason; 135 cpumask_t mask; 136 struct work_struct throttle; 137 int throttle_turbo; 138 int throttle_sub_turbo; 139 int reason[OCC_MAX_REASON]; 140 } *chips; 141 142 static int nr_chips; 143 static DEFINE_PER_CPU(struct chip *, chip_info); 144 145 /* 146 * Note: 147 * The set of pstates consists of contiguous integers. 148 * powernv_pstate_info stores the index of the frequency table for 149 * max, min and nominal frequencies. It also stores number of 150 * available frequencies. 151 * 152 * powernv_pstate_info.nominal indicates the index to the highest 153 * non-turbo frequency. 154 */ 155 static struct powernv_pstate_info { 156 unsigned int min; 157 unsigned int max; 158 unsigned int nominal; 159 unsigned int nr_pstates; 160 bool wof_enabled; 161 } powernv_pstate_info; 162 163 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift) 164 { 165 return ((pmsr_val >> shift) & 0xFF); 166 } 167 168 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT) 169 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT) 170 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT) 171 172 /* Use following functions for conversions between pstate_id and index */ 173 174 /* 175 * idx_to_pstate : Returns the pstate id corresponding to the 176 * frequency in the cpufreq frequency table 177 * powernv_freqs indexed by @i. 178 * 179 * If @i is out of bound, this will return the pstate 180 * corresponding to the nominal frequency. 181 */ 182 static inline u8 idx_to_pstate(unsigned int i) 183 { 184 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 185 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i); 186 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 187 } 188 189 return powernv_freqs[i].driver_data; 190 } 191 192 /* 193 * pstate_to_idx : Returns the index in the cpufreq frequencytable 194 * powernv_freqs for the frequency whose corresponding 195 * pstate id is @pstate. 196 * 197 * If no frequency corresponding to @pstate is found, 198 * this will return the index of the nominal 199 * frequency. 200 */ 201 static unsigned int pstate_to_idx(u8 pstate) 202 { 203 unsigned int key = pstate % POWERNV_MAX_PSTATES; 204 struct pstate_idx_revmap_data *revmap_data; 205 206 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) { 207 if (revmap_data->pstate_id == pstate) 208 return revmap_data->cpufreq_table_idx; 209 } 210 211 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate); 212 return powernv_pstate_info.nominal; 213 } 214 215 static inline void reset_gpstates(struct cpufreq_policy *policy) 216 { 217 struct global_pstate_info *gpstates = policy->driver_data; 218 219 gpstates->highest_lpstate_idx = 0; 220 gpstates->elapsed_time = 0; 221 gpstates->last_sampled_time = 0; 222 gpstates->last_lpstate_idx = 0; 223 gpstates->last_gpstate_idx = 0; 224 } 225 226 /* 227 * Initialize the freq table based on data obtained 228 * from the firmware passed via device-tree 229 */ 230 static int init_powernv_pstates(void) 231 { 232 struct device_node *power_mgt; 233 int i, nr_pstates = 0; 234 const __be32 *pstate_ids, *pstate_freqs; 235 u32 len_ids, len_freqs; 236 u32 pstate_min, pstate_max, pstate_nominal; 237 u32 pstate_turbo, pstate_ultra_turbo; 238 int rc = -ENODEV; 239 240 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 241 if (!power_mgt) { 242 pr_warn("power-mgt node not found\n"); 243 return -ENODEV; 244 } 245 246 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 247 pr_warn("ibm,pstate-min node not found\n"); 248 goto out; 249 } 250 251 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 252 pr_warn("ibm,pstate-max node not found\n"); 253 goto out; 254 } 255 256 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 257 &pstate_nominal)) { 258 pr_warn("ibm,pstate-nominal not found\n"); 259 goto out; 260 } 261 262 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo", 263 &pstate_ultra_turbo)) { 264 powernv_pstate_info.wof_enabled = false; 265 goto next; 266 } 267 268 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo", 269 &pstate_turbo)) { 270 powernv_pstate_info.wof_enabled = false; 271 goto next; 272 } 273 274 if (pstate_turbo == pstate_ultra_turbo) 275 powernv_pstate_info.wof_enabled = false; 276 else 277 powernv_pstate_info.wof_enabled = true; 278 279 next: 280 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min, 281 pstate_nominal, pstate_max); 282 pr_info("Workload Optimized Frequency is %s in the platform\n", 283 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled"); 284 285 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 286 if (!pstate_ids) { 287 pr_warn("ibm,pstate-ids not found\n"); 288 goto out; 289 } 290 291 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 292 &len_freqs); 293 if (!pstate_freqs) { 294 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 295 goto out; 296 } 297 298 if (len_ids != len_freqs) { 299 pr_warn("Entries in ibm,pstate-ids and " 300 "ibm,pstate-frequencies-mhz does not match\n"); 301 } 302 303 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 304 if (!nr_pstates) { 305 pr_warn("No PStates found\n"); 306 goto out; 307 } 308 309 powernv_pstate_info.nr_pstates = nr_pstates; 310 pr_debug("NR PStates %d\n", nr_pstates); 311 312 for (i = 0; i < nr_pstates; i++) { 313 u32 id = be32_to_cpu(pstate_ids[i]); 314 u32 freq = be32_to_cpu(pstate_freqs[i]); 315 struct pstate_idx_revmap_data *revmap_data; 316 unsigned int key; 317 318 pr_debug("PState id %d freq %d MHz\n", id, freq); 319 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 320 powernv_freqs[i].driver_data = id & 0xFF; 321 322 revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL); 323 if (!revmap_data) { 324 rc = -ENOMEM; 325 goto out; 326 } 327 328 revmap_data->pstate_id = id & 0xFF; 329 revmap_data->cpufreq_table_idx = i; 330 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES; 331 hash_add(pstate_revmap, &revmap_data->hentry, key); 332 333 if (id == pstate_max) 334 powernv_pstate_info.max = i; 335 if (id == pstate_nominal) 336 powernv_pstate_info.nominal = i; 337 if (id == pstate_min) 338 powernv_pstate_info.min = i; 339 340 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) { 341 int j; 342 343 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--) 344 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ; 345 } 346 } 347 348 /* End of list marker entry */ 349 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 350 351 of_node_put(power_mgt); 352 return 0; 353 out: 354 of_node_put(power_mgt); 355 return rc; 356 } 357 358 /* Returns the CPU frequency corresponding to the pstate_id. */ 359 static unsigned int pstate_id_to_freq(u8 pstate_id) 360 { 361 int i; 362 363 i = pstate_to_idx(pstate_id); 364 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 365 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n", 366 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 367 i = powernv_pstate_info.nominal; 368 } 369 370 return powernv_freqs[i].frequency; 371 } 372 373 /* 374 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 375 * the firmware 376 */ 377 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 378 char *buf) 379 { 380 return sprintf(buf, "%u\n", 381 powernv_freqs[powernv_pstate_info.nominal].frequency); 382 } 383 384 static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 385 __ATTR_RO(cpuinfo_nominal_freq); 386 387 #define SCALING_BOOST_FREQS_ATTR_INDEX 2 388 389 static struct freq_attr *powernv_cpu_freq_attr[] = { 390 &cpufreq_freq_attr_scaling_available_freqs, 391 &cpufreq_freq_attr_cpuinfo_nominal_freq, 392 &cpufreq_freq_attr_scaling_boost_freqs, 393 NULL, 394 }; 395 396 #define throttle_attr(name, member) \ 397 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 398 { \ 399 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 400 \ 401 return sprintf(buf, "%u\n", chip->member); \ 402 } \ 403 \ 404 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 405 406 throttle_attr(unthrottle, reason[NO_THROTTLE]); 407 throttle_attr(powercap, reason[POWERCAP]); 408 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 409 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 410 throttle_attr(overcurrent, reason[OVERCURRENT]); 411 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 412 throttle_attr(turbo_stat, throttle_turbo); 413 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 414 415 static struct attribute *throttle_attrs[] = { 416 &throttle_attr_unthrottle.attr, 417 &throttle_attr_powercap.attr, 418 &throttle_attr_overtemp.attr, 419 &throttle_attr_supply_fault.attr, 420 &throttle_attr_overcurrent.attr, 421 &throttle_attr_occ_reset.attr, 422 &throttle_attr_turbo_stat.attr, 423 &throttle_attr_sub_turbo_stat.attr, 424 NULL, 425 }; 426 427 static const struct attribute_group throttle_attr_grp = { 428 .name = "throttle_stats", 429 .attrs = throttle_attrs, 430 }; 431 432 /* Helper routines */ 433 434 /* Access helpers to power mgt SPR */ 435 436 static inline unsigned long get_pmspr(unsigned long sprn) 437 { 438 switch (sprn) { 439 case SPRN_PMCR: 440 return mfspr(SPRN_PMCR); 441 442 case SPRN_PMICR: 443 return mfspr(SPRN_PMICR); 444 445 case SPRN_PMSR: 446 return mfspr(SPRN_PMSR); 447 } 448 BUG(); 449 } 450 451 static inline void set_pmspr(unsigned long sprn, unsigned long val) 452 { 453 switch (sprn) { 454 case SPRN_PMCR: 455 mtspr(SPRN_PMCR, val); 456 return; 457 458 case SPRN_PMICR: 459 mtspr(SPRN_PMICR, val); 460 return; 461 } 462 BUG(); 463 } 464 465 /* 466 * Use objects of this type to query/update 467 * pstates on a remote CPU via smp_call_function. 468 */ 469 struct powernv_smp_call_data { 470 unsigned int freq; 471 u8 pstate_id; 472 u8 gpstate_id; 473 }; 474 475 /* 476 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 477 * 478 * Called via smp_call_function. 479 * 480 * Note: The caller of the smp_call_function should pass an argument of 481 * the type 'struct powernv_smp_call_data *' along with this function. 482 * 483 * The current frequency on this CPU will be returned via 484 * ((struct powernv_smp_call_data *)arg)->freq; 485 */ 486 static void powernv_read_cpu_freq(void *arg) 487 { 488 unsigned long pmspr_val; 489 struct powernv_smp_call_data *freq_data = arg; 490 491 pmspr_val = get_pmspr(SPRN_PMSR); 492 freq_data->pstate_id = extract_local_pstate(pmspr_val); 493 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 494 495 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n", 496 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 497 freq_data->freq); 498 } 499 500 /* 501 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 502 * firmware for CPU 'cpu'. This value is reported through the sysfs 503 * file cpuinfo_cur_freq. 504 */ 505 static unsigned int powernv_cpufreq_get(unsigned int cpu) 506 { 507 struct powernv_smp_call_data freq_data; 508 509 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 510 &freq_data, 1); 511 512 return freq_data.freq; 513 } 514 515 /* 516 * set_pstate: Sets the pstate on this CPU. 517 * 518 * This is called via an smp_call_function. 519 * 520 * The caller must ensure that freq_data is of the type 521 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 522 * on this CPU should be present in freq_data->pstate_id. 523 */ 524 static void set_pstate(void *data) 525 { 526 unsigned long val; 527 struct powernv_smp_call_data *freq_data = data; 528 unsigned long pstate_ul = freq_data->pstate_id; 529 unsigned long gpstate_ul = freq_data->gpstate_id; 530 531 val = get_pmspr(SPRN_PMCR); 532 val = val & 0x0000FFFFFFFFFFFFULL; 533 534 pstate_ul = pstate_ul & 0xFF; 535 gpstate_ul = gpstate_ul & 0xFF; 536 537 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 538 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 539 540 pr_debug("Setting cpu %d pmcr to %016lX\n", 541 raw_smp_processor_id(), val); 542 set_pmspr(SPRN_PMCR, val); 543 } 544 545 /* 546 * get_nominal_index: Returns the index corresponding to the nominal 547 * pstate in the cpufreq table 548 */ 549 static inline unsigned int get_nominal_index(void) 550 { 551 return powernv_pstate_info.nominal; 552 } 553 554 static void powernv_cpufreq_throttle_check(void *data) 555 { 556 struct chip *chip; 557 unsigned int cpu = smp_processor_id(); 558 unsigned long pmsr; 559 u8 pmsr_pmax; 560 unsigned int pmsr_pmax_idx; 561 562 pmsr = get_pmspr(SPRN_PMSR); 563 chip = this_cpu_read(chip_info); 564 565 /* Check for Pmax Capping */ 566 pmsr_pmax = extract_max_pstate(pmsr); 567 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 568 if (pmsr_pmax_idx != powernv_pstate_info.max) { 569 if (chip->throttled) 570 goto next; 571 chip->throttled = true; 572 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 573 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n", 574 cpu, chip->id, pmsr_pmax, 575 idx_to_pstate(powernv_pstate_info.nominal)); 576 chip->throttle_sub_turbo++; 577 } else { 578 chip->throttle_turbo++; 579 } 580 trace_powernv_throttle(chip->id, 581 throttle_reason[chip->throttle_reason], 582 pmsr_pmax); 583 } else if (chip->throttled) { 584 chip->throttled = false; 585 trace_powernv_throttle(chip->id, 586 throttle_reason[chip->throttle_reason], 587 pmsr_pmax); 588 } 589 590 /* Check if Psafe_mode_active is set in PMSR. */ 591 next: 592 if (pmsr & PMSR_PSAFE_ENABLE) { 593 throttled = true; 594 pr_info("Pstate set to safe frequency\n"); 595 } 596 597 /* Check if SPR_EM_DISABLE is set in PMSR */ 598 if (pmsr & PMSR_SPR_EM_DISABLE) { 599 throttled = true; 600 pr_info("Frequency Control disabled from OS\n"); 601 } 602 603 if (throttled) { 604 pr_info("PMSR = %16lx\n", pmsr); 605 pr_warn("CPU Frequency could be throttled\n"); 606 } 607 } 608 609 /** 610 * calc_global_pstate - Calculate global pstate 611 * @elapsed_time: Elapsed time in milliseconds 612 * @local_pstate_idx: New local pstate 613 * @highest_lpstate_idx: pstate from which its ramping down 614 * 615 * Finds the appropriate global pstate based on the pstate from which its 616 * ramping down and the time elapsed in ramping down. It follows a quadratic 617 * equation which ensures that it reaches ramping down to pmin in 5sec. 618 */ 619 static inline int calc_global_pstate(unsigned int elapsed_time, 620 int highest_lpstate_idx, 621 int local_pstate_idx) 622 { 623 int index_diff; 624 625 /* 626 * Using ramp_down_percent we get the percentage of rampdown 627 * that we are expecting to be dropping. Difference between 628 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 629 * number of how many pstates we will drop eventually by the end of 630 * 5 seconds, then just scale it get the number pstates to be dropped. 631 */ 632 index_diff = ((int)ramp_down_percent(elapsed_time) * 633 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 634 635 /* Ensure that global pstate is >= to local pstate */ 636 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 637 return local_pstate_idx; 638 else 639 return highest_lpstate_idx + index_diff; 640 } 641 642 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 643 { 644 unsigned int timer_interval; 645 646 /* 647 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 648 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 649 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 650 * seconds of ramp down time. 651 */ 652 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 653 > MAX_RAMP_DOWN_TIME) 654 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 655 else 656 timer_interval = GPSTATE_TIMER_INTERVAL; 657 658 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 659 } 660 661 /** 662 * gpstate_timer_handler 663 * 664 * @t: Timer context used to fetch global pstate info struct 665 * 666 * This handler brings down the global pstate closer to the local pstate 667 * according quadratic equation. Queues a new timer if it is still not equal 668 * to local pstate 669 */ 670 static void gpstate_timer_handler(struct timer_list *t) 671 { 672 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer); 673 struct cpufreq_policy *policy = gpstates->policy; 674 int gpstate_idx, lpstate_idx; 675 unsigned long val; 676 unsigned int time_diff = jiffies_to_msecs(jiffies) 677 - gpstates->last_sampled_time; 678 struct powernv_smp_call_data freq_data; 679 680 if (!spin_trylock(&gpstates->gpstate_lock)) 681 return; 682 /* 683 * If the timer has migrated to the different cpu then bring 684 * it back to one of the policy->cpus 685 */ 686 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) { 687 gpstates->timer.expires = jiffies + msecs_to_jiffies(1); 688 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus)); 689 spin_unlock(&gpstates->gpstate_lock); 690 return; 691 } 692 693 /* 694 * If PMCR was last updated was using fast_swtich then 695 * We may have wrong in gpstate->last_lpstate_idx 696 * value. Hence, read from PMCR to get correct data. 697 */ 698 val = get_pmspr(SPRN_PMCR); 699 freq_data.gpstate_id = extract_global_pstate(val); 700 freq_data.pstate_id = extract_local_pstate(val); 701 if (freq_data.gpstate_id == freq_data.pstate_id) { 702 reset_gpstates(policy); 703 spin_unlock(&gpstates->gpstate_lock); 704 return; 705 } 706 707 gpstates->last_sampled_time += time_diff; 708 gpstates->elapsed_time += time_diff; 709 710 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 711 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 712 lpstate_idx = gpstate_idx; 713 reset_gpstates(policy); 714 gpstates->highest_lpstate_idx = gpstate_idx; 715 } else { 716 lpstate_idx = pstate_to_idx(freq_data.pstate_id); 717 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 718 gpstates->highest_lpstate_idx, 719 lpstate_idx); 720 } 721 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 722 gpstates->last_gpstate_idx = gpstate_idx; 723 gpstates->last_lpstate_idx = lpstate_idx; 724 /* 725 * If local pstate is equal to global pstate, rampdown is over 726 * So timer is not required to be queued. 727 */ 728 if (gpstate_idx != gpstates->last_lpstate_idx) 729 queue_gpstate_timer(gpstates); 730 731 set_pstate(&freq_data); 732 spin_unlock(&gpstates->gpstate_lock); 733 } 734 735 /* 736 * powernv_cpufreq_target_index: Sets the frequency corresponding to 737 * the cpufreq table entry indexed by new_index on the cpus in the 738 * mask policy->cpus 739 */ 740 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 741 unsigned int new_index) 742 { 743 struct powernv_smp_call_data freq_data; 744 unsigned int cur_msec, gpstate_idx; 745 struct global_pstate_info *gpstates = policy->driver_data; 746 747 if (unlikely(rebooting) && new_index != get_nominal_index()) 748 return 0; 749 750 if (!throttled) { 751 /* we don't want to be preempted while 752 * checking if the CPU frequency has been throttled 753 */ 754 preempt_disable(); 755 powernv_cpufreq_throttle_check(NULL); 756 preempt_enable(); 757 } 758 759 cur_msec = jiffies_to_msecs(get_jiffies_64()); 760 761 freq_data.pstate_id = idx_to_pstate(new_index); 762 if (!gpstates) { 763 freq_data.gpstate_id = freq_data.pstate_id; 764 goto no_gpstate; 765 } 766 767 spin_lock(&gpstates->gpstate_lock); 768 769 if (!gpstates->last_sampled_time) { 770 gpstate_idx = new_index; 771 gpstates->highest_lpstate_idx = new_index; 772 goto gpstates_done; 773 } 774 775 if (gpstates->last_gpstate_idx < new_index) { 776 gpstates->elapsed_time += cur_msec - 777 gpstates->last_sampled_time; 778 779 /* 780 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 781 * we should be resetting all global pstate related data. Set it 782 * equal to local pstate to start fresh. 783 */ 784 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 785 reset_gpstates(policy); 786 gpstates->highest_lpstate_idx = new_index; 787 gpstate_idx = new_index; 788 } else { 789 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 790 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 791 gpstates->highest_lpstate_idx, 792 new_index); 793 } 794 } else { 795 reset_gpstates(policy); 796 gpstates->highest_lpstate_idx = new_index; 797 gpstate_idx = new_index; 798 } 799 800 /* 801 * If local pstate is equal to global pstate, rampdown is over 802 * So timer is not required to be queued. 803 */ 804 if (gpstate_idx != new_index) 805 queue_gpstate_timer(gpstates); 806 else 807 del_timer_sync(&gpstates->timer); 808 809 gpstates_done: 810 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 811 gpstates->last_sampled_time = cur_msec; 812 gpstates->last_gpstate_idx = gpstate_idx; 813 gpstates->last_lpstate_idx = new_index; 814 815 spin_unlock(&gpstates->gpstate_lock); 816 817 no_gpstate: 818 /* 819 * Use smp_call_function to send IPI and execute the 820 * mtspr on target CPU. We could do that without IPI 821 * if current CPU is within policy->cpus (core) 822 */ 823 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 824 return 0; 825 } 826 827 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 828 { 829 int base, i; 830 struct kernfs_node *kn; 831 struct global_pstate_info *gpstates; 832 833 base = cpu_first_thread_sibling(policy->cpu); 834 835 for (i = 0; i < threads_per_core; i++) 836 cpumask_set_cpu(base + i, policy->cpus); 837 838 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 839 if (!kn) { 840 int ret; 841 842 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 843 if (ret) { 844 pr_info("Failed to create throttle stats directory for cpu %d\n", 845 policy->cpu); 846 return ret; 847 } 848 } else { 849 kernfs_put(kn); 850 } 851 852 policy->freq_table = powernv_freqs; 853 policy->fast_switch_possible = true; 854 855 if (pvr_version_is(PVR_POWER9)) 856 return 0; 857 858 /* Initialise Gpstate ramp-down timer only on POWER8 */ 859 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 860 if (!gpstates) 861 return -ENOMEM; 862 863 policy->driver_data = gpstates; 864 865 /* initialize timer */ 866 gpstates->policy = policy; 867 timer_setup(&gpstates->timer, gpstate_timer_handler, 868 TIMER_PINNED | TIMER_DEFERRABLE); 869 gpstates->timer.expires = jiffies + 870 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 871 spin_lock_init(&gpstates->gpstate_lock); 872 873 return 0; 874 } 875 876 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 877 { 878 /* timer is deleted in cpufreq_cpu_stop() */ 879 kfree(policy->driver_data); 880 881 return 0; 882 } 883 884 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 885 unsigned long action, void *unused) 886 { 887 int cpu; 888 struct cpufreq_policy cpu_policy; 889 890 rebooting = true; 891 for_each_online_cpu(cpu) { 892 cpufreq_get_policy(&cpu_policy, cpu); 893 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index()); 894 } 895 896 return NOTIFY_DONE; 897 } 898 899 static struct notifier_block powernv_cpufreq_reboot_nb = { 900 .notifier_call = powernv_cpufreq_reboot_notifier, 901 }; 902 903 static void powernv_cpufreq_work_fn(struct work_struct *work) 904 { 905 struct chip *chip = container_of(work, struct chip, throttle); 906 struct cpufreq_policy *policy; 907 unsigned int cpu; 908 cpumask_t mask; 909 910 get_online_cpus(); 911 cpumask_and(&mask, &chip->mask, cpu_online_mask); 912 smp_call_function_any(&mask, 913 powernv_cpufreq_throttle_check, NULL, 0); 914 915 if (!chip->restore) 916 goto out; 917 918 chip->restore = false; 919 for_each_cpu(cpu, &mask) { 920 int index; 921 922 policy = cpufreq_cpu_get(cpu); 923 if (!policy) 924 continue; 925 index = cpufreq_table_find_index_c(policy, policy->cur); 926 powernv_cpufreq_target_index(policy, index); 927 cpumask_andnot(&mask, &mask, policy->cpus); 928 cpufreq_cpu_put(policy); 929 } 930 out: 931 put_online_cpus(); 932 } 933 934 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 935 unsigned long msg_type, void *_msg) 936 { 937 struct opal_msg *msg = _msg; 938 struct opal_occ_msg omsg; 939 int i; 940 941 if (msg_type != OPAL_MSG_OCC) 942 return 0; 943 944 omsg.type = be64_to_cpu(msg->params[0]); 945 946 switch (omsg.type) { 947 case OCC_RESET: 948 occ_reset = true; 949 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 950 /* 951 * powernv_cpufreq_throttle_check() is called in 952 * target() callback which can detect the throttle state 953 * for governors like ondemand. 954 * But static governors will not call target() often thus 955 * report throttling here. 956 */ 957 if (!throttled) { 958 throttled = true; 959 pr_warn("CPU frequency is throttled for duration\n"); 960 } 961 962 break; 963 case OCC_LOAD: 964 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 965 break; 966 case OCC_THROTTLE: 967 omsg.chip = be64_to_cpu(msg->params[1]); 968 omsg.throttle_status = be64_to_cpu(msg->params[2]); 969 970 if (occ_reset) { 971 occ_reset = false; 972 throttled = false; 973 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 974 975 for (i = 0; i < nr_chips; i++) { 976 chips[i].restore = true; 977 schedule_work(&chips[i].throttle); 978 } 979 980 return 0; 981 } 982 983 for (i = 0; i < nr_chips; i++) 984 if (chips[i].id == omsg.chip) 985 break; 986 987 if (omsg.throttle_status >= 0 && 988 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 989 chips[i].throttle_reason = omsg.throttle_status; 990 chips[i].reason[omsg.throttle_status]++; 991 } 992 993 if (!omsg.throttle_status) 994 chips[i].restore = true; 995 996 schedule_work(&chips[i].throttle); 997 } 998 return 0; 999 } 1000 1001 static struct notifier_block powernv_cpufreq_opal_nb = { 1002 .notifier_call = powernv_cpufreq_occ_msg, 1003 .next = NULL, 1004 .priority = 0, 1005 }; 1006 1007 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy) 1008 { 1009 struct powernv_smp_call_data freq_data; 1010 struct global_pstate_info *gpstates = policy->driver_data; 1011 1012 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 1013 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 1014 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 1015 if (gpstates) 1016 del_timer_sync(&gpstates->timer); 1017 } 1018 1019 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy, 1020 unsigned int target_freq) 1021 { 1022 int index; 1023 struct powernv_smp_call_data freq_data; 1024 1025 index = cpufreq_table_find_index_dl(policy, target_freq); 1026 freq_data.pstate_id = powernv_freqs[index].driver_data; 1027 freq_data.gpstate_id = powernv_freqs[index].driver_data; 1028 set_pstate(&freq_data); 1029 1030 return powernv_freqs[index].frequency; 1031 } 1032 1033 static struct cpufreq_driver powernv_cpufreq_driver = { 1034 .name = "powernv-cpufreq", 1035 .flags = CPUFREQ_CONST_LOOPS, 1036 .init = powernv_cpufreq_cpu_init, 1037 .exit = powernv_cpufreq_cpu_exit, 1038 .verify = cpufreq_generic_frequency_table_verify, 1039 .target_index = powernv_cpufreq_target_index, 1040 .fast_switch = powernv_fast_switch, 1041 .get = powernv_cpufreq_get, 1042 .stop_cpu = powernv_cpufreq_stop_cpu, 1043 .attr = powernv_cpu_freq_attr, 1044 }; 1045 1046 static int init_chip_info(void) 1047 { 1048 unsigned int *chip; 1049 unsigned int cpu, i; 1050 unsigned int prev_chip_id = UINT_MAX; 1051 int ret = 0; 1052 1053 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL); 1054 if (!chip) 1055 return -ENOMEM; 1056 1057 for_each_possible_cpu(cpu) { 1058 unsigned int id = cpu_to_chip_id(cpu); 1059 1060 if (prev_chip_id != id) { 1061 prev_chip_id = id; 1062 chip[nr_chips++] = id; 1063 } 1064 } 1065 1066 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 1067 if (!chips) { 1068 ret = -ENOMEM; 1069 goto free_and_return; 1070 } 1071 1072 for (i = 0; i < nr_chips; i++) { 1073 chips[i].id = chip[i]; 1074 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i])); 1075 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 1076 for_each_cpu(cpu, &chips[i].mask) 1077 per_cpu(chip_info, cpu) = &chips[i]; 1078 } 1079 1080 free_and_return: 1081 kfree(chip); 1082 return ret; 1083 } 1084 1085 static inline void clean_chip_info(void) 1086 { 1087 int i; 1088 1089 /* flush any pending work items */ 1090 if (chips) 1091 for (i = 0; i < nr_chips; i++) 1092 cancel_work_sync(&chips[i].throttle); 1093 kfree(chips); 1094 } 1095 1096 static inline void unregister_all_notifiers(void) 1097 { 1098 opal_message_notifier_unregister(OPAL_MSG_OCC, 1099 &powernv_cpufreq_opal_nb); 1100 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 1101 } 1102 1103 static int __init powernv_cpufreq_init(void) 1104 { 1105 int rc = 0; 1106 1107 /* Don't probe on pseries (guest) platforms */ 1108 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1109 return -ENODEV; 1110 1111 /* Discover pstates from device tree and init */ 1112 rc = init_powernv_pstates(); 1113 if (rc) 1114 goto out; 1115 1116 /* Populate chip info */ 1117 rc = init_chip_info(); 1118 if (rc) 1119 goto out; 1120 1121 if (powernv_pstate_info.wof_enabled) 1122 powernv_cpufreq_driver.boost_enabled = true; 1123 else 1124 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL; 1125 1126 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 1127 if (rc) { 1128 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 1129 goto cleanup; 1130 } 1131 1132 if (powernv_pstate_info.wof_enabled) 1133 cpufreq_enable_boost_support(); 1134 1135 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 1136 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 1137 1138 return 0; 1139 cleanup: 1140 clean_chip_info(); 1141 out: 1142 pr_info("Platform driver disabled. System does not support PState control\n"); 1143 return rc; 1144 } 1145 module_init(powernv_cpufreq_init); 1146 1147 static void __exit powernv_cpufreq_exit(void) 1148 { 1149 cpufreq_unregister_driver(&powernv_cpufreq_driver); 1150 unregister_all_notifiers(); 1151 clean_chip_info(); 1152 } 1153 module_exit(powernv_cpufreq_exit); 1154 1155 MODULE_LICENSE("GPL"); 1156 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 1157