1 /* 2 * POWERNV cpufreq driver for the IBM POWER processors 3 * 4 * (C) Copyright IBM 2014 5 * 6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 */ 19 20 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 21 22 #include <linux/kernel.h> 23 #include <linux/sysfs.h> 24 #include <linux/cpumask.h> 25 #include <linux/module.h> 26 #include <linux/cpufreq.h> 27 #include <linux/smp.h> 28 #include <linux/of.h> 29 #include <linux/reboot.h> 30 #include <linux/slab.h> 31 #include <linux/cpu.h> 32 #include <trace/events/power.h> 33 34 #include <asm/cputhreads.h> 35 #include <asm/firmware.h> 36 #include <asm/reg.h> 37 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 38 #include <asm/opal.h> 39 #include <linux/timer.h> 40 41 #define POWERNV_MAX_PSTATES 256 42 #define PMSR_PSAFE_ENABLE (1UL << 30) 43 #define PMSR_SPR_EM_DISABLE (1UL << 31) 44 #define PMSR_MAX(x) ((x >> 32) & 0xFF) 45 46 #define MAX_RAMP_DOWN_TIME 5120 47 /* 48 * On an idle system we want the global pstate to ramp-down from max value to 49 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 50 * then ramp-down rapidly later on. 51 * 52 * This gives a percentage rampdown for time elapsed in milliseconds. 53 * ramp_down_percentage = ((ms * ms) >> 18) 54 * ~= 3.8 * (sec * sec) 55 * 56 * At 0 ms ramp_down_percent = 0 57 * At 5120 ms ramp_down_percent = 100 58 */ 59 #define ramp_down_percent(time) ((time * time) >> 18) 60 61 /* Interval after which the timer is queued to bring down global pstate */ 62 #define GPSTATE_TIMER_INTERVAL 2000 63 64 /** 65 * struct global_pstate_info - Per policy data structure to maintain history of 66 * global pstates 67 * @highest_lpstate_idx: The local pstate index from which we are 68 * ramping down 69 * @elapsed_time: Time in ms spent in ramping down from 70 * highest_lpstate_idx 71 * @last_sampled_time: Time from boot in ms when global pstates were 72 * last set 73 * @last_lpstate_idx, Last set value of local pstate and global 74 * last_gpstate_idx pstate in terms of cpufreq table index 75 * @timer: Is used for ramping down if cpu goes idle for 76 * a long time with global pstate held high 77 * @gpstate_lock: A spinlock to maintain synchronization between 78 * routines called by the timer handler and 79 * governer's target_index calls 80 */ 81 struct global_pstate_info { 82 int highest_lpstate_idx; 83 unsigned int elapsed_time; 84 unsigned int last_sampled_time; 85 int last_lpstate_idx; 86 int last_gpstate_idx; 87 spinlock_t gpstate_lock; 88 struct timer_list timer; 89 }; 90 91 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 92 static bool rebooting, throttled, occ_reset; 93 94 static const char * const throttle_reason[] = { 95 "No throttling", 96 "Power Cap", 97 "Processor Over Temperature", 98 "Power Supply Failure", 99 "Over Current", 100 "OCC Reset" 101 }; 102 103 enum throttle_reason_type { 104 NO_THROTTLE = 0, 105 POWERCAP, 106 CPU_OVERTEMP, 107 POWER_SUPPLY_FAILURE, 108 OVERCURRENT, 109 OCC_RESET_THROTTLE, 110 OCC_MAX_REASON 111 }; 112 113 static struct chip { 114 unsigned int id; 115 bool throttled; 116 bool restore; 117 u8 throttle_reason; 118 cpumask_t mask; 119 struct work_struct throttle; 120 int throttle_turbo; 121 int throttle_sub_turbo; 122 int reason[OCC_MAX_REASON]; 123 } *chips; 124 125 static int nr_chips; 126 static DEFINE_PER_CPU(struct chip *, chip_info); 127 128 /* 129 * Note: 130 * The set of pstates consists of contiguous integers. 131 * powernv_pstate_info stores the index of the frequency table for 132 * max, min and nominal frequencies. It also stores number of 133 * available frequencies. 134 * 135 * powernv_pstate_info.nominal indicates the index to the highest 136 * non-turbo frequency. 137 */ 138 static struct powernv_pstate_info { 139 unsigned int min; 140 unsigned int max; 141 unsigned int nominal; 142 unsigned int nr_pstates; 143 } powernv_pstate_info; 144 145 /* Use following macros for conversions between pstate_id and index */ 146 static inline int idx_to_pstate(unsigned int i) 147 { 148 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 149 pr_warn_once("index %u is out of bound\n", i); 150 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 151 } 152 153 return powernv_freqs[i].driver_data; 154 } 155 156 static inline unsigned int pstate_to_idx(int pstate) 157 { 158 int min = powernv_freqs[powernv_pstate_info.min].driver_data; 159 int max = powernv_freqs[powernv_pstate_info.max].driver_data; 160 161 if (min > 0) { 162 if (unlikely((pstate < max) || (pstate > min))) { 163 pr_warn_once("pstate %d is out of bound\n", pstate); 164 return powernv_pstate_info.nominal; 165 } 166 } else { 167 if (unlikely((pstate > max) || (pstate < min))) { 168 pr_warn_once("pstate %d is out of bound\n", pstate); 169 return powernv_pstate_info.nominal; 170 } 171 } 172 /* 173 * abs() is deliberately used so that is works with 174 * both monotonically increasing and decreasing 175 * pstate values 176 */ 177 return abs(pstate - idx_to_pstate(powernv_pstate_info.max)); 178 } 179 180 static inline void reset_gpstates(struct cpufreq_policy *policy) 181 { 182 struct global_pstate_info *gpstates = policy->driver_data; 183 184 gpstates->highest_lpstate_idx = 0; 185 gpstates->elapsed_time = 0; 186 gpstates->last_sampled_time = 0; 187 gpstates->last_lpstate_idx = 0; 188 gpstates->last_gpstate_idx = 0; 189 } 190 191 /* 192 * Initialize the freq table based on data obtained 193 * from the firmware passed via device-tree 194 */ 195 static int init_powernv_pstates(void) 196 { 197 struct device_node *power_mgt; 198 int i, nr_pstates = 0; 199 const __be32 *pstate_ids, *pstate_freqs; 200 u32 len_ids, len_freqs; 201 u32 pstate_min, pstate_max, pstate_nominal; 202 203 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 204 if (!power_mgt) { 205 pr_warn("power-mgt node not found\n"); 206 return -ENODEV; 207 } 208 209 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 210 pr_warn("ibm,pstate-min node not found\n"); 211 return -ENODEV; 212 } 213 214 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 215 pr_warn("ibm,pstate-max node not found\n"); 216 return -ENODEV; 217 } 218 219 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 220 &pstate_nominal)) { 221 pr_warn("ibm,pstate-nominal not found\n"); 222 return -ENODEV; 223 } 224 pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min, 225 pstate_nominal, pstate_max); 226 227 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 228 if (!pstate_ids) { 229 pr_warn("ibm,pstate-ids not found\n"); 230 return -ENODEV; 231 } 232 233 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 234 &len_freqs); 235 if (!pstate_freqs) { 236 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 237 return -ENODEV; 238 } 239 240 if (len_ids != len_freqs) { 241 pr_warn("Entries in ibm,pstate-ids and " 242 "ibm,pstate-frequencies-mhz does not match\n"); 243 } 244 245 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 246 if (!nr_pstates) { 247 pr_warn("No PStates found\n"); 248 return -ENODEV; 249 } 250 251 powernv_pstate_info.nr_pstates = nr_pstates; 252 pr_debug("NR PStates %d\n", nr_pstates); 253 for (i = 0; i < nr_pstates; i++) { 254 u32 id = be32_to_cpu(pstate_ids[i]); 255 u32 freq = be32_to_cpu(pstate_freqs[i]); 256 257 pr_debug("PState id %d freq %d MHz\n", id, freq); 258 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 259 powernv_freqs[i].driver_data = id; 260 261 if (id == pstate_max) 262 powernv_pstate_info.max = i; 263 else if (id == pstate_nominal) 264 powernv_pstate_info.nominal = i; 265 else if (id == pstate_min) 266 powernv_pstate_info.min = i; 267 } 268 269 /* End of list marker entry */ 270 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 271 return 0; 272 } 273 274 /* Returns the CPU frequency corresponding to the pstate_id. */ 275 static unsigned int pstate_id_to_freq(int pstate_id) 276 { 277 int i; 278 279 i = pstate_to_idx(pstate_id); 280 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 281 pr_warn("PState id %d outside of PState table, " 282 "reporting nominal id %d instead\n", 283 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 284 i = powernv_pstate_info.nominal; 285 } 286 287 return powernv_freqs[i].frequency; 288 } 289 290 /* 291 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 292 * the firmware 293 */ 294 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 295 char *buf) 296 { 297 return sprintf(buf, "%u\n", 298 powernv_freqs[powernv_pstate_info.nominal].frequency); 299 } 300 301 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 302 __ATTR_RO(cpuinfo_nominal_freq); 303 304 static struct freq_attr *powernv_cpu_freq_attr[] = { 305 &cpufreq_freq_attr_scaling_available_freqs, 306 &cpufreq_freq_attr_cpuinfo_nominal_freq, 307 NULL, 308 }; 309 310 #define throttle_attr(name, member) \ 311 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 312 { \ 313 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 314 \ 315 return sprintf(buf, "%u\n", chip->member); \ 316 } \ 317 \ 318 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 319 320 throttle_attr(unthrottle, reason[NO_THROTTLE]); 321 throttle_attr(powercap, reason[POWERCAP]); 322 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 323 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 324 throttle_attr(overcurrent, reason[OVERCURRENT]); 325 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 326 throttle_attr(turbo_stat, throttle_turbo); 327 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 328 329 static struct attribute *throttle_attrs[] = { 330 &throttle_attr_unthrottle.attr, 331 &throttle_attr_powercap.attr, 332 &throttle_attr_overtemp.attr, 333 &throttle_attr_supply_fault.attr, 334 &throttle_attr_overcurrent.attr, 335 &throttle_attr_occ_reset.attr, 336 &throttle_attr_turbo_stat.attr, 337 &throttle_attr_sub_turbo_stat.attr, 338 NULL, 339 }; 340 341 static const struct attribute_group throttle_attr_grp = { 342 .name = "throttle_stats", 343 .attrs = throttle_attrs, 344 }; 345 346 /* Helper routines */ 347 348 /* Access helpers to power mgt SPR */ 349 350 static inline unsigned long get_pmspr(unsigned long sprn) 351 { 352 switch (sprn) { 353 case SPRN_PMCR: 354 return mfspr(SPRN_PMCR); 355 356 case SPRN_PMICR: 357 return mfspr(SPRN_PMICR); 358 359 case SPRN_PMSR: 360 return mfspr(SPRN_PMSR); 361 } 362 BUG(); 363 } 364 365 static inline void set_pmspr(unsigned long sprn, unsigned long val) 366 { 367 switch (sprn) { 368 case SPRN_PMCR: 369 mtspr(SPRN_PMCR, val); 370 return; 371 372 case SPRN_PMICR: 373 mtspr(SPRN_PMICR, val); 374 return; 375 } 376 BUG(); 377 } 378 379 /* 380 * Use objects of this type to query/update 381 * pstates on a remote CPU via smp_call_function. 382 */ 383 struct powernv_smp_call_data { 384 unsigned int freq; 385 int pstate_id; 386 int gpstate_id; 387 }; 388 389 /* 390 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 391 * 392 * Called via smp_call_function. 393 * 394 * Note: The caller of the smp_call_function should pass an argument of 395 * the type 'struct powernv_smp_call_data *' along with this function. 396 * 397 * The current frequency on this CPU will be returned via 398 * ((struct powernv_smp_call_data *)arg)->freq; 399 */ 400 static void powernv_read_cpu_freq(void *arg) 401 { 402 unsigned long pmspr_val; 403 s8 local_pstate_id; 404 struct powernv_smp_call_data *freq_data = arg; 405 406 pmspr_val = get_pmspr(SPRN_PMSR); 407 408 /* 409 * The local pstate id corresponds bits 48..55 in the PMSR. 410 * Note: Watch out for the sign! 411 */ 412 local_pstate_id = (pmspr_val >> 48) & 0xFF; 413 freq_data->pstate_id = local_pstate_id; 414 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 415 416 pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n", 417 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 418 freq_data->freq); 419 } 420 421 /* 422 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 423 * firmware for CPU 'cpu'. This value is reported through the sysfs 424 * file cpuinfo_cur_freq. 425 */ 426 static unsigned int powernv_cpufreq_get(unsigned int cpu) 427 { 428 struct powernv_smp_call_data freq_data; 429 430 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 431 &freq_data, 1); 432 433 return freq_data.freq; 434 } 435 436 /* 437 * set_pstate: Sets the pstate on this CPU. 438 * 439 * This is called via an smp_call_function. 440 * 441 * The caller must ensure that freq_data is of the type 442 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 443 * on this CPU should be present in freq_data->pstate_id. 444 */ 445 static void set_pstate(void *data) 446 { 447 unsigned long val; 448 struct powernv_smp_call_data *freq_data = data; 449 unsigned long pstate_ul = freq_data->pstate_id; 450 unsigned long gpstate_ul = freq_data->gpstate_id; 451 452 val = get_pmspr(SPRN_PMCR); 453 val = val & 0x0000FFFFFFFFFFFFULL; 454 455 pstate_ul = pstate_ul & 0xFF; 456 gpstate_ul = gpstate_ul & 0xFF; 457 458 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 459 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 460 461 pr_debug("Setting cpu %d pmcr to %016lX\n", 462 raw_smp_processor_id(), val); 463 set_pmspr(SPRN_PMCR, val); 464 } 465 466 /* 467 * get_nominal_index: Returns the index corresponding to the nominal 468 * pstate in the cpufreq table 469 */ 470 static inline unsigned int get_nominal_index(void) 471 { 472 return powernv_pstate_info.nominal; 473 } 474 475 static void powernv_cpufreq_throttle_check(void *data) 476 { 477 struct chip *chip; 478 unsigned int cpu = smp_processor_id(); 479 unsigned long pmsr; 480 int pmsr_pmax; 481 unsigned int pmsr_pmax_idx; 482 483 pmsr = get_pmspr(SPRN_PMSR); 484 chip = this_cpu_read(chip_info); 485 486 /* Check for Pmax Capping */ 487 pmsr_pmax = (s8)PMSR_MAX(pmsr); 488 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 489 if (pmsr_pmax_idx != powernv_pstate_info.max) { 490 if (chip->throttled) 491 goto next; 492 chip->throttled = true; 493 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 494 pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n", 495 cpu, chip->id, pmsr_pmax, 496 idx_to_pstate(powernv_pstate_info.nominal)); 497 chip->throttle_sub_turbo++; 498 } else { 499 chip->throttle_turbo++; 500 } 501 trace_powernv_throttle(chip->id, 502 throttle_reason[chip->throttle_reason], 503 pmsr_pmax); 504 } else if (chip->throttled) { 505 chip->throttled = false; 506 trace_powernv_throttle(chip->id, 507 throttle_reason[chip->throttle_reason], 508 pmsr_pmax); 509 } 510 511 /* Check if Psafe_mode_active is set in PMSR. */ 512 next: 513 if (pmsr & PMSR_PSAFE_ENABLE) { 514 throttled = true; 515 pr_info("Pstate set to safe frequency\n"); 516 } 517 518 /* Check if SPR_EM_DISABLE is set in PMSR */ 519 if (pmsr & PMSR_SPR_EM_DISABLE) { 520 throttled = true; 521 pr_info("Frequency Control disabled from OS\n"); 522 } 523 524 if (throttled) { 525 pr_info("PMSR = %16lx\n", pmsr); 526 pr_warn("CPU Frequency could be throttled\n"); 527 } 528 } 529 530 /** 531 * calc_global_pstate - Calculate global pstate 532 * @elapsed_time: Elapsed time in milliseconds 533 * @local_pstate_idx: New local pstate 534 * @highest_lpstate_idx: pstate from which its ramping down 535 * 536 * Finds the appropriate global pstate based on the pstate from which its 537 * ramping down and the time elapsed in ramping down. It follows a quadratic 538 * equation which ensures that it reaches ramping down to pmin in 5sec. 539 */ 540 static inline int calc_global_pstate(unsigned int elapsed_time, 541 int highest_lpstate_idx, 542 int local_pstate_idx) 543 { 544 int index_diff; 545 546 /* 547 * Using ramp_down_percent we get the percentage of rampdown 548 * that we are expecting to be dropping. Difference between 549 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 550 * number of how many pstates we will drop eventually by the end of 551 * 5 seconds, then just scale it get the number pstates to be dropped. 552 */ 553 index_diff = ((int)ramp_down_percent(elapsed_time) * 554 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 555 556 /* Ensure that global pstate is >= to local pstate */ 557 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 558 return local_pstate_idx; 559 else 560 return highest_lpstate_idx + index_diff; 561 } 562 563 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 564 { 565 unsigned int timer_interval; 566 567 /* 568 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 569 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 570 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 571 * seconds of ramp down time. 572 */ 573 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 574 > MAX_RAMP_DOWN_TIME) 575 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 576 else 577 timer_interval = GPSTATE_TIMER_INTERVAL; 578 579 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 580 } 581 582 /** 583 * gpstate_timer_handler 584 * 585 * @data: pointer to cpufreq_policy on which timer was queued 586 * 587 * This handler brings down the global pstate closer to the local pstate 588 * according quadratic equation. Queues a new timer if it is still not equal 589 * to local pstate 590 */ 591 void gpstate_timer_handler(unsigned long data) 592 { 593 struct cpufreq_policy *policy = (struct cpufreq_policy *)data; 594 struct global_pstate_info *gpstates = policy->driver_data; 595 int gpstate_idx; 596 unsigned int time_diff = jiffies_to_msecs(jiffies) 597 - gpstates->last_sampled_time; 598 struct powernv_smp_call_data freq_data; 599 600 if (!spin_trylock(&gpstates->gpstate_lock)) 601 return; 602 603 gpstates->last_sampled_time += time_diff; 604 gpstates->elapsed_time += time_diff; 605 freq_data.pstate_id = idx_to_pstate(gpstates->last_lpstate_idx); 606 607 if ((gpstates->last_gpstate_idx == gpstates->last_lpstate_idx) || 608 (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME)) { 609 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 610 reset_gpstates(policy); 611 gpstates->highest_lpstate_idx = gpstate_idx; 612 } else { 613 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 614 gpstates->highest_lpstate_idx, 615 gpstates->last_lpstate_idx); 616 } 617 618 /* 619 * If local pstate is equal to global pstate, rampdown is over 620 * So timer is not required to be queued. 621 */ 622 if (gpstate_idx != gpstates->last_lpstate_idx) 623 queue_gpstate_timer(gpstates); 624 625 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 626 gpstates->last_gpstate_idx = pstate_to_idx(freq_data.gpstate_id); 627 gpstates->last_lpstate_idx = pstate_to_idx(freq_data.pstate_id); 628 629 spin_unlock(&gpstates->gpstate_lock); 630 631 /* Timer may get migrated to a different cpu on cpu hot unplug */ 632 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 633 } 634 635 /* 636 * powernv_cpufreq_target_index: Sets the frequency corresponding to 637 * the cpufreq table entry indexed by new_index on the cpus in the 638 * mask policy->cpus 639 */ 640 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 641 unsigned int new_index) 642 { 643 struct powernv_smp_call_data freq_data; 644 unsigned int cur_msec, gpstate_idx; 645 struct global_pstate_info *gpstates = policy->driver_data; 646 647 if (unlikely(rebooting) && new_index != get_nominal_index()) 648 return 0; 649 650 if (!throttled) 651 powernv_cpufreq_throttle_check(NULL); 652 653 cur_msec = jiffies_to_msecs(get_jiffies_64()); 654 655 spin_lock(&gpstates->gpstate_lock); 656 freq_data.pstate_id = idx_to_pstate(new_index); 657 658 if (!gpstates->last_sampled_time) { 659 gpstate_idx = new_index; 660 gpstates->highest_lpstate_idx = new_index; 661 goto gpstates_done; 662 } 663 664 if (gpstates->last_gpstate_idx < new_index) { 665 gpstates->elapsed_time += cur_msec - 666 gpstates->last_sampled_time; 667 668 /* 669 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 670 * we should be resetting all global pstate related data. Set it 671 * equal to local pstate to start fresh. 672 */ 673 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 674 reset_gpstates(policy); 675 gpstates->highest_lpstate_idx = new_index; 676 gpstate_idx = new_index; 677 } else { 678 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 679 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 680 gpstates->highest_lpstate_idx, 681 new_index); 682 } 683 } else { 684 reset_gpstates(policy); 685 gpstates->highest_lpstate_idx = new_index; 686 gpstate_idx = new_index; 687 } 688 689 /* 690 * If local pstate is equal to global pstate, rampdown is over 691 * So timer is not required to be queued. 692 */ 693 if (gpstate_idx != new_index) 694 queue_gpstate_timer(gpstates); 695 else 696 del_timer_sync(&gpstates->timer); 697 698 gpstates_done: 699 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 700 gpstates->last_sampled_time = cur_msec; 701 gpstates->last_gpstate_idx = gpstate_idx; 702 gpstates->last_lpstate_idx = new_index; 703 704 spin_unlock(&gpstates->gpstate_lock); 705 706 /* 707 * Use smp_call_function to send IPI and execute the 708 * mtspr on target CPU. We could do that without IPI 709 * if current CPU is within policy->cpus (core) 710 */ 711 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 712 return 0; 713 } 714 715 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 716 { 717 int base, i, ret; 718 struct kernfs_node *kn; 719 struct global_pstate_info *gpstates; 720 721 base = cpu_first_thread_sibling(policy->cpu); 722 723 for (i = 0; i < threads_per_core; i++) 724 cpumask_set_cpu(base + i, policy->cpus); 725 726 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 727 if (!kn) { 728 int ret; 729 730 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 731 if (ret) { 732 pr_info("Failed to create throttle stats directory for cpu %d\n", 733 policy->cpu); 734 return ret; 735 } 736 } else { 737 kernfs_put(kn); 738 } 739 740 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 741 if (!gpstates) 742 return -ENOMEM; 743 744 policy->driver_data = gpstates; 745 746 /* initialize timer */ 747 init_timer_pinned_deferrable(&gpstates->timer); 748 gpstates->timer.data = (unsigned long)policy; 749 gpstates->timer.function = gpstate_timer_handler; 750 gpstates->timer.expires = jiffies + 751 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 752 spin_lock_init(&gpstates->gpstate_lock); 753 ret = cpufreq_table_validate_and_show(policy, powernv_freqs); 754 755 if (ret < 0) 756 kfree(policy->driver_data); 757 758 return ret; 759 } 760 761 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 762 { 763 /* timer is deleted in cpufreq_cpu_stop() */ 764 kfree(policy->driver_data); 765 766 return 0; 767 } 768 769 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 770 unsigned long action, void *unused) 771 { 772 int cpu; 773 struct cpufreq_policy cpu_policy; 774 775 rebooting = true; 776 for_each_online_cpu(cpu) { 777 cpufreq_get_policy(&cpu_policy, cpu); 778 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index()); 779 } 780 781 return NOTIFY_DONE; 782 } 783 784 static struct notifier_block powernv_cpufreq_reboot_nb = { 785 .notifier_call = powernv_cpufreq_reboot_notifier, 786 }; 787 788 void powernv_cpufreq_work_fn(struct work_struct *work) 789 { 790 struct chip *chip = container_of(work, struct chip, throttle); 791 unsigned int cpu; 792 cpumask_t mask; 793 794 get_online_cpus(); 795 cpumask_and(&mask, &chip->mask, cpu_online_mask); 796 smp_call_function_any(&mask, 797 powernv_cpufreq_throttle_check, NULL, 0); 798 799 if (!chip->restore) 800 goto out; 801 802 chip->restore = false; 803 for_each_cpu(cpu, &mask) { 804 int index; 805 struct cpufreq_policy policy; 806 807 cpufreq_get_policy(&policy, cpu); 808 index = cpufreq_table_find_index_c(&policy, policy.cur); 809 powernv_cpufreq_target_index(&policy, index); 810 cpumask_andnot(&mask, &mask, policy.cpus); 811 } 812 out: 813 put_online_cpus(); 814 } 815 816 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 817 unsigned long msg_type, void *_msg) 818 { 819 struct opal_msg *msg = _msg; 820 struct opal_occ_msg omsg; 821 int i; 822 823 if (msg_type != OPAL_MSG_OCC) 824 return 0; 825 826 omsg.type = be64_to_cpu(msg->params[0]); 827 828 switch (omsg.type) { 829 case OCC_RESET: 830 occ_reset = true; 831 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 832 /* 833 * powernv_cpufreq_throttle_check() is called in 834 * target() callback which can detect the throttle state 835 * for governors like ondemand. 836 * But static governors will not call target() often thus 837 * report throttling here. 838 */ 839 if (!throttled) { 840 throttled = true; 841 pr_warn("CPU frequency is throttled for duration\n"); 842 } 843 844 break; 845 case OCC_LOAD: 846 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 847 break; 848 case OCC_THROTTLE: 849 omsg.chip = be64_to_cpu(msg->params[1]); 850 omsg.throttle_status = be64_to_cpu(msg->params[2]); 851 852 if (occ_reset) { 853 occ_reset = false; 854 throttled = false; 855 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 856 857 for (i = 0; i < nr_chips; i++) { 858 chips[i].restore = true; 859 schedule_work(&chips[i].throttle); 860 } 861 862 return 0; 863 } 864 865 for (i = 0; i < nr_chips; i++) 866 if (chips[i].id == omsg.chip) 867 break; 868 869 if (omsg.throttle_status >= 0 && 870 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 871 chips[i].throttle_reason = omsg.throttle_status; 872 chips[i].reason[omsg.throttle_status]++; 873 } 874 875 if (!omsg.throttle_status) 876 chips[i].restore = true; 877 878 schedule_work(&chips[i].throttle); 879 } 880 return 0; 881 } 882 883 static struct notifier_block powernv_cpufreq_opal_nb = { 884 .notifier_call = powernv_cpufreq_occ_msg, 885 .next = NULL, 886 .priority = 0, 887 }; 888 889 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy) 890 { 891 struct powernv_smp_call_data freq_data; 892 struct global_pstate_info *gpstates = policy->driver_data; 893 894 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 895 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 896 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 897 del_timer_sync(&gpstates->timer); 898 } 899 900 static struct cpufreq_driver powernv_cpufreq_driver = { 901 .name = "powernv-cpufreq", 902 .flags = CPUFREQ_CONST_LOOPS, 903 .init = powernv_cpufreq_cpu_init, 904 .exit = powernv_cpufreq_cpu_exit, 905 .verify = cpufreq_generic_frequency_table_verify, 906 .target_index = powernv_cpufreq_target_index, 907 .get = powernv_cpufreq_get, 908 .stop_cpu = powernv_cpufreq_stop_cpu, 909 .attr = powernv_cpu_freq_attr, 910 }; 911 912 static int init_chip_info(void) 913 { 914 unsigned int chip[256]; 915 unsigned int cpu, i; 916 unsigned int prev_chip_id = UINT_MAX; 917 918 for_each_possible_cpu(cpu) { 919 unsigned int id = cpu_to_chip_id(cpu); 920 921 if (prev_chip_id != id) { 922 prev_chip_id = id; 923 chip[nr_chips++] = id; 924 } 925 } 926 927 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 928 if (!chips) 929 return -ENOMEM; 930 931 for (i = 0; i < nr_chips; i++) { 932 chips[i].id = chip[i]; 933 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i])); 934 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 935 for_each_cpu(cpu, &chips[i].mask) 936 per_cpu(chip_info, cpu) = &chips[i]; 937 } 938 939 return 0; 940 } 941 942 static inline void clean_chip_info(void) 943 { 944 kfree(chips); 945 } 946 947 static inline void unregister_all_notifiers(void) 948 { 949 opal_message_notifier_unregister(OPAL_MSG_OCC, 950 &powernv_cpufreq_opal_nb); 951 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 952 } 953 954 static int __init powernv_cpufreq_init(void) 955 { 956 int rc = 0; 957 958 /* Don't probe on pseries (guest) platforms */ 959 if (!firmware_has_feature(FW_FEATURE_OPAL)) 960 return -ENODEV; 961 962 /* Discover pstates from device tree and init */ 963 rc = init_powernv_pstates(); 964 if (rc) 965 goto out; 966 967 /* Populate chip info */ 968 rc = init_chip_info(); 969 if (rc) 970 goto out; 971 972 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 973 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 974 975 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 976 if (!rc) 977 return 0; 978 979 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 980 unregister_all_notifiers(); 981 clean_chip_info(); 982 out: 983 pr_info("Platform driver disabled. System does not support PState control\n"); 984 return rc; 985 } 986 module_init(powernv_cpufreq_init); 987 988 static void __exit powernv_cpufreq_exit(void) 989 { 990 cpufreq_unregister_driver(&powernv_cpufreq_driver); 991 unregister_all_notifiers(); 992 clean_chip_info(); 993 } 994 module_exit(powernv_cpufreq_exit); 995 996 MODULE_LICENSE("GPL"); 997 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 998