1 /* 2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> 3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * TODO: Need a big cleanup here. Basically, we need to have different 10 * cpufreq_driver structures for the different type of HW instead of the 11 * current mess. We also need to better deal with the detection of the 12 * type of machine. 13 * 14 */ 15 16 #include <linux/module.h> 17 #include <linux/types.h> 18 #include <linux/errno.h> 19 #include <linux/kernel.h> 20 #include <linux/delay.h> 21 #include <linux/sched.h> 22 #include <linux/adb.h> 23 #include <linux/pmu.h> 24 #include <linux/cpufreq.h> 25 #include <linux/init.h> 26 #include <linux/device.h> 27 #include <linux/hardirq.h> 28 #include <linux/of_device.h> 29 #include <asm/prom.h> 30 #include <asm/machdep.h> 31 #include <asm/irq.h> 32 #include <asm/pmac_feature.h> 33 #include <asm/mmu_context.h> 34 #include <asm/sections.h> 35 #include <asm/cputable.h> 36 #include <asm/time.h> 37 #include <asm/mpic.h> 38 #include <asm/keylargo.h> 39 #include <asm/switch_to.h> 40 41 /* WARNING !!! This will cause calibrate_delay() to be called, 42 * but this is an __init function ! So you MUST go edit 43 * init/main.c to make it non-init before enabling DEBUG_FREQ 44 */ 45 #undef DEBUG_FREQ 46 47 extern void low_choose_7447a_dfs(int dfs); 48 extern void low_choose_750fx_pll(int pll); 49 extern void low_sleep_handler(void); 50 51 /* 52 * Currently, PowerMac cpufreq supports only high & low frequencies 53 * that are set by the firmware 54 */ 55 static unsigned int low_freq; 56 static unsigned int hi_freq; 57 static unsigned int cur_freq; 58 static unsigned int sleep_freq; 59 static unsigned long transition_latency; 60 61 /* 62 * Different models uses different mechanisms to switch the frequency 63 */ 64 static int (*set_speed_proc)(int low_speed); 65 static unsigned int (*get_speed_proc)(void); 66 67 /* 68 * Some definitions used by the various speedprocs 69 */ 70 static u32 voltage_gpio; 71 static u32 frequency_gpio; 72 static u32 slew_done_gpio; 73 static int no_schedule; 74 static int has_cpu_l2lve; 75 static int is_pmu_based; 76 77 /* There are only two frequency states for each processor. Values 78 * are in kHz for the time being. 79 */ 80 #define CPUFREQ_HIGH 0 81 #define CPUFREQ_LOW 1 82 83 static struct cpufreq_frequency_table pmac_cpu_freqs[] = { 84 {CPUFREQ_HIGH, 0}, 85 {CPUFREQ_LOW, 0}, 86 {0, CPUFREQ_TABLE_END}, 87 }; 88 89 static inline void local_delay(unsigned long ms) 90 { 91 if (no_schedule) 92 mdelay(ms); 93 else 94 msleep(ms); 95 } 96 97 #ifdef DEBUG_FREQ 98 static inline void debug_calc_bogomips(void) 99 { 100 /* This will cause a recalc of bogomips and display the 101 * result. We backup/restore the value to avoid affecting the 102 * core cpufreq framework's own calculation. 103 */ 104 unsigned long save_lpj = loops_per_jiffy; 105 calibrate_delay(); 106 loops_per_jiffy = save_lpj; 107 } 108 #endif /* DEBUG_FREQ */ 109 110 /* Switch CPU speed under 750FX CPU control 111 */ 112 static int cpu_750fx_cpu_speed(int low_speed) 113 { 114 u32 hid2; 115 116 if (low_speed == 0) { 117 /* ramping up, set voltage first */ 118 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 119 /* Make sure we sleep for at least 1ms */ 120 local_delay(10); 121 122 /* tweak L2 for high voltage */ 123 if (has_cpu_l2lve) { 124 hid2 = mfspr(SPRN_HID2); 125 hid2 &= ~0x2000; 126 mtspr(SPRN_HID2, hid2); 127 } 128 } 129 #ifdef CONFIG_6xx 130 low_choose_750fx_pll(low_speed); 131 #endif 132 if (low_speed == 1) { 133 /* tweak L2 for low voltage */ 134 if (has_cpu_l2lve) { 135 hid2 = mfspr(SPRN_HID2); 136 hid2 |= 0x2000; 137 mtspr(SPRN_HID2, hid2); 138 } 139 140 /* ramping down, set voltage last */ 141 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 142 local_delay(10); 143 } 144 145 return 0; 146 } 147 148 static unsigned int cpu_750fx_get_cpu_speed(void) 149 { 150 if (mfspr(SPRN_HID1) & HID1_PS) 151 return low_freq; 152 else 153 return hi_freq; 154 } 155 156 /* Switch CPU speed using DFS */ 157 static int dfs_set_cpu_speed(int low_speed) 158 { 159 if (low_speed == 0) { 160 /* ramping up, set voltage first */ 161 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 162 /* Make sure we sleep for at least 1ms */ 163 local_delay(1); 164 } 165 166 /* set frequency */ 167 #ifdef CONFIG_6xx 168 low_choose_7447a_dfs(low_speed); 169 #endif 170 udelay(100); 171 172 if (low_speed == 1) { 173 /* ramping down, set voltage last */ 174 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 175 local_delay(1); 176 } 177 178 return 0; 179 } 180 181 static unsigned int dfs_get_cpu_speed(void) 182 { 183 if (mfspr(SPRN_HID1) & HID1_DFS) 184 return low_freq; 185 else 186 return hi_freq; 187 } 188 189 190 /* Switch CPU speed using slewing GPIOs 191 */ 192 static int gpios_set_cpu_speed(int low_speed) 193 { 194 int gpio, timeout = 0; 195 196 /* If ramping up, set voltage first */ 197 if (low_speed == 0) { 198 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 199 /* Delay is way too big but it's ok, we schedule */ 200 local_delay(10); 201 } 202 203 /* Set frequency */ 204 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); 205 if (low_speed == ((gpio & 0x01) == 0)) 206 goto skip; 207 208 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio, 209 low_speed ? 0x04 : 0x05); 210 udelay(200); 211 do { 212 if (++timeout > 100) 213 break; 214 local_delay(1); 215 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0); 216 } while((gpio & 0x02) == 0); 217 skip: 218 /* If ramping down, set voltage last */ 219 if (low_speed == 1) { 220 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 221 /* Delay is way too big but it's ok, we schedule */ 222 local_delay(10); 223 } 224 225 #ifdef DEBUG_FREQ 226 debug_calc_bogomips(); 227 #endif 228 229 return 0; 230 } 231 232 /* Switch CPU speed under PMU control 233 */ 234 static int pmu_set_cpu_speed(int low_speed) 235 { 236 struct adb_request req; 237 unsigned long save_l2cr; 238 unsigned long save_l3cr; 239 unsigned int pic_prio; 240 unsigned long flags; 241 242 preempt_disable(); 243 244 #ifdef DEBUG_FREQ 245 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); 246 #endif 247 pmu_suspend(); 248 249 /* Disable all interrupt sources on openpic */ 250 pic_prio = mpic_cpu_get_priority(); 251 mpic_cpu_set_priority(0xf); 252 253 /* Make sure the decrementer won't interrupt us */ 254 asm volatile("mtdec %0" : : "r" (0x7fffffff)); 255 /* Make sure any pending DEC interrupt occurring while we did 256 * the above didn't re-enable the DEC */ 257 mb(); 258 asm volatile("mtdec %0" : : "r" (0x7fffffff)); 259 260 /* We can now disable MSR_EE */ 261 local_irq_save(flags); 262 263 /* Giveup the FPU & vec */ 264 enable_kernel_fp(); 265 266 #ifdef CONFIG_ALTIVEC 267 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 268 enable_kernel_altivec(); 269 #endif /* CONFIG_ALTIVEC */ 270 271 /* Save & disable L2 and L3 caches */ 272 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ 273 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 274 275 /* Send the new speed command. My assumption is that this command 276 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep 277 */ 278 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed); 279 while (!req.complete) 280 pmu_poll(); 281 282 /* Prepare the northbridge for the speed transition */ 283 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1); 284 285 /* Call low level code to backup CPU state and recover from 286 * hardware reset 287 */ 288 low_sleep_handler(); 289 290 /* Restore the northbridge */ 291 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0); 292 293 /* Restore L2 cache */ 294 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 295 _set_L2CR(save_l2cr); 296 /* Restore L3 cache */ 297 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) 298 _set_L3CR(save_l3cr); 299 300 /* Restore userland MMU context */ 301 switch_mmu_context(NULL, current->active_mm); 302 303 #ifdef DEBUG_FREQ 304 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); 305 #endif 306 307 /* Restore low level PMU operations */ 308 pmu_unlock(); 309 310 /* 311 * Restore decrementer; we'll take a decrementer interrupt 312 * as soon as interrupts are re-enabled and the generic 313 * clockevents code will reprogram it with the right value. 314 */ 315 set_dec(1); 316 317 /* Restore interrupts */ 318 mpic_cpu_set_priority(pic_prio); 319 320 /* Let interrupts flow again ... */ 321 local_irq_restore(flags); 322 323 #ifdef DEBUG_FREQ 324 debug_calc_bogomips(); 325 #endif 326 327 pmu_resume(); 328 329 preempt_enable(); 330 331 return 0; 332 } 333 334 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode, 335 int notify) 336 { 337 struct cpufreq_freqs freqs; 338 unsigned long l3cr; 339 static unsigned long prev_l3cr; 340 341 freqs.old = cur_freq; 342 freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; 343 344 if (freqs.old == freqs.new) 345 return 0; 346 347 if (notify) 348 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 349 if (speed_mode == CPUFREQ_LOW && 350 cpu_has_feature(CPU_FTR_L3CR)) { 351 l3cr = _get_L3CR(); 352 if (l3cr & L3CR_L3E) { 353 prev_l3cr = l3cr; 354 _set_L3CR(0); 355 } 356 } 357 set_speed_proc(speed_mode == CPUFREQ_LOW); 358 if (speed_mode == CPUFREQ_HIGH && 359 cpu_has_feature(CPU_FTR_L3CR)) { 360 l3cr = _get_L3CR(); 361 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr) 362 _set_L3CR(prev_l3cr); 363 } 364 if (notify) 365 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 366 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; 367 368 return 0; 369 } 370 371 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu) 372 { 373 return cur_freq; 374 } 375 376 static int pmac_cpufreq_target( struct cpufreq_policy *policy, 377 unsigned int target_freq, 378 unsigned int relation) 379 { 380 unsigned int newstate = 0; 381 int rc; 382 383 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs, 384 target_freq, relation, &newstate)) 385 return -EINVAL; 386 387 rc = do_set_cpu_speed(policy, newstate, 1); 388 389 ppc_proc_freq = cur_freq * 1000ul; 390 return rc; 391 } 392 393 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 394 { 395 return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency); 396 } 397 398 static u32 read_gpio(struct device_node *np) 399 { 400 const u32 *reg = of_get_property(np, "reg", NULL); 401 u32 offset; 402 403 if (reg == NULL) 404 return 0; 405 /* That works for all keylargos but shall be fixed properly 406 * some day... The problem is that it seems we can't rely 407 * on the "reg" property of the GPIO nodes, they are either 408 * relative to the base of KeyLargo or to the base of the 409 * GPIO space, and the device-tree doesn't help. 410 */ 411 offset = *reg; 412 if (offset < KEYLARGO_GPIO_LEVELS0) 413 offset += KEYLARGO_GPIO_LEVELS0; 414 return offset; 415 } 416 417 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy) 418 { 419 /* Ok, this could be made a bit smarter, but let's be robust for now. We 420 * always force a speed change to high speed before sleep, to make sure 421 * we have appropriate voltage and/or bus speed for the wakeup process, 422 * and to make sure our loops_per_jiffies are "good enough", that is will 423 * not cause too short delays if we sleep in low speed and wake in high 424 * speed.. 425 */ 426 no_schedule = 1; 427 sleep_freq = cur_freq; 428 if (cur_freq == low_freq && !is_pmu_based) 429 do_set_cpu_speed(policy, CPUFREQ_HIGH, 0); 430 return 0; 431 } 432 433 static int pmac_cpufreq_resume(struct cpufreq_policy *policy) 434 { 435 /* If we resume, first check if we have a get() function */ 436 if (get_speed_proc) 437 cur_freq = get_speed_proc(); 438 else 439 cur_freq = 0; 440 441 /* We don't, hrm... we don't really know our speed here, best 442 * is that we force a switch to whatever it was, which is 443 * probably high speed due to our suspend() routine 444 */ 445 do_set_cpu_speed(policy, sleep_freq == low_freq ? 446 CPUFREQ_LOW : CPUFREQ_HIGH, 0); 447 448 ppc_proc_freq = cur_freq * 1000ul; 449 450 no_schedule = 0; 451 return 0; 452 } 453 454 static struct cpufreq_driver pmac_cpufreq_driver = { 455 .verify = cpufreq_generic_frequency_table_verify, 456 .target = pmac_cpufreq_target, 457 .get = pmac_cpufreq_get_speed, 458 .init = pmac_cpufreq_cpu_init, 459 .suspend = pmac_cpufreq_suspend, 460 .resume = pmac_cpufreq_resume, 461 .flags = CPUFREQ_PM_NO_WARN, 462 .attr = cpufreq_generic_attr, 463 .name = "powermac", 464 }; 465 466 467 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) 468 { 469 struct device_node *volt_gpio_np = of_find_node_by_name(NULL, 470 "voltage-gpio"); 471 struct device_node *freq_gpio_np = of_find_node_by_name(NULL, 472 "frequency-gpio"); 473 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL, 474 "slewing-done"); 475 const u32 *value; 476 477 /* 478 * Check to see if it's GPIO driven or PMU only 479 * 480 * The way we extract the GPIO address is slightly hackish, but it 481 * works well enough for now. We need to abstract the whole GPIO 482 * stuff sooner or later anyway 483 */ 484 485 if (volt_gpio_np) 486 voltage_gpio = read_gpio(volt_gpio_np); 487 if (freq_gpio_np) 488 frequency_gpio = read_gpio(freq_gpio_np); 489 if (slew_done_gpio_np) 490 slew_done_gpio = read_gpio(slew_done_gpio_np); 491 492 /* If we use the frequency GPIOs, calculate the min/max speeds based 493 * on the bus frequencies 494 */ 495 if (frequency_gpio && slew_done_gpio) { 496 int lenp, rc; 497 const u32 *freqs, *ratio; 498 499 freqs = of_get_property(cpunode, "bus-frequencies", &lenp); 500 lenp /= sizeof(u32); 501 if (freqs == NULL || lenp != 2) { 502 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n"); 503 return 1; 504 } 505 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2", 506 NULL); 507 if (ratio == NULL) { 508 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n"); 509 return 1; 510 } 511 512 /* Get the min/max bus frequencies */ 513 low_freq = min(freqs[0], freqs[1]); 514 hi_freq = max(freqs[0], freqs[1]); 515 516 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus 517 * frequency, it claims it to be around 84Mhz on some models while 518 * it appears to be approx. 101Mhz on all. Let's hack around here... 519 * fortunately, we don't need to be too precise 520 */ 521 if (low_freq < 98000000) 522 low_freq = 101000000; 523 524 /* Convert those to CPU core clocks */ 525 low_freq = (low_freq * (*ratio)) / 2000; 526 hi_freq = (hi_freq * (*ratio)) / 2000; 527 528 /* Now we get the frequencies, we read the GPIO to see what is out current 529 * speed 530 */ 531 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); 532 cur_freq = (rc & 0x01) ? hi_freq : low_freq; 533 534 set_speed_proc = gpios_set_cpu_speed; 535 return 1; 536 } 537 538 /* If we use the PMU, look for the min & max frequencies in the 539 * device-tree 540 */ 541 value = of_get_property(cpunode, "min-clock-frequency", NULL); 542 if (!value) 543 return 1; 544 low_freq = (*value) / 1000; 545 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree 546 * here */ 547 if (low_freq < 100000) 548 low_freq *= 10; 549 550 value = of_get_property(cpunode, "max-clock-frequency", NULL); 551 if (!value) 552 return 1; 553 hi_freq = (*value) / 1000; 554 set_speed_proc = pmu_set_cpu_speed; 555 is_pmu_based = 1; 556 557 return 0; 558 } 559 560 static int pmac_cpufreq_init_7447A(struct device_node *cpunode) 561 { 562 struct device_node *volt_gpio_np; 563 564 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) 565 return 1; 566 567 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); 568 if (volt_gpio_np) 569 voltage_gpio = read_gpio(volt_gpio_np); 570 if (!voltage_gpio){ 571 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n"); 572 return 1; 573 } 574 575 /* OF only reports the high frequency */ 576 hi_freq = cur_freq; 577 low_freq = cur_freq/2; 578 579 /* Read actual frequency from CPU */ 580 cur_freq = dfs_get_cpu_speed(); 581 set_speed_proc = dfs_set_cpu_speed; 582 get_speed_proc = dfs_get_cpu_speed; 583 584 return 0; 585 } 586 587 static int pmac_cpufreq_init_750FX(struct device_node *cpunode) 588 { 589 struct device_node *volt_gpio_np; 590 u32 pvr; 591 const u32 *value; 592 593 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) 594 return 1; 595 596 hi_freq = cur_freq; 597 value = of_get_property(cpunode, "reduced-clock-frequency", NULL); 598 if (!value) 599 return 1; 600 low_freq = (*value) / 1000; 601 602 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); 603 if (volt_gpio_np) 604 voltage_gpio = read_gpio(volt_gpio_np); 605 606 pvr = mfspr(SPRN_PVR); 607 has_cpu_l2lve = !((pvr & 0xf00) == 0x100); 608 609 set_speed_proc = cpu_750fx_cpu_speed; 610 get_speed_proc = cpu_750fx_get_cpu_speed; 611 cur_freq = cpu_750fx_get_cpu_speed(); 612 613 return 0; 614 } 615 616 /* Currently, we support the following machines: 617 * 618 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz) 619 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz) 620 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz) 621 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz) 622 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz) 623 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage) 624 * - Recent MacRISC3 laptops 625 * - All new machines with 7447A CPUs 626 */ 627 static int __init pmac_cpufreq_setup(void) 628 { 629 struct device_node *cpunode; 630 const u32 *value; 631 632 if (strstr(cmd_line, "nocpufreq")) 633 return 0; 634 635 /* Get first CPU node */ 636 cpunode = of_cpu_device_node_get(0); 637 if (!cpunode) 638 goto out; 639 640 /* Get current cpu clock freq */ 641 value = of_get_property(cpunode, "clock-frequency", NULL); 642 if (!value) 643 goto out; 644 cur_freq = (*value) / 1000; 645 transition_latency = CPUFREQ_ETERNAL; 646 647 /* Check for 7447A based MacRISC3 */ 648 if (of_machine_is_compatible("MacRISC3") && 649 of_get_property(cpunode, "dynamic-power-step", NULL) && 650 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { 651 pmac_cpufreq_init_7447A(cpunode); 652 transition_latency = 8000000; 653 /* Check for other MacRISC3 machines */ 654 } else if (of_machine_is_compatible("PowerBook3,4") || 655 of_machine_is_compatible("PowerBook3,5") || 656 of_machine_is_compatible("MacRISC3")) { 657 pmac_cpufreq_init_MacRISC3(cpunode); 658 /* Else check for iBook2 500/600 */ 659 } else if (of_machine_is_compatible("PowerBook4,1")) { 660 hi_freq = cur_freq; 661 low_freq = 400000; 662 set_speed_proc = pmu_set_cpu_speed; 663 is_pmu_based = 1; 664 } 665 /* Else check for TiPb 550 */ 666 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { 667 hi_freq = cur_freq; 668 low_freq = 500000; 669 set_speed_proc = pmu_set_cpu_speed; 670 is_pmu_based = 1; 671 } 672 /* Else check for TiPb 400 & 500 */ 673 else if (of_machine_is_compatible("PowerBook3,2")) { 674 /* We only know about the 400 MHz and the 500Mhz model 675 * they both have 300 MHz as low frequency 676 */ 677 if (cur_freq < 350000 || cur_freq > 550000) 678 goto out; 679 hi_freq = cur_freq; 680 low_freq = 300000; 681 set_speed_proc = pmu_set_cpu_speed; 682 is_pmu_based = 1; 683 } 684 /* Else check for 750FX */ 685 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000) 686 pmac_cpufreq_init_750FX(cpunode); 687 out: 688 of_node_put(cpunode); 689 if (set_speed_proc == NULL) 690 return -ENODEV; 691 692 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq; 693 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq; 694 ppc_proc_freq = cur_freq * 1000ul; 695 696 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n"); 697 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n", 698 low_freq/1000, hi_freq/1000, cur_freq/1000); 699 700 return cpufreq_register_driver(&pmac_cpufreq_driver); 701 } 702 703 module_init(pmac_cpufreq_setup); 704 705