1 /* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/kernel_stat.h> 15 #include <linux/module.h> 16 #include <linux/ktime.h> 17 #include <linux/hrtimer.h> 18 #include <linux/tick.h> 19 #include <linux/slab.h> 20 #include <linux/sched.h> 21 #include <linux/list.h> 22 #include <linux/cpu.h> 23 #include <linux/cpufreq.h> 24 #include <linux/sysfs.h> 25 #include <linux/types.h> 26 #include <linux/fs.h> 27 #include <linux/debugfs.h> 28 #include <linux/acpi.h> 29 #include <trace/events/power.h> 30 31 #include <asm/div64.h> 32 #include <asm/msr.h> 33 #include <asm/cpu_device_id.h> 34 35 #define BYT_RATIOS 0x66a 36 #define BYT_VIDS 0x66b 37 #define BYT_TURBO_RATIOS 0x66c 38 #define BYT_TURBO_VIDS 0x66d 39 40 41 #define FRAC_BITS 8 42 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 43 #define fp_toint(X) ((X) >> FRAC_BITS) 44 45 46 static inline int32_t mul_fp(int32_t x, int32_t y) 47 { 48 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 49 } 50 51 static inline int32_t div_fp(int32_t x, int32_t y) 52 { 53 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); 54 } 55 56 struct sample { 57 int32_t core_pct_busy; 58 u64 aperf; 59 u64 mperf; 60 int freq; 61 ktime_t time; 62 }; 63 64 struct pstate_data { 65 int current_pstate; 66 int min_pstate; 67 int max_pstate; 68 int turbo_pstate; 69 }; 70 71 struct vid_data { 72 int min; 73 int max; 74 int turbo; 75 int32_t ratio; 76 }; 77 78 struct _pid { 79 int setpoint; 80 int32_t integral; 81 int32_t p_gain; 82 int32_t i_gain; 83 int32_t d_gain; 84 int deadband; 85 int32_t last_err; 86 }; 87 88 struct cpudata { 89 int cpu; 90 91 struct timer_list timer; 92 93 struct pstate_data pstate; 94 struct vid_data vid; 95 struct _pid pid; 96 97 ktime_t last_sample_time; 98 u64 prev_aperf; 99 u64 prev_mperf; 100 struct sample sample; 101 }; 102 103 static struct cpudata **all_cpu_data; 104 struct pstate_adjust_policy { 105 int sample_rate_ms; 106 int deadband; 107 int setpoint; 108 int p_gain_pct; 109 int d_gain_pct; 110 int i_gain_pct; 111 }; 112 113 struct pstate_funcs { 114 int (*get_max)(void); 115 int (*get_min)(void); 116 int (*get_turbo)(void); 117 void (*set)(struct cpudata*, int pstate); 118 void (*get_vid)(struct cpudata *); 119 }; 120 121 struct cpu_defaults { 122 struct pstate_adjust_policy pid_policy; 123 struct pstate_funcs funcs; 124 }; 125 126 static struct pstate_adjust_policy pid_params; 127 static struct pstate_funcs pstate_funcs; 128 129 struct perf_limits { 130 int no_turbo; 131 int max_perf_pct; 132 int min_perf_pct; 133 int32_t max_perf; 134 int32_t min_perf; 135 int max_policy_pct; 136 int max_sysfs_pct; 137 }; 138 139 static struct perf_limits limits = { 140 .no_turbo = 0, 141 .max_perf_pct = 100, 142 .max_perf = int_tofp(1), 143 .min_perf_pct = 0, 144 .min_perf = 0, 145 .max_policy_pct = 100, 146 .max_sysfs_pct = 100, 147 }; 148 149 static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 150 int deadband, int integral) { 151 pid->setpoint = setpoint; 152 pid->deadband = deadband; 153 pid->integral = int_tofp(integral); 154 pid->last_err = int_tofp(setpoint) - int_tofp(busy); 155 } 156 157 static inline void pid_p_gain_set(struct _pid *pid, int percent) 158 { 159 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 160 } 161 162 static inline void pid_i_gain_set(struct _pid *pid, int percent) 163 { 164 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 165 } 166 167 static inline void pid_d_gain_set(struct _pid *pid, int percent) 168 { 169 170 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 171 } 172 173 static signed int pid_calc(struct _pid *pid, int32_t busy) 174 { 175 signed int result; 176 int32_t pterm, dterm, fp_error; 177 int32_t integral_limit; 178 179 fp_error = int_tofp(pid->setpoint) - busy; 180 181 if (abs(fp_error) <= int_tofp(pid->deadband)) 182 return 0; 183 184 pterm = mul_fp(pid->p_gain, fp_error); 185 186 pid->integral += fp_error; 187 188 /* limit the integral term */ 189 integral_limit = int_tofp(30); 190 if (pid->integral > integral_limit) 191 pid->integral = integral_limit; 192 if (pid->integral < -integral_limit) 193 pid->integral = -integral_limit; 194 195 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 196 pid->last_err = fp_error; 197 198 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 199 result = result + (1 << (FRAC_BITS-1)); 200 return (signed int)fp_toint(result); 201 } 202 203 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 204 { 205 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 206 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 207 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 208 209 pid_reset(&cpu->pid, 210 pid_params.setpoint, 211 100, 212 pid_params.deadband, 213 0); 214 } 215 216 static inline void intel_pstate_reset_all_pid(void) 217 { 218 unsigned int cpu; 219 for_each_online_cpu(cpu) { 220 if (all_cpu_data[cpu]) 221 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 222 } 223 } 224 225 /************************** debugfs begin ************************/ 226 static int pid_param_set(void *data, u64 val) 227 { 228 *(u32 *)data = val; 229 intel_pstate_reset_all_pid(); 230 return 0; 231 } 232 static int pid_param_get(void *data, u64 *val) 233 { 234 *val = *(u32 *)data; 235 return 0; 236 } 237 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, 238 pid_param_set, "%llu\n"); 239 240 struct pid_param { 241 char *name; 242 void *value; 243 }; 244 245 static struct pid_param pid_files[] = { 246 {"sample_rate_ms", &pid_params.sample_rate_ms}, 247 {"d_gain_pct", &pid_params.d_gain_pct}, 248 {"i_gain_pct", &pid_params.i_gain_pct}, 249 {"deadband", &pid_params.deadband}, 250 {"setpoint", &pid_params.setpoint}, 251 {"p_gain_pct", &pid_params.p_gain_pct}, 252 {NULL, NULL} 253 }; 254 255 static struct dentry *debugfs_parent; 256 static void intel_pstate_debug_expose_params(void) 257 { 258 int i = 0; 259 260 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 261 if (IS_ERR_OR_NULL(debugfs_parent)) 262 return; 263 while (pid_files[i].name) { 264 debugfs_create_file(pid_files[i].name, 0660, 265 debugfs_parent, pid_files[i].value, 266 &fops_pid_param); 267 i++; 268 } 269 } 270 271 /************************** debugfs end ************************/ 272 273 /************************** sysfs begin ************************/ 274 #define show_one(file_name, object) \ 275 static ssize_t show_##file_name \ 276 (struct kobject *kobj, struct attribute *attr, char *buf) \ 277 { \ 278 return sprintf(buf, "%u\n", limits.object); \ 279 } 280 281 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 282 const char *buf, size_t count) 283 { 284 unsigned int input; 285 int ret; 286 ret = sscanf(buf, "%u", &input); 287 if (ret != 1) 288 return -EINVAL; 289 limits.no_turbo = clamp_t(int, input, 0 , 1); 290 291 return count; 292 } 293 294 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 295 const char *buf, size_t count) 296 { 297 unsigned int input; 298 int ret; 299 ret = sscanf(buf, "%u", &input); 300 if (ret != 1) 301 return -EINVAL; 302 303 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 304 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 305 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 306 return count; 307 } 308 309 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 310 const char *buf, size_t count) 311 { 312 unsigned int input; 313 int ret; 314 ret = sscanf(buf, "%u", &input); 315 if (ret != 1) 316 return -EINVAL; 317 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 318 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 319 320 return count; 321 } 322 323 show_one(no_turbo, no_turbo); 324 show_one(max_perf_pct, max_perf_pct); 325 show_one(min_perf_pct, min_perf_pct); 326 327 define_one_global_rw(no_turbo); 328 define_one_global_rw(max_perf_pct); 329 define_one_global_rw(min_perf_pct); 330 331 static struct attribute *intel_pstate_attributes[] = { 332 &no_turbo.attr, 333 &max_perf_pct.attr, 334 &min_perf_pct.attr, 335 NULL 336 }; 337 338 static struct attribute_group intel_pstate_attr_group = { 339 .attrs = intel_pstate_attributes, 340 }; 341 static struct kobject *intel_pstate_kobject; 342 343 static void intel_pstate_sysfs_expose_params(void) 344 { 345 int rc; 346 347 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 348 &cpu_subsys.dev_root->kobj); 349 BUG_ON(!intel_pstate_kobject); 350 rc = sysfs_create_group(intel_pstate_kobject, 351 &intel_pstate_attr_group); 352 BUG_ON(rc); 353 } 354 355 /************************** sysfs end ************************/ 356 static int byt_get_min_pstate(void) 357 { 358 u64 value; 359 rdmsrl(BYT_RATIOS, value); 360 return (value >> 8) & 0x3F; 361 } 362 363 static int byt_get_max_pstate(void) 364 { 365 u64 value; 366 rdmsrl(BYT_RATIOS, value); 367 return (value >> 16) & 0x3F; 368 } 369 370 static int byt_get_turbo_pstate(void) 371 { 372 u64 value; 373 rdmsrl(BYT_TURBO_RATIOS, value); 374 return value & 0x3F; 375 } 376 377 static void byt_set_pstate(struct cpudata *cpudata, int pstate) 378 { 379 u64 val; 380 int32_t vid_fp; 381 u32 vid; 382 383 val = pstate << 8; 384 if (limits.no_turbo) 385 val |= (u64)1 << 32; 386 387 vid_fp = cpudata->vid.min + mul_fp( 388 int_tofp(pstate - cpudata->pstate.min_pstate), 389 cpudata->vid.ratio); 390 391 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 392 vid = fp_toint(vid_fp); 393 394 if (pstate > cpudata->pstate.max_pstate) 395 vid = cpudata->vid.turbo; 396 397 val |= vid; 398 399 wrmsrl(MSR_IA32_PERF_CTL, val); 400 } 401 402 static void byt_get_vid(struct cpudata *cpudata) 403 { 404 u64 value; 405 406 407 rdmsrl(BYT_VIDS, value); 408 cpudata->vid.min = int_tofp((value >> 8) & 0x3f); 409 cpudata->vid.max = int_tofp((value >> 16) & 0x3f); 410 cpudata->vid.ratio = div_fp( 411 cpudata->vid.max - cpudata->vid.min, 412 int_tofp(cpudata->pstate.max_pstate - 413 cpudata->pstate.min_pstate)); 414 415 rdmsrl(BYT_TURBO_VIDS, value); 416 cpudata->vid.turbo = value & 0x7f; 417 } 418 419 420 static int core_get_min_pstate(void) 421 { 422 u64 value; 423 rdmsrl(MSR_PLATFORM_INFO, value); 424 return (value >> 40) & 0xFF; 425 } 426 427 static int core_get_max_pstate(void) 428 { 429 u64 value; 430 rdmsrl(MSR_PLATFORM_INFO, value); 431 return (value >> 8) & 0xFF; 432 } 433 434 static int core_get_turbo_pstate(void) 435 { 436 u64 value; 437 int nont, ret; 438 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 439 nont = core_get_max_pstate(); 440 ret = ((value) & 255); 441 if (ret <= nont) 442 ret = nont; 443 return ret; 444 } 445 446 static void core_set_pstate(struct cpudata *cpudata, int pstate) 447 { 448 u64 val; 449 450 val = pstate << 8; 451 if (limits.no_turbo) 452 val |= (u64)1 << 32; 453 454 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); 455 } 456 457 static struct cpu_defaults core_params = { 458 .pid_policy = { 459 .sample_rate_ms = 10, 460 .deadband = 0, 461 .setpoint = 97, 462 .p_gain_pct = 20, 463 .d_gain_pct = 0, 464 .i_gain_pct = 0, 465 }, 466 .funcs = { 467 .get_max = core_get_max_pstate, 468 .get_min = core_get_min_pstate, 469 .get_turbo = core_get_turbo_pstate, 470 .set = core_set_pstate, 471 }, 472 }; 473 474 static struct cpu_defaults byt_params = { 475 .pid_policy = { 476 .sample_rate_ms = 10, 477 .deadband = 0, 478 .setpoint = 97, 479 .p_gain_pct = 14, 480 .d_gain_pct = 0, 481 .i_gain_pct = 4, 482 }, 483 .funcs = { 484 .get_max = byt_get_max_pstate, 485 .get_min = byt_get_min_pstate, 486 .get_turbo = byt_get_turbo_pstate, 487 .set = byt_set_pstate, 488 .get_vid = byt_get_vid, 489 }, 490 }; 491 492 493 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 494 { 495 int max_perf = cpu->pstate.turbo_pstate; 496 int max_perf_adj; 497 int min_perf; 498 if (limits.no_turbo) 499 max_perf = cpu->pstate.max_pstate; 500 501 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 502 *max = clamp_t(int, max_perf_adj, 503 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 504 505 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 506 *min = clamp_t(int, min_perf, 507 cpu->pstate.min_pstate, max_perf); 508 } 509 510 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 511 { 512 int max_perf, min_perf; 513 514 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 515 516 pstate = clamp_t(int, pstate, min_perf, max_perf); 517 518 if (pstate == cpu->pstate.current_pstate) 519 return; 520 521 trace_cpu_frequency(pstate * 100000, cpu->cpu); 522 523 cpu->pstate.current_pstate = pstate; 524 525 pstate_funcs.set(cpu, pstate); 526 } 527 528 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 529 { 530 int target; 531 target = cpu->pstate.current_pstate + steps; 532 533 intel_pstate_set_pstate(cpu, target); 534 } 535 536 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 537 { 538 int target; 539 target = cpu->pstate.current_pstate - steps; 540 intel_pstate_set_pstate(cpu, target); 541 } 542 543 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 544 { 545 cpu->pstate.min_pstate = pstate_funcs.get_min(); 546 cpu->pstate.max_pstate = pstate_funcs.get_max(); 547 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 548 549 if (pstate_funcs.get_vid) 550 pstate_funcs.get_vid(cpu); 551 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 552 } 553 554 static inline void intel_pstate_calc_busy(struct cpudata *cpu) 555 { 556 struct sample *sample = &cpu->sample; 557 int64_t core_pct; 558 int32_t rem; 559 560 core_pct = int_tofp(sample->aperf) * int_tofp(100); 561 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem); 562 563 if ((rem << 1) >= int_tofp(sample->mperf)) 564 core_pct += 1; 565 566 sample->freq = fp_toint( 567 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct)); 568 569 sample->core_pct_busy = (int32_t)core_pct; 570 } 571 572 static inline void intel_pstate_sample(struct cpudata *cpu) 573 { 574 u64 aperf, mperf; 575 576 rdmsrl(MSR_IA32_APERF, aperf); 577 rdmsrl(MSR_IA32_MPERF, mperf); 578 579 aperf = aperf >> FRAC_BITS; 580 mperf = mperf >> FRAC_BITS; 581 582 cpu->last_sample_time = cpu->sample.time; 583 cpu->sample.time = ktime_get(); 584 cpu->sample.aperf = aperf; 585 cpu->sample.mperf = mperf; 586 cpu->sample.aperf -= cpu->prev_aperf; 587 cpu->sample.mperf -= cpu->prev_mperf; 588 589 intel_pstate_calc_busy(cpu); 590 591 cpu->prev_aperf = aperf; 592 cpu->prev_mperf = mperf; 593 } 594 595 static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 596 { 597 int sample_time, delay; 598 599 sample_time = pid_params.sample_rate_ms; 600 delay = msecs_to_jiffies(sample_time); 601 mod_timer_pinned(&cpu->timer, jiffies + delay); 602 } 603 604 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 605 { 606 int32_t core_busy, max_pstate, current_pstate, sample_ratio; 607 u32 duration_us; 608 u32 sample_time; 609 610 core_busy = cpu->sample.core_pct_busy; 611 max_pstate = int_tofp(cpu->pstate.max_pstate); 612 current_pstate = int_tofp(cpu->pstate.current_pstate); 613 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 614 615 sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC); 616 duration_us = (u32) ktime_us_delta(cpu->sample.time, 617 cpu->last_sample_time); 618 if (duration_us > sample_time * 3) { 619 sample_ratio = div_fp(int_tofp(sample_time), 620 int_tofp(duration_us)); 621 core_busy = mul_fp(core_busy, sample_ratio); 622 } 623 624 return core_busy; 625 } 626 627 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 628 { 629 int32_t busy_scaled; 630 struct _pid *pid; 631 signed int ctl = 0; 632 int steps; 633 634 pid = &cpu->pid; 635 busy_scaled = intel_pstate_get_scaled_busy(cpu); 636 637 ctl = pid_calc(pid, busy_scaled); 638 639 steps = abs(ctl); 640 641 if (ctl < 0) 642 intel_pstate_pstate_increase(cpu, steps); 643 else 644 intel_pstate_pstate_decrease(cpu, steps); 645 } 646 647 static void intel_pstate_timer_func(unsigned long __data) 648 { 649 struct cpudata *cpu = (struct cpudata *) __data; 650 struct sample *sample; 651 652 intel_pstate_sample(cpu); 653 654 sample = &cpu->sample; 655 656 intel_pstate_adjust_busy_pstate(cpu); 657 658 trace_pstate_sample(fp_toint(sample->core_pct_busy), 659 fp_toint(intel_pstate_get_scaled_busy(cpu)), 660 cpu->pstate.current_pstate, 661 sample->mperf, 662 sample->aperf, 663 sample->freq); 664 665 intel_pstate_set_sample_time(cpu); 666 } 667 668 #define ICPU(model, policy) \ 669 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 670 (unsigned long)&policy } 671 672 static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 673 ICPU(0x2a, core_params), 674 ICPU(0x2d, core_params), 675 ICPU(0x37, byt_params), 676 ICPU(0x3a, core_params), 677 ICPU(0x3c, core_params), 678 ICPU(0x3d, core_params), 679 ICPU(0x3e, core_params), 680 ICPU(0x3f, core_params), 681 ICPU(0x45, core_params), 682 ICPU(0x46, core_params), 683 ICPU(0x4f, core_params), 684 ICPU(0x56, core_params), 685 {} 686 }; 687 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 688 689 static int intel_pstate_init_cpu(unsigned int cpunum) 690 { 691 struct cpudata *cpu; 692 693 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 694 if (!all_cpu_data[cpunum]) 695 return -ENOMEM; 696 697 cpu = all_cpu_data[cpunum]; 698 699 intel_pstate_get_cpu_pstates(cpu); 700 701 cpu->cpu = cpunum; 702 703 init_timer_deferrable(&cpu->timer); 704 cpu->timer.function = intel_pstate_timer_func; 705 cpu->timer.data = 706 (unsigned long)cpu; 707 cpu->timer.expires = jiffies + HZ/100; 708 intel_pstate_busy_pid_reset(cpu); 709 intel_pstate_sample(cpu); 710 711 add_timer_on(&cpu->timer, cpunum); 712 713 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 714 715 return 0; 716 } 717 718 static unsigned int intel_pstate_get(unsigned int cpu_num) 719 { 720 struct sample *sample; 721 struct cpudata *cpu; 722 723 cpu = all_cpu_data[cpu_num]; 724 if (!cpu) 725 return 0; 726 sample = &cpu->sample; 727 return sample->freq; 728 } 729 730 static int intel_pstate_set_policy(struct cpufreq_policy *policy) 731 { 732 struct cpudata *cpu; 733 734 cpu = all_cpu_data[policy->cpu]; 735 736 if (!policy->cpuinfo.max_freq) 737 return -ENODEV; 738 739 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 740 limits.min_perf_pct = 100; 741 limits.min_perf = int_tofp(1); 742 limits.max_perf_pct = 100; 743 limits.max_perf = int_tofp(1); 744 limits.no_turbo = 0; 745 return 0; 746 } 747 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 748 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 749 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 750 751 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; 752 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 753 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 754 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 755 756 return 0; 757 } 758 759 static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 760 { 761 cpufreq_verify_within_cpu_limits(policy); 762 763 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && 764 (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) 765 return -EINVAL; 766 767 return 0; 768 } 769 770 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) 771 { 772 int cpu_num = policy->cpu; 773 struct cpudata *cpu = all_cpu_data[cpu_num]; 774 775 pr_info("intel_pstate CPU %d exiting\n", cpu_num); 776 777 del_timer_sync(&all_cpu_data[cpu_num]->timer); 778 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 779 kfree(all_cpu_data[cpu_num]); 780 all_cpu_data[cpu_num] = NULL; 781 } 782 783 static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 784 { 785 struct cpudata *cpu; 786 int rc; 787 788 rc = intel_pstate_init_cpu(policy->cpu); 789 if (rc) 790 return rc; 791 792 cpu = all_cpu_data[policy->cpu]; 793 794 if (!limits.no_turbo && 795 limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 796 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 797 else 798 policy->policy = CPUFREQ_POLICY_POWERSAVE; 799 800 policy->min = cpu->pstate.min_pstate * 100000; 801 policy->max = cpu->pstate.turbo_pstate * 100000; 802 803 /* cpuinfo and default policy values */ 804 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 805 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 806 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 807 cpumask_set_cpu(policy->cpu, policy->cpus); 808 809 return 0; 810 } 811 812 static struct cpufreq_driver intel_pstate_driver = { 813 .flags = CPUFREQ_CONST_LOOPS, 814 .verify = intel_pstate_verify_policy, 815 .setpolicy = intel_pstate_set_policy, 816 .get = intel_pstate_get, 817 .init = intel_pstate_cpu_init, 818 .stop_cpu = intel_pstate_stop_cpu, 819 .name = "intel_pstate", 820 }; 821 822 static int __initdata no_load; 823 824 static int intel_pstate_msrs_not_valid(void) 825 { 826 /* Check that all the msr's we are using are valid. */ 827 u64 aperf, mperf, tmp; 828 829 rdmsrl(MSR_IA32_APERF, aperf); 830 rdmsrl(MSR_IA32_MPERF, mperf); 831 832 if (!pstate_funcs.get_max() || 833 !pstate_funcs.get_min() || 834 !pstate_funcs.get_turbo()) 835 return -ENODEV; 836 837 rdmsrl(MSR_IA32_APERF, tmp); 838 if (!(tmp - aperf)) 839 return -ENODEV; 840 841 rdmsrl(MSR_IA32_MPERF, tmp); 842 if (!(tmp - mperf)) 843 return -ENODEV; 844 845 return 0; 846 } 847 848 static void copy_pid_params(struct pstate_adjust_policy *policy) 849 { 850 pid_params.sample_rate_ms = policy->sample_rate_ms; 851 pid_params.p_gain_pct = policy->p_gain_pct; 852 pid_params.i_gain_pct = policy->i_gain_pct; 853 pid_params.d_gain_pct = policy->d_gain_pct; 854 pid_params.deadband = policy->deadband; 855 pid_params.setpoint = policy->setpoint; 856 } 857 858 static void copy_cpu_funcs(struct pstate_funcs *funcs) 859 { 860 pstate_funcs.get_max = funcs->get_max; 861 pstate_funcs.get_min = funcs->get_min; 862 pstate_funcs.get_turbo = funcs->get_turbo; 863 pstate_funcs.set = funcs->set; 864 pstate_funcs.get_vid = funcs->get_vid; 865 } 866 867 #if IS_ENABLED(CONFIG_ACPI) 868 #include <acpi/processor.h> 869 870 static bool intel_pstate_no_acpi_pss(void) 871 { 872 int i; 873 874 for_each_possible_cpu(i) { 875 acpi_status status; 876 union acpi_object *pss; 877 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 878 struct acpi_processor *pr = per_cpu(processors, i); 879 880 if (!pr) 881 continue; 882 883 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 884 if (ACPI_FAILURE(status)) 885 continue; 886 887 pss = buffer.pointer; 888 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 889 kfree(pss); 890 return false; 891 } 892 893 kfree(pss); 894 } 895 896 return true; 897 } 898 899 struct hw_vendor_info { 900 u16 valid; 901 char oem_id[ACPI_OEM_ID_SIZE]; 902 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 903 }; 904 905 /* Hardware vendor-specific info that has its own power management modes */ 906 static struct hw_vendor_info vendor_info[] = { 907 {1, "HP ", "ProLiant"}, 908 {0, "", ""}, 909 }; 910 911 static bool intel_pstate_platform_pwr_mgmt_exists(void) 912 { 913 struct acpi_table_header hdr; 914 struct hw_vendor_info *v_info; 915 916 if (acpi_disabled 917 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 918 return false; 919 920 for (v_info = vendor_info; v_info->valid; v_info++) { 921 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 922 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 923 && intel_pstate_no_acpi_pss()) 924 return true; 925 } 926 927 return false; 928 } 929 #else /* CONFIG_ACPI not enabled */ 930 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 931 #endif /* CONFIG_ACPI */ 932 933 static int __init intel_pstate_init(void) 934 { 935 int cpu, rc = 0; 936 const struct x86_cpu_id *id; 937 struct cpu_defaults *cpu_info; 938 939 if (no_load) 940 return -ENODEV; 941 942 id = x86_match_cpu(intel_pstate_cpu_ids); 943 if (!id) 944 return -ENODEV; 945 946 /* 947 * The Intel pstate driver will be ignored if the platform 948 * firmware has its own power management modes. 949 */ 950 if (intel_pstate_platform_pwr_mgmt_exists()) 951 return -ENODEV; 952 953 cpu_info = (struct cpu_defaults *)id->driver_data; 954 955 copy_pid_params(&cpu_info->pid_policy); 956 copy_cpu_funcs(&cpu_info->funcs); 957 958 if (intel_pstate_msrs_not_valid()) 959 return -ENODEV; 960 961 pr_info("Intel P-state driver initializing.\n"); 962 963 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 964 if (!all_cpu_data) 965 return -ENOMEM; 966 967 rc = cpufreq_register_driver(&intel_pstate_driver); 968 if (rc) 969 goto out; 970 971 intel_pstate_debug_expose_params(); 972 intel_pstate_sysfs_expose_params(); 973 974 return rc; 975 out: 976 get_online_cpus(); 977 for_each_online_cpu(cpu) { 978 if (all_cpu_data[cpu]) { 979 del_timer_sync(&all_cpu_data[cpu]->timer); 980 kfree(all_cpu_data[cpu]); 981 } 982 } 983 984 put_online_cpus(); 985 vfree(all_cpu_data); 986 return -ENODEV; 987 } 988 device_initcall(intel_pstate_init); 989 990 static int __init intel_pstate_setup(char *str) 991 { 992 if (!str) 993 return -EINVAL; 994 995 if (!strcmp(str, "disable")) 996 no_load = 1; 997 return 0; 998 } 999 early_param("intel_pstate", intel_pstate_setup); 1000 1001 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 1002 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 1003 MODULE_LICENSE("GPL"); 1004