1 /* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/kernel_stat.h> 15 #include <linux/module.h> 16 #include <linux/ktime.h> 17 #include <linux/hrtimer.h> 18 #include <linux/tick.h> 19 #include <linux/slab.h> 20 #include <linux/sched.h> 21 #include <linux/list.h> 22 #include <linux/cpu.h> 23 #include <linux/cpufreq.h> 24 #include <linux/sysfs.h> 25 #include <linux/types.h> 26 #include <linux/fs.h> 27 #include <linux/debugfs.h> 28 #include <linux/acpi.h> 29 #include <trace/events/power.h> 30 31 #include <asm/div64.h> 32 #include <asm/msr.h> 33 #include <asm/cpu_device_id.h> 34 35 #define BYT_RATIOS 0x66a 36 #define BYT_VIDS 0x66b 37 #define BYT_TURBO_RATIOS 0x66c 38 #define BYT_TURBO_VIDS 0x66d 39 40 41 #define FRAC_BITS 8 42 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 43 #define fp_toint(X) ((X) >> FRAC_BITS) 44 45 46 static inline int32_t mul_fp(int32_t x, int32_t y) 47 { 48 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 49 } 50 51 static inline int32_t div_fp(int32_t x, int32_t y) 52 { 53 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); 54 } 55 56 struct sample { 57 int32_t core_pct_busy; 58 u64 aperf; 59 u64 mperf; 60 int freq; 61 ktime_t time; 62 }; 63 64 struct pstate_data { 65 int current_pstate; 66 int min_pstate; 67 int max_pstate; 68 int turbo_pstate; 69 }; 70 71 struct vid_data { 72 int min; 73 int max; 74 int turbo; 75 int32_t ratio; 76 }; 77 78 struct _pid { 79 int setpoint; 80 int32_t integral; 81 int32_t p_gain; 82 int32_t i_gain; 83 int32_t d_gain; 84 int deadband; 85 int32_t last_err; 86 }; 87 88 struct cpudata { 89 int cpu; 90 91 struct timer_list timer; 92 93 struct pstate_data pstate; 94 struct vid_data vid; 95 struct _pid pid; 96 97 ktime_t last_sample_time; 98 u64 prev_aperf; 99 u64 prev_mperf; 100 struct sample sample; 101 }; 102 103 static struct cpudata **all_cpu_data; 104 struct pstate_adjust_policy { 105 int sample_rate_ms; 106 int deadband; 107 int setpoint; 108 int p_gain_pct; 109 int d_gain_pct; 110 int i_gain_pct; 111 }; 112 113 struct pstate_funcs { 114 int (*get_max)(void); 115 int (*get_min)(void); 116 int (*get_turbo)(void); 117 void (*set)(struct cpudata*, int pstate); 118 void (*get_vid)(struct cpudata *); 119 }; 120 121 struct cpu_defaults { 122 struct pstate_adjust_policy pid_policy; 123 struct pstate_funcs funcs; 124 }; 125 126 static struct pstate_adjust_policy pid_params; 127 static struct pstate_funcs pstate_funcs; 128 129 struct perf_limits { 130 int no_turbo; 131 int turbo_disabled; 132 int max_perf_pct; 133 int min_perf_pct; 134 int32_t max_perf; 135 int32_t min_perf; 136 int max_policy_pct; 137 int max_sysfs_pct; 138 }; 139 140 static struct perf_limits limits = { 141 .no_turbo = 0, 142 .max_perf_pct = 100, 143 .max_perf = int_tofp(1), 144 .min_perf_pct = 0, 145 .min_perf = 0, 146 .max_policy_pct = 100, 147 .max_sysfs_pct = 100, 148 }; 149 150 static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 151 int deadband, int integral) { 152 pid->setpoint = setpoint; 153 pid->deadband = deadband; 154 pid->integral = int_tofp(integral); 155 pid->last_err = int_tofp(setpoint) - int_tofp(busy); 156 } 157 158 static inline void pid_p_gain_set(struct _pid *pid, int percent) 159 { 160 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 161 } 162 163 static inline void pid_i_gain_set(struct _pid *pid, int percent) 164 { 165 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 166 } 167 168 static inline void pid_d_gain_set(struct _pid *pid, int percent) 169 { 170 171 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 172 } 173 174 static signed int pid_calc(struct _pid *pid, int32_t busy) 175 { 176 signed int result; 177 int32_t pterm, dterm, fp_error; 178 int32_t integral_limit; 179 180 fp_error = int_tofp(pid->setpoint) - busy; 181 182 if (abs(fp_error) <= int_tofp(pid->deadband)) 183 return 0; 184 185 pterm = mul_fp(pid->p_gain, fp_error); 186 187 pid->integral += fp_error; 188 189 /* limit the integral term */ 190 integral_limit = int_tofp(30); 191 if (pid->integral > integral_limit) 192 pid->integral = integral_limit; 193 if (pid->integral < -integral_limit) 194 pid->integral = -integral_limit; 195 196 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 197 pid->last_err = fp_error; 198 199 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 200 result = result + (1 << (FRAC_BITS-1)); 201 return (signed int)fp_toint(result); 202 } 203 204 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 205 { 206 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 207 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 208 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 209 210 pid_reset(&cpu->pid, 211 pid_params.setpoint, 212 100, 213 pid_params.deadband, 214 0); 215 } 216 217 static inline void intel_pstate_reset_all_pid(void) 218 { 219 unsigned int cpu; 220 for_each_online_cpu(cpu) { 221 if (all_cpu_data[cpu]) 222 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 223 } 224 } 225 226 /************************** debugfs begin ************************/ 227 static int pid_param_set(void *data, u64 val) 228 { 229 *(u32 *)data = val; 230 intel_pstate_reset_all_pid(); 231 return 0; 232 } 233 static int pid_param_get(void *data, u64 *val) 234 { 235 *val = *(u32 *)data; 236 return 0; 237 } 238 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, 239 pid_param_set, "%llu\n"); 240 241 struct pid_param { 242 char *name; 243 void *value; 244 }; 245 246 static struct pid_param pid_files[] = { 247 {"sample_rate_ms", &pid_params.sample_rate_ms}, 248 {"d_gain_pct", &pid_params.d_gain_pct}, 249 {"i_gain_pct", &pid_params.i_gain_pct}, 250 {"deadband", &pid_params.deadband}, 251 {"setpoint", &pid_params.setpoint}, 252 {"p_gain_pct", &pid_params.p_gain_pct}, 253 {NULL, NULL} 254 }; 255 256 static struct dentry *debugfs_parent; 257 static void intel_pstate_debug_expose_params(void) 258 { 259 int i = 0; 260 261 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 262 if (IS_ERR_OR_NULL(debugfs_parent)) 263 return; 264 while (pid_files[i].name) { 265 debugfs_create_file(pid_files[i].name, 0660, 266 debugfs_parent, pid_files[i].value, 267 &fops_pid_param); 268 i++; 269 } 270 } 271 272 /************************** debugfs end ************************/ 273 274 /************************** sysfs begin ************************/ 275 #define show_one(file_name, object) \ 276 static ssize_t show_##file_name \ 277 (struct kobject *kobj, struct attribute *attr, char *buf) \ 278 { \ 279 return sprintf(buf, "%u\n", limits.object); \ 280 } 281 282 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 283 const char *buf, size_t count) 284 { 285 unsigned int input; 286 int ret; 287 ret = sscanf(buf, "%u", &input); 288 if (ret != 1) 289 return -EINVAL; 290 limits.no_turbo = clamp_t(int, input, 0 , 1); 291 if (limits.turbo_disabled) { 292 pr_warn("Turbo disabled by BIOS or unavailable on processor\n"); 293 limits.no_turbo = limits.turbo_disabled; 294 } 295 return count; 296 } 297 298 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 299 const char *buf, size_t count) 300 { 301 unsigned int input; 302 int ret; 303 ret = sscanf(buf, "%u", &input); 304 if (ret != 1) 305 return -EINVAL; 306 307 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 308 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 309 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 310 return count; 311 } 312 313 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 314 const char *buf, size_t count) 315 { 316 unsigned int input; 317 int ret; 318 ret = sscanf(buf, "%u", &input); 319 if (ret != 1) 320 return -EINVAL; 321 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 322 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 323 324 return count; 325 } 326 327 show_one(no_turbo, no_turbo); 328 show_one(max_perf_pct, max_perf_pct); 329 show_one(min_perf_pct, min_perf_pct); 330 331 define_one_global_rw(no_turbo); 332 define_one_global_rw(max_perf_pct); 333 define_one_global_rw(min_perf_pct); 334 335 static struct attribute *intel_pstate_attributes[] = { 336 &no_turbo.attr, 337 &max_perf_pct.attr, 338 &min_perf_pct.attr, 339 NULL 340 }; 341 342 static struct attribute_group intel_pstate_attr_group = { 343 .attrs = intel_pstate_attributes, 344 }; 345 static struct kobject *intel_pstate_kobject; 346 347 static void intel_pstate_sysfs_expose_params(void) 348 { 349 int rc; 350 351 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 352 &cpu_subsys.dev_root->kobj); 353 BUG_ON(!intel_pstate_kobject); 354 rc = sysfs_create_group(intel_pstate_kobject, 355 &intel_pstate_attr_group); 356 BUG_ON(rc); 357 } 358 359 /************************** sysfs end ************************/ 360 static int byt_get_min_pstate(void) 361 { 362 u64 value; 363 rdmsrl(BYT_RATIOS, value); 364 return (value >> 8) & 0x7F; 365 } 366 367 static int byt_get_max_pstate(void) 368 { 369 u64 value; 370 rdmsrl(BYT_RATIOS, value); 371 return (value >> 16) & 0x7F; 372 } 373 374 static int byt_get_turbo_pstate(void) 375 { 376 u64 value; 377 rdmsrl(BYT_TURBO_RATIOS, value); 378 return value & 0x7F; 379 } 380 381 static void byt_set_pstate(struct cpudata *cpudata, int pstate) 382 { 383 u64 val; 384 int32_t vid_fp; 385 u32 vid; 386 387 val = pstate << 8; 388 if (limits.no_turbo && !limits.turbo_disabled) 389 val |= (u64)1 << 32; 390 391 vid_fp = cpudata->vid.min + mul_fp( 392 int_tofp(pstate - cpudata->pstate.min_pstate), 393 cpudata->vid.ratio); 394 395 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 396 vid = fp_toint(vid_fp); 397 398 if (pstate > cpudata->pstate.max_pstate) 399 vid = cpudata->vid.turbo; 400 401 val |= vid; 402 403 wrmsrl(MSR_IA32_PERF_CTL, val); 404 } 405 406 static void byt_get_vid(struct cpudata *cpudata) 407 { 408 u64 value; 409 410 411 rdmsrl(BYT_VIDS, value); 412 cpudata->vid.min = int_tofp((value >> 8) & 0x7f); 413 cpudata->vid.max = int_tofp((value >> 16) & 0x7f); 414 cpudata->vid.ratio = div_fp( 415 cpudata->vid.max - cpudata->vid.min, 416 int_tofp(cpudata->pstate.max_pstate - 417 cpudata->pstate.min_pstate)); 418 419 rdmsrl(BYT_TURBO_VIDS, value); 420 cpudata->vid.turbo = value & 0x7f; 421 } 422 423 424 static int core_get_min_pstate(void) 425 { 426 u64 value; 427 rdmsrl(MSR_PLATFORM_INFO, value); 428 return (value >> 40) & 0xFF; 429 } 430 431 static int core_get_max_pstate(void) 432 { 433 u64 value; 434 rdmsrl(MSR_PLATFORM_INFO, value); 435 return (value >> 8) & 0xFF; 436 } 437 438 static int core_get_turbo_pstate(void) 439 { 440 u64 value; 441 int nont, ret; 442 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 443 nont = core_get_max_pstate(); 444 ret = ((value) & 255); 445 if (ret <= nont) 446 ret = nont; 447 return ret; 448 } 449 450 static void core_set_pstate(struct cpudata *cpudata, int pstate) 451 { 452 u64 val; 453 454 val = pstate << 8; 455 if (limits.no_turbo && !limits.turbo_disabled) 456 val |= (u64)1 << 32; 457 458 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); 459 } 460 461 static struct cpu_defaults core_params = { 462 .pid_policy = { 463 .sample_rate_ms = 10, 464 .deadband = 0, 465 .setpoint = 97, 466 .p_gain_pct = 20, 467 .d_gain_pct = 0, 468 .i_gain_pct = 0, 469 }, 470 .funcs = { 471 .get_max = core_get_max_pstate, 472 .get_min = core_get_min_pstate, 473 .get_turbo = core_get_turbo_pstate, 474 .set = core_set_pstate, 475 }, 476 }; 477 478 static struct cpu_defaults byt_params = { 479 .pid_policy = { 480 .sample_rate_ms = 10, 481 .deadband = 0, 482 .setpoint = 97, 483 .p_gain_pct = 14, 484 .d_gain_pct = 0, 485 .i_gain_pct = 4, 486 }, 487 .funcs = { 488 .get_max = byt_get_max_pstate, 489 .get_min = byt_get_min_pstate, 490 .get_turbo = byt_get_turbo_pstate, 491 .set = byt_set_pstate, 492 .get_vid = byt_get_vid, 493 }, 494 }; 495 496 497 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 498 { 499 int max_perf = cpu->pstate.turbo_pstate; 500 int max_perf_adj; 501 int min_perf; 502 if (limits.no_turbo) 503 max_perf = cpu->pstate.max_pstate; 504 505 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 506 *max = clamp_t(int, max_perf_adj, 507 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 508 509 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 510 *min = clamp_t(int, min_perf, 511 cpu->pstate.min_pstate, max_perf); 512 } 513 514 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 515 { 516 int max_perf, min_perf; 517 518 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 519 520 pstate = clamp_t(int, pstate, min_perf, max_perf); 521 522 if (pstate == cpu->pstate.current_pstate) 523 return; 524 525 trace_cpu_frequency(pstate * 100000, cpu->cpu); 526 527 cpu->pstate.current_pstate = pstate; 528 529 pstate_funcs.set(cpu, pstate); 530 } 531 532 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 533 { 534 int target; 535 target = cpu->pstate.current_pstate + steps; 536 537 intel_pstate_set_pstate(cpu, target); 538 } 539 540 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 541 { 542 int target; 543 target = cpu->pstate.current_pstate - steps; 544 intel_pstate_set_pstate(cpu, target); 545 } 546 547 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 548 { 549 cpu->pstate.min_pstate = pstate_funcs.get_min(); 550 cpu->pstate.max_pstate = pstate_funcs.get_max(); 551 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 552 553 if (pstate_funcs.get_vid) 554 pstate_funcs.get_vid(cpu); 555 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 556 } 557 558 static inline void intel_pstate_calc_busy(struct cpudata *cpu) 559 { 560 struct sample *sample = &cpu->sample; 561 int64_t core_pct; 562 int32_t rem; 563 564 core_pct = int_tofp(sample->aperf) * int_tofp(100); 565 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem); 566 567 if ((rem << 1) >= int_tofp(sample->mperf)) 568 core_pct += 1; 569 570 sample->freq = fp_toint( 571 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct)); 572 573 sample->core_pct_busy = (int32_t)core_pct; 574 } 575 576 static inline void intel_pstate_sample(struct cpudata *cpu) 577 { 578 u64 aperf, mperf; 579 580 rdmsrl(MSR_IA32_APERF, aperf); 581 rdmsrl(MSR_IA32_MPERF, mperf); 582 583 aperf = aperf >> FRAC_BITS; 584 mperf = mperf >> FRAC_BITS; 585 586 cpu->last_sample_time = cpu->sample.time; 587 cpu->sample.time = ktime_get(); 588 cpu->sample.aperf = aperf; 589 cpu->sample.mperf = mperf; 590 cpu->sample.aperf -= cpu->prev_aperf; 591 cpu->sample.mperf -= cpu->prev_mperf; 592 593 intel_pstate_calc_busy(cpu); 594 595 cpu->prev_aperf = aperf; 596 cpu->prev_mperf = mperf; 597 } 598 599 static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 600 { 601 int sample_time, delay; 602 603 sample_time = pid_params.sample_rate_ms; 604 delay = msecs_to_jiffies(sample_time); 605 mod_timer_pinned(&cpu->timer, jiffies + delay); 606 } 607 608 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 609 { 610 int32_t core_busy, max_pstate, current_pstate, sample_ratio; 611 u32 duration_us; 612 u32 sample_time; 613 614 core_busy = cpu->sample.core_pct_busy; 615 max_pstate = int_tofp(cpu->pstate.max_pstate); 616 current_pstate = int_tofp(cpu->pstate.current_pstate); 617 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 618 619 sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC); 620 duration_us = (u32) ktime_us_delta(cpu->sample.time, 621 cpu->last_sample_time); 622 if (duration_us > sample_time * 3) { 623 sample_ratio = div_fp(int_tofp(sample_time), 624 int_tofp(duration_us)); 625 core_busy = mul_fp(core_busy, sample_ratio); 626 } 627 628 return core_busy; 629 } 630 631 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 632 { 633 int32_t busy_scaled; 634 struct _pid *pid; 635 signed int ctl = 0; 636 int steps; 637 638 pid = &cpu->pid; 639 busy_scaled = intel_pstate_get_scaled_busy(cpu); 640 641 ctl = pid_calc(pid, busy_scaled); 642 643 steps = abs(ctl); 644 645 if (ctl < 0) 646 intel_pstate_pstate_increase(cpu, steps); 647 else 648 intel_pstate_pstate_decrease(cpu, steps); 649 } 650 651 static void intel_pstate_timer_func(unsigned long __data) 652 { 653 struct cpudata *cpu = (struct cpudata *) __data; 654 struct sample *sample; 655 656 intel_pstate_sample(cpu); 657 658 sample = &cpu->sample; 659 660 intel_pstate_adjust_busy_pstate(cpu); 661 662 trace_pstate_sample(fp_toint(sample->core_pct_busy), 663 fp_toint(intel_pstate_get_scaled_busy(cpu)), 664 cpu->pstate.current_pstate, 665 sample->mperf, 666 sample->aperf, 667 sample->freq); 668 669 intel_pstate_set_sample_time(cpu); 670 } 671 672 #define ICPU(model, policy) \ 673 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 674 (unsigned long)&policy } 675 676 static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 677 ICPU(0x2a, core_params), 678 ICPU(0x2d, core_params), 679 ICPU(0x37, byt_params), 680 ICPU(0x3a, core_params), 681 ICPU(0x3c, core_params), 682 ICPU(0x3d, core_params), 683 ICPU(0x3e, core_params), 684 ICPU(0x3f, core_params), 685 ICPU(0x45, core_params), 686 ICPU(0x46, core_params), 687 ICPU(0x4f, core_params), 688 ICPU(0x56, core_params), 689 {} 690 }; 691 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 692 693 static int intel_pstate_init_cpu(unsigned int cpunum) 694 { 695 struct cpudata *cpu; 696 697 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 698 if (!all_cpu_data[cpunum]) 699 return -ENOMEM; 700 701 cpu = all_cpu_data[cpunum]; 702 703 cpu->cpu = cpunum; 704 intel_pstate_get_cpu_pstates(cpu); 705 706 init_timer_deferrable(&cpu->timer); 707 cpu->timer.function = intel_pstate_timer_func; 708 cpu->timer.data = 709 (unsigned long)cpu; 710 cpu->timer.expires = jiffies + HZ/100; 711 intel_pstate_busy_pid_reset(cpu); 712 intel_pstate_sample(cpu); 713 714 add_timer_on(&cpu->timer, cpunum); 715 716 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 717 718 return 0; 719 } 720 721 static unsigned int intel_pstate_get(unsigned int cpu_num) 722 { 723 struct sample *sample; 724 struct cpudata *cpu; 725 726 cpu = all_cpu_data[cpu_num]; 727 if (!cpu) 728 return 0; 729 sample = &cpu->sample; 730 return sample->freq; 731 } 732 733 static int intel_pstate_set_policy(struct cpufreq_policy *policy) 734 { 735 struct cpudata *cpu; 736 737 cpu = all_cpu_data[policy->cpu]; 738 739 if (!policy->cpuinfo.max_freq) 740 return -ENODEV; 741 742 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 743 limits.min_perf_pct = 100; 744 limits.min_perf = int_tofp(1); 745 limits.max_perf_pct = 100; 746 limits.max_perf = int_tofp(1); 747 limits.no_turbo = limits.turbo_disabled; 748 return 0; 749 } 750 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 751 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 752 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 753 754 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; 755 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 756 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 757 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 758 759 return 0; 760 } 761 762 static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 763 { 764 cpufreq_verify_within_cpu_limits(policy); 765 766 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && 767 (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) 768 return -EINVAL; 769 770 return 0; 771 } 772 773 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) 774 { 775 int cpu_num = policy->cpu; 776 struct cpudata *cpu = all_cpu_data[cpu_num]; 777 778 pr_info("intel_pstate CPU %d exiting\n", cpu_num); 779 780 del_timer_sync(&all_cpu_data[cpu_num]->timer); 781 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 782 kfree(all_cpu_data[cpu_num]); 783 all_cpu_data[cpu_num] = NULL; 784 } 785 786 static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 787 { 788 struct cpudata *cpu; 789 int rc; 790 u64 misc_en; 791 792 rc = intel_pstate_init_cpu(policy->cpu); 793 if (rc) 794 return rc; 795 796 cpu = all_cpu_data[policy->cpu]; 797 798 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); 799 if (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || 800 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate) { 801 limits.turbo_disabled = 1; 802 limits.no_turbo = 1; 803 } 804 if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 805 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 806 else 807 policy->policy = CPUFREQ_POLICY_POWERSAVE; 808 809 policy->min = cpu->pstate.min_pstate * 100000; 810 policy->max = cpu->pstate.turbo_pstate * 100000; 811 812 /* cpuinfo and default policy values */ 813 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 814 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 815 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 816 cpumask_set_cpu(policy->cpu, policy->cpus); 817 818 return 0; 819 } 820 821 static struct cpufreq_driver intel_pstate_driver = { 822 .flags = CPUFREQ_CONST_LOOPS, 823 .verify = intel_pstate_verify_policy, 824 .setpolicy = intel_pstate_set_policy, 825 .get = intel_pstate_get, 826 .init = intel_pstate_cpu_init, 827 .stop_cpu = intel_pstate_stop_cpu, 828 .name = "intel_pstate", 829 }; 830 831 static int __initdata no_load; 832 833 static int intel_pstate_msrs_not_valid(void) 834 { 835 /* Check that all the msr's we are using are valid. */ 836 u64 aperf, mperf, tmp; 837 838 rdmsrl(MSR_IA32_APERF, aperf); 839 rdmsrl(MSR_IA32_MPERF, mperf); 840 841 if (!pstate_funcs.get_max() || 842 !pstate_funcs.get_min() || 843 !pstate_funcs.get_turbo()) 844 return -ENODEV; 845 846 rdmsrl(MSR_IA32_APERF, tmp); 847 if (!(tmp - aperf)) 848 return -ENODEV; 849 850 rdmsrl(MSR_IA32_MPERF, tmp); 851 if (!(tmp - mperf)) 852 return -ENODEV; 853 854 return 0; 855 } 856 857 static void copy_pid_params(struct pstate_adjust_policy *policy) 858 { 859 pid_params.sample_rate_ms = policy->sample_rate_ms; 860 pid_params.p_gain_pct = policy->p_gain_pct; 861 pid_params.i_gain_pct = policy->i_gain_pct; 862 pid_params.d_gain_pct = policy->d_gain_pct; 863 pid_params.deadband = policy->deadband; 864 pid_params.setpoint = policy->setpoint; 865 } 866 867 static void copy_cpu_funcs(struct pstate_funcs *funcs) 868 { 869 pstate_funcs.get_max = funcs->get_max; 870 pstate_funcs.get_min = funcs->get_min; 871 pstate_funcs.get_turbo = funcs->get_turbo; 872 pstate_funcs.set = funcs->set; 873 pstate_funcs.get_vid = funcs->get_vid; 874 } 875 876 #if IS_ENABLED(CONFIG_ACPI) 877 #include <acpi/processor.h> 878 879 static bool intel_pstate_no_acpi_pss(void) 880 { 881 int i; 882 883 for_each_possible_cpu(i) { 884 acpi_status status; 885 union acpi_object *pss; 886 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 887 struct acpi_processor *pr = per_cpu(processors, i); 888 889 if (!pr) 890 continue; 891 892 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 893 if (ACPI_FAILURE(status)) 894 continue; 895 896 pss = buffer.pointer; 897 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 898 kfree(pss); 899 return false; 900 } 901 902 kfree(pss); 903 } 904 905 return true; 906 } 907 908 struct hw_vendor_info { 909 u16 valid; 910 char oem_id[ACPI_OEM_ID_SIZE]; 911 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 912 }; 913 914 /* Hardware vendor-specific info that has its own power management modes */ 915 static struct hw_vendor_info vendor_info[] = { 916 {1, "HP ", "ProLiant"}, 917 {0, "", ""}, 918 }; 919 920 static bool intel_pstate_platform_pwr_mgmt_exists(void) 921 { 922 struct acpi_table_header hdr; 923 struct hw_vendor_info *v_info; 924 925 if (acpi_disabled 926 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 927 return false; 928 929 for (v_info = vendor_info; v_info->valid; v_info++) { 930 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 931 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 932 && intel_pstate_no_acpi_pss()) 933 return true; 934 } 935 936 return false; 937 } 938 #else /* CONFIG_ACPI not enabled */ 939 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 940 #endif /* CONFIG_ACPI */ 941 942 static int __init intel_pstate_init(void) 943 { 944 int cpu, rc = 0; 945 const struct x86_cpu_id *id; 946 struct cpu_defaults *cpu_info; 947 948 if (no_load) 949 return -ENODEV; 950 951 id = x86_match_cpu(intel_pstate_cpu_ids); 952 if (!id) 953 return -ENODEV; 954 955 /* 956 * The Intel pstate driver will be ignored if the platform 957 * firmware has its own power management modes. 958 */ 959 if (intel_pstate_platform_pwr_mgmt_exists()) 960 return -ENODEV; 961 962 cpu_info = (struct cpu_defaults *)id->driver_data; 963 964 copy_pid_params(&cpu_info->pid_policy); 965 copy_cpu_funcs(&cpu_info->funcs); 966 967 if (intel_pstate_msrs_not_valid()) 968 return -ENODEV; 969 970 pr_info("Intel P-state driver initializing.\n"); 971 972 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 973 if (!all_cpu_data) 974 return -ENOMEM; 975 976 rc = cpufreq_register_driver(&intel_pstate_driver); 977 if (rc) 978 goto out; 979 980 intel_pstate_debug_expose_params(); 981 intel_pstate_sysfs_expose_params(); 982 983 return rc; 984 out: 985 get_online_cpus(); 986 for_each_online_cpu(cpu) { 987 if (all_cpu_data[cpu]) { 988 del_timer_sync(&all_cpu_data[cpu]->timer); 989 kfree(all_cpu_data[cpu]); 990 } 991 } 992 993 put_online_cpus(); 994 vfree(all_cpu_data); 995 return -ENODEV; 996 } 997 device_initcall(intel_pstate_init); 998 999 static int __init intel_pstate_setup(char *str) 1000 { 1001 if (!str) 1002 return -EINVAL; 1003 1004 if (!strcmp(str, "disable")) 1005 no_load = 1; 1006 return 0; 1007 } 1008 early_param("intel_pstate", intel_pstate_setup); 1009 1010 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 1011 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 1012 MODULE_LICENSE("GPL"); 1013