1 /* 2 * Cyrix MediaGX and NatSemi Geode Suspend Modulation 3 * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com> 4 * (C) 2002 Hiroshi Miura <miura@da-cha.org> 5 * All Rights Reserved 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation 10 * 11 * The author(s) of this software shall not be held liable for damages 12 * of any nature resulting due to the use of this software. This 13 * software is provided AS-IS with no warranties. 14 * 15 * Theoretical note: 16 * 17 * (see Geode(tm) CS5530 manual (rev.4.1) page.56) 18 * 19 * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0 20 * are based on Suspend Modulation. 21 * 22 * Suspend Modulation works by asserting and de-asserting the SUSP# pin 23 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# 24 * the CPU enters an idle state. GX1 stops its core clock when SUSP# is 25 * asserted then power consumption is reduced. 26 * 27 * Suspend Modulation's OFF/ON duration are configurable 28 * with 'Suspend Modulation OFF Count Register' 29 * and 'Suspend Modulation ON Count Register'. 30 * These registers are 8bit counters that represent the number of 31 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF) 32 * to the processor. 33 * 34 * These counters define a ratio which is the effective frequency 35 * of operation of the system. 36 * 37 * OFF Count 38 * F_eff = Fgx * ---------------------- 39 * OFF Count + ON Count 40 * 41 * 0 <= On Count, Off Count <= 255 42 * 43 * From these limits, we can get register values 44 * 45 * off_duration + on_duration <= MAX_DURATION 46 * on_duration = off_duration * (stock_freq - freq) / freq 47 * 48 * off_duration = (freq * DURATION) / stock_freq 49 * on_duration = DURATION - off_duration 50 * 51 * 52 *--------------------------------------------------------------------------- 53 * 54 * ChangeLog: 55 * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org> 56 * - fix on/off register mistake 57 * - fix cpu_khz calc when it stops cpu modulation. 58 * 59 * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org> 60 * - rewrite for Cyrix MediaGX Cx5510/5520 and 61 * NatSemi Geode Cs5530(A). 62 * 63 * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com> 64 * - cs5530_mod patch for 2.4.19-rc1. 65 * 66 *--------------------------------------------------------------------------- 67 * 68 * Todo 69 * Test on machines with 5510, 5530, 5530A 70 */ 71 72 /************************************************************************ 73 * Suspend Modulation - Definitions * 74 ************************************************************************/ 75 76 #include <linux/kernel.h> 77 #include <linux/module.h> 78 #include <linux/init.h> 79 #include <linux/smp.h> 80 #include <linux/cpufreq.h> 81 #include <linux/pci.h> 82 #include <linux/errno.h> 83 #include <linux/slab.h> 84 85 #include <asm/cpu_device_id.h> 86 #include <asm/processor-cyrix.h> 87 88 /* PCI config registers, all at F0 */ 89 #define PCI_PMER1 0x80 /* power management enable register 1 */ 90 #define PCI_PMER2 0x81 /* power management enable register 2 */ 91 #define PCI_PMER3 0x82 /* power management enable register 3 */ 92 #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ 93 #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ 94 #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ 95 #define PCI_MODON 0x95 /* suspend modulation ON counter register */ 96 #define PCI_SUSCFG 0x96 /* suspend configuration register */ 97 98 /* PMER1 bits */ 99 #define GPM (1<<0) /* global power management */ 100 #define GIT (1<<1) /* globally enable PM device idle timers */ 101 #define GTR (1<<2) /* globally enable IO traps */ 102 #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ 103 #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ 104 105 /* SUSCFG bits */ 106 #define SUSMOD (1<<0) /* enable/disable suspend modulation */ 107 /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */ 108 #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ 109 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ 110 #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ 111 /* the below is supported only with cs5530A */ 112 #define PWRSVE_ISA (1<<3) /* stop ISA clock */ 113 #define PWRSVE (1<<4) /* active idle */ 114 115 struct gxfreq_params { 116 u8 on_duration; 117 u8 off_duration; 118 u8 pci_suscfg; 119 u8 pci_pmer1; 120 u8 pci_pmer2; 121 struct pci_dev *cs55x0; 122 }; 123 124 static struct gxfreq_params *gx_params; 125 static int stock_freq; 126 127 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */ 128 static int pci_busclk; 129 module_param(pci_busclk, int, 0444); 130 131 /* maximum duration for which the cpu may be suspended 132 * (32us * MAX_DURATION). If no parameter is given, this defaults 133 * to 255. 134 * Note that this leads to a maximum of 8 ms(!) where the CPU clock 135 * is suspended -- processing power is just 0.39% of what it used to be, 136 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ 137 static int max_duration = 255; 138 module_param(max_duration, int, 0444); 139 140 /* For the default policy, we want at least some processing power 141 * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV) 142 */ 143 #define POLICY_MIN_DIV 20 144 145 146 /** 147 * we can detect a core multipiler from dir0_lsb 148 * from GX1 datasheet p.56, 149 * MULT[3:0]: 150 * 0000 = SYSCLK multiplied by 4 (test only) 151 * 0001 = SYSCLK multiplied by 10 152 * 0010 = SYSCLK multiplied by 4 153 * 0011 = SYSCLK multiplied by 6 154 * 0100 = SYSCLK multiplied by 9 155 * 0101 = SYSCLK multiplied by 5 156 * 0110 = SYSCLK multiplied by 7 157 * 0111 = SYSCLK multiplied by 8 158 * of 33.3MHz 159 **/ 160 static int gx_freq_mult[16] = { 161 4, 10, 4, 6, 9, 5, 7, 8, 162 0, 0, 0, 0, 0, 0, 0, 0 163 }; 164 165 166 /**************************************************************** 167 * Low Level chipset interface * 168 ****************************************************************/ 169 static struct pci_device_id gx_chipset_tbl[] __initdata = { 170 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), }, 171 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), }, 172 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), }, 173 { 0, }, 174 }; 175 MODULE_DEVICE_TABLE(pci, gx_chipset_tbl); 176 177 static void gx_write_byte(int reg, int value) 178 { 179 pci_write_config_byte(gx_params->cs55x0, reg, value); 180 } 181 182 /** 183 * gx_detect_chipset: 184 * 185 **/ 186 static __init struct pci_dev *gx_detect_chipset(void) 187 { 188 struct pci_dev *gx_pci = NULL; 189 190 /* detect which companion chip is used */ 191 for_each_pci_dev(gx_pci) { 192 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) 193 return gx_pci; 194 } 195 196 pr_debug("error: no supported chipset found!\n"); 197 return NULL; 198 } 199 200 /** 201 * gx_get_cpuspeed: 202 * 203 * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi 204 * Geode CPU runs. 205 */ 206 static unsigned int gx_get_cpuspeed(unsigned int cpu) 207 { 208 if ((gx_params->pci_suscfg & SUSMOD) == 0) 209 return stock_freq; 210 211 return (stock_freq * gx_params->off_duration) 212 / (gx_params->on_duration + gx_params->off_duration); 213 } 214 215 /** 216 * gx_validate_speed: 217 * determine current cpu speed 218 * 219 **/ 220 221 static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, 222 u8 *off_duration) 223 { 224 unsigned int i; 225 u8 tmp_on, tmp_off; 226 int old_tmp_freq = stock_freq; 227 int tmp_freq; 228 229 *off_duration = 1; 230 *on_duration = 0; 231 232 for (i = max_duration; i > 0; i--) { 233 tmp_off = ((khz * i) / stock_freq) & 0xff; 234 tmp_on = i - tmp_off; 235 tmp_freq = (stock_freq * tmp_off) / i; 236 /* if this relation is closer to khz, use this. If it's equal, 237 * prefer it, too - lower latency */ 238 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) { 239 *on_duration = tmp_on; 240 *off_duration = tmp_off; 241 old_tmp_freq = tmp_freq; 242 } 243 } 244 245 return old_tmp_freq; 246 } 247 248 249 /** 250 * gx_set_cpuspeed: 251 * set cpu speed in khz. 252 **/ 253 254 static void gx_set_cpuspeed(unsigned int khz) 255 { 256 u8 suscfg, pmer1; 257 unsigned int new_khz; 258 unsigned long flags; 259 struct cpufreq_freqs freqs; 260 261 freqs.cpu = 0; 262 freqs.old = gx_get_cpuspeed(0); 263 264 new_khz = gx_validate_speed(khz, &gx_params->on_duration, 265 &gx_params->off_duration); 266 267 freqs.new = new_khz; 268 269 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 270 local_irq_save(flags); 271 272 273 274 if (new_khz != stock_freq) { 275 /* if new khz == 100% of CPU speed, it is special case */ 276 switch (gx_params->cs55x0->device) { 277 case PCI_DEVICE_ID_CYRIX_5530_LEGACY: 278 pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; 279 /* FIXME: need to test other values -- Zwane,Miura */ 280 /* typical 2 to 4ms */ 281 gx_write_byte(PCI_IRQTC, 4); 282 /* typical 50 to 100ms */ 283 gx_write_byte(PCI_VIDTC, 100); 284 gx_write_byte(PCI_PMER1, pmer1); 285 286 if (gx_params->cs55x0->revision < 0x10) { 287 /* CS5530(rev 1.2, 1.3) */ 288 suscfg = gx_params->pci_suscfg|SUSMOD; 289 } else { 290 /* CS5530A,B.. */ 291 suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE; 292 } 293 break; 294 case PCI_DEVICE_ID_CYRIX_5520: 295 case PCI_DEVICE_ID_CYRIX_5510: 296 suscfg = gx_params->pci_suscfg | SUSMOD; 297 break; 298 default: 299 local_irq_restore(flags); 300 pr_debug("fatal: try to set unknown chipset.\n"); 301 return; 302 } 303 } else { 304 suscfg = gx_params->pci_suscfg & ~(SUSMOD); 305 gx_params->off_duration = 0; 306 gx_params->on_duration = 0; 307 pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n"); 308 } 309 310 gx_write_byte(PCI_MODOFF, gx_params->off_duration); 311 gx_write_byte(PCI_MODON, gx_params->on_duration); 312 313 gx_write_byte(PCI_SUSCFG, suscfg); 314 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); 315 316 local_irq_restore(flags); 317 318 gx_params->pci_suscfg = suscfg; 319 320 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 321 322 pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", 323 gx_params->on_duration * 32, gx_params->off_duration * 32); 324 pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); 325 } 326 327 /**************************************************************** 328 * High level functions * 329 ****************************************************************/ 330 331 /* 332 * cpufreq_gx_verify: test if frequency range is valid 333 * 334 * This function checks if a given frequency range in kHz is valid 335 * for the hardware supported by the driver. 336 */ 337 338 static int cpufreq_gx_verify(struct cpufreq_policy *policy) 339 { 340 unsigned int tmp_freq = 0; 341 u8 tmp1, tmp2; 342 343 if (!stock_freq || !policy) 344 return -EINVAL; 345 346 policy->cpu = 0; 347 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 348 stock_freq); 349 350 /* it needs to be assured that at least one supported frequency is 351 * within policy->min and policy->max. If it is not, policy->max 352 * needs to be increased until one freuqency is supported. 353 * policy->min may not be decreased, though. This way we guarantee a 354 * specific processing capacity. 355 */ 356 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); 357 if (tmp_freq < policy->min) 358 tmp_freq += stock_freq / max_duration; 359 policy->min = tmp_freq; 360 if (policy->min > policy->max) 361 policy->max = tmp_freq; 362 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); 363 if (tmp_freq > policy->max) 364 tmp_freq -= stock_freq / max_duration; 365 policy->max = tmp_freq; 366 if (policy->max < policy->min) 367 policy->max = policy->min; 368 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 369 stock_freq); 370 371 return 0; 372 } 373 374 /* 375 * cpufreq_gx_target: 376 * 377 */ 378 static int cpufreq_gx_target(struct cpufreq_policy *policy, 379 unsigned int target_freq, 380 unsigned int relation) 381 { 382 u8 tmp1, tmp2; 383 unsigned int tmp_freq; 384 385 if (!stock_freq || !policy) 386 return -EINVAL; 387 388 policy->cpu = 0; 389 390 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); 391 while (tmp_freq < policy->min) { 392 tmp_freq += stock_freq / max_duration; 393 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 394 } 395 while (tmp_freq > policy->max) { 396 tmp_freq -= stock_freq / max_duration; 397 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 398 } 399 400 gx_set_cpuspeed(tmp_freq); 401 402 return 0; 403 } 404 405 static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy) 406 { 407 unsigned int maxfreq, curfreq; 408 409 if (!policy || policy->cpu != 0) 410 return -ENODEV; 411 412 /* determine maximum frequency */ 413 if (pci_busclk) 414 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 415 else if (cpu_khz) 416 maxfreq = cpu_khz; 417 else 418 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 419 420 stock_freq = maxfreq; 421 curfreq = gx_get_cpuspeed(0); 422 423 pr_debug("cpu max frequency is %d.\n", maxfreq); 424 pr_debug("cpu current frequency is %dkHz.\n", curfreq); 425 426 /* setup basic struct for cpufreq API */ 427 policy->cpu = 0; 428 429 if (max_duration < POLICY_MIN_DIV) 430 policy->min = maxfreq / max_duration; 431 else 432 policy->min = maxfreq / POLICY_MIN_DIV; 433 policy->max = maxfreq; 434 policy->cur = curfreq; 435 policy->cpuinfo.min_freq = maxfreq / max_duration; 436 policy->cpuinfo.max_freq = maxfreq; 437 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 438 439 return 0; 440 } 441 442 /* 443 * cpufreq_gx_init: 444 * MediaGX/Geode GX initialize cpufreq driver 445 */ 446 static struct cpufreq_driver gx_suspmod_driver = { 447 .get = gx_get_cpuspeed, 448 .verify = cpufreq_gx_verify, 449 .target = cpufreq_gx_target, 450 .init = cpufreq_gx_cpu_init, 451 .name = "gx-suspmod", 452 .owner = THIS_MODULE, 453 }; 454 455 static int __init cpufreq_gx_init(void) 456 { 457 int ret; 458 struct gxfreq_params *params; 459 struct pci_dev *gx_pci; 460 461 /* Test if we have the right hardware */ 462 gx_pci = gx_detect_chipset(); 463 if (gx_pci == NULL) 464 return -ENODEV; 465 466 /* check whether module parameters are sane */ 467 if (max_duration > 0xff) 468 max_duration = 0xff; 469 470 pr_debug("geode suspend modulation available.\n"); 471 472 params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL); 473 if (params == NULL) 474 return -ENOMEM; 475 476 params->cs55x0 = gx_pci; 477 gx_params = params; 478 479 /* keep cs55x0 configurations */ 480 pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg)); 481 pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1)); 482 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); 483 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); 484 pci_read_config_byte(params->cs55x0, PCI_MODOFF, 485 &(params->off_duration)); 486 487 ret = cpufreq_register_driver(&gx_suspmod_driver); 488 if (ret) { 489 kfree(params); 490 return ret; /* register error! */ 491 } 492 493 return 0; 494 } 495 496 static void __exit cpufreq_gx_exit(void) 497 { 498 cpufreq_unregister_driver(&gx_suspmod_driver); 499 pci_dev_put(gx_params->cs55x0); 500 kfree(gx_params); 501 } 502 503 MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>"); 504 MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode"); 505 MODULE_LICENSE("GPL"); 506 507 module_init(cpufreq_gx_init); 508 module_exit(cpufreq_gx_exit); 509 510