xref: /openbmc/linux/drivers/cpufreq/cpufreq-dt.c (revision 8b235f2f)
1 /*
2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
3  *
4  * Copyright (C) 2014 Linaro.
5  * Viresh Kumar <viresh.kumar@linaro.org>
6  *
7  * The OPP code in function set_target() is reused from
8  * drivers/cpufreq/omap-cpufreq.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
16 
17 #include <linux/clk.h>
18 #include <linux/cpu.h>
19 #include <linux/cpu_cooling.h>
20 #include <linux/cpufreq.h>
21 #include <linux/cpufreq-dt.h>
22 #include <linux/cpumask.h>
23 #include <linux/err.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/pm_opp.h>
27 #include <linux/platform_device.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/slab.h>
30 #include <linux/thermal.h>
31 
32 struct private_data {
33 	struct device *cpu_dev;
34 	struct regulator *cpu_reg;
35 	struct thermal_cooling_device *cdev;
36 	unsigned int voltage_tolerance; /* in percentage */
37 };
38 
39 static struct freq_attr *cpufreq_dt_attr[] = {
40 	&cpufreq_freq_attr_scaling_available_freqs,
41 	NULL,   /* Extra space for boost-attr if required */
42 	NULL,
43 };
44 
45 static int set_target(struct cpufreq_policy *policy, unsigned int index)
46 {
47 	struct dev_pm_opp *opp;
48 	struct cpufreq_frequency_table *freq_table = policy->freq_table;
49 	struct clk *cpu_clk = policy->clk;
50 	struct private_data *priv = policy->driver_data;
51 	struct device *cpu_dev = priv->cpu_dev;
52 	struct regulator *cpu_reg = priv->cpu_reg;
53 	unsigned long volt = 0, volt_old = 0, tol = 0;
54 	unsigned int old_freq, new_freq;
55 	long freq_Hz, freq_exact;
56 	int ret;
57 
58 	freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
59 	if (freq_Hz <= 0)
60 		freq_Hz = freq_table[index].frequency * 1000;
61 
62 	freq_exact = freq_Hz;
63 	new_freq = freq_Hz / 1000;
64 	old_freq = clk_get_rate(cpu_clk) / 1000;
65 
66 	if (!IS_ERR(cpu_reg)) {
67 		unsigned long opp_freq;
68 
69 		rcu_read_lock();
70 		opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
71 		if (IS_ERR(opp)) {
72 			rcu_read_unlock();
73 			dev_err(cpu_dev, "failed to find OPP for %ld\n",
74 				freq_Hz);
75 			return PTR_ERR(opp);
76 		}
77 		volt = dev_pm_opp_get_voltage(opp);
78 		opp_freq = dev_pm_opp_get_freq(opp);
79 		rcu_read_unlock();
80 		tol = volt * priv->voltage_tolerance / 100;
81 		volt_old = regulator_get_voltage(cpu_reg);
82 		dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
83 			opp_freq / 1000, volt);
84 	}
85 
86 	dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
87 		old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
88 		new_freq / 1000, volt ? volt / 1000 : -1);
89 
90 	/* scaling up?  scale voltage before frequency */
91 	if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
92 		ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
93 		if (ret) {
94 			dev_err(cpu_dev, "failed to scale voltage up: %d\n",
95 				ret);
96 			return ret;
97 		}
98 	}
99 
100 	ret = clk_set_rate(cpu_clk, freq_exact);
101 	if (ret) {
102 		dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
103 		if (!IS_ERR(cpu_reg) && volt_old > 0)
104 			regulator_set_voltage_tol(cpu_reg, volt_old, tol);
105 		return ret;
106 	}
107 
108 	/* scaling down?  scale voltage after frequency */
109 	if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
110 		ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
111 		if (ret) {
112 			dev_err(cpu_dev, "failed to scale voltage down: %d\n",
113 				ret);
114 			clk_set_rate(cpu_clk, old_freq * 1000);
115 		}
116 	}
117 
118 	return ret;
119 }
120 
121 static int allocate_resources(int cpu, struct device **cdev,
122 			      struct regulator **creg, struct clk **cclk)
123 {
124 	struct device *cpu_dev;
125 	struct regulator *cpu_reg;
126 	struct clk *cpu_clk;
127 	int ret = 0;
128 	char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
129 
130 	cpu_dev = get_cpu_device(cpu);
131 	if (!cpu_dev) {
132 		pr_err("failed to get cpu%d device\n", cpu);
133 		return -ENODEV;
134 	}
135 
136 	/* Try "cpu0" for older DTs */
137 	if (!cpu)
138 		reg = reg_cpu0;
139 	else
140 		reg = reg_cpu;
141 
142 try_again:
143 	cpu_reg = regulator_get_optional(cpu_dev, reg);
144 	if (IS_ERR(cpu_reg)) {
145 		/*
146 		 * If cpu's regulator supply node is present, but regulator is
147 		 * not yet registered, we should try defering probe.
148 		 */
149 		if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
150 			dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
151 				cpu);
152 			return -EPROBE_DEFER;
153 		}
154 
155 		/* Try with "cpu-supply" */
156 		if (reg == reg_cpu0) {
157 			reg = reg_cpu;
158 			goto try_again;
159 		}
160 
161 		dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
162 			cpu, PTR_ERR(cpu_reg));
163 	}
164 
165 	cpu_clk = clk_get(cpu_dev, NULL);
166 	if (IS_ERR(cpu_clk)) {
167 		/* put regulator */
168 		if (!IS_ERR(cpu_reg))
169 			regulator_put(cpu_reg);
170 
171 		ret = PTR_ERR(cpu_clk);
172 
173 		/*
174 		 * If cpu's clk node is present, but clock is not yet
175 		 * registered, we should try defering probe.
176 		 */
177 		if (ret == -EPROBE_DEFER)
178 			dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
179 		else
180 			dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
181 				ret);
182 	} else {
183 		*cdev = cpu_dev;
184 		*creg = cpu_reg;
185 		*cclk = cpu_clk;
186 	}
187 
188 	return ret;
189 }
190 
191 static int cpufreq_init(struct cpufreq_policy *policy)
192 {
193 	struct cpufreq_frequency_table *freq_table;
194 	struct device_node *np;
195 	struct private_data *priv;
196 	struct device *cpu_dev;
197 	struct regulator *cpu_reg;
198 	struct clk *cpu_clk;
199 	unsigned long min_uV = ~0, max_uV = 0;
200 	unsigned int transition_latency;
201 	bool need_update = false;
202 	int ret;
203 
204 	ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
205 	if (ret) {
206 		pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
207 		return ret;
208 	}
209 
210 	np = of_node_get(cpu_dev->of_node);
211 	if (!np) {
212 		dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
213 		ret = -ENOENT;
214 		goto out_put_reg_clk;
215 	}
216 
217 	/* Get OPP-sharing information from "operating-points-v2" bindings */
218 	ret = of_get_cpus_sharing_opps(cpu_dev, policy->cpus);
219 	if (ret) {
220 		/*
221 		 * operating-points-v2 not supported, fallback to old method of
222 		 * finding shared-OPPs for backward compatibility.
223 		 */
224 		if (ret == -ENOENT)
225 			need_update = true;
226 		else
227 			goto out_node_put;
228 	}
229 
230 	/*
231 	 * Initialize OPP tables for all policy->cpus. They will be shared by
232 	 * all CPUs which have marked their CPUs shared with OPP bindings.
233 	 *
234 	 * For platforms not using operating-points-v2 bindings, we do this
235 	 * before updating policy->cpus. Otherwise, we will end up creating
236 	 * duplicate OPPs for policy->cpus.
237 	 *
238 	 * OPPs might be populated at runtime, don't check for error here
239 	 */
240 	of_cpumask_init_opp_table(policy->cpus);
241 
242 	if (need_update) {
243 		struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
244 
245 		if (!pd || !pd->independent_clocks)
246 			cpumask_setall(policy->cpus);
247 
248 		/*
249 		 * OPP tables are initialized only for policy->cpu, do it for
250 		 * others as well.
251 		 */
252 		set_cpus_sharing_opps(cpu_dev, policy->cpus);
253 
254 		of_property_read_u32(np, "clock-latency", &transition_latency);
255 	} else {
256 		transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
257 	}
258 
259 	/*
260 	 * But we need OPP table to function so if it is not there let's
261 	 * give platform code chance to provide it for us.
262 	 */
263 	ret = dev_pm_opp_get_opp_count(cpu_dev);
264 	if (ret <= 0) {
265 		pr_debug("OPP table is not ready, deferring probe\n");
266 		ret = -EPROBE_DEFER;
267 		goto out_free_opp;
268 	}
269 
270 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
271 	if (!priv) {
272 		ret = -ENOMEM;
273 		goto out_free_opp;
274 	}
275 
276 	of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
277 
278 	if (!transition_latency)
279 		transition_latency = CPUFREQ_ETERNAL;
280 
281 	if (!IS_ERR(cpu_reg)) {
282 		unsigned long opp_freq = 0;
283 
284 		/*
285 		 * Disable any OPPs where the connected regulator isn't able to
286 		 * provide the specified voltage and record minimum and maximum
287 		 * voltage levels.
288 		 */
289 		while (1) {
290 			struct dev_pm_opp *opp;
291 			unsigned long opp_uV, tol_uV;
292 
293 			rcu_read_lock();
294 			opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
295 			if (IS_ERR(opp)) {
296 				rcu_read_unlock();
297 				break;
298 			}
299 			opp_uV = dev_pm_opp_get_voltage(opp);
300 			rcu_read_unlock();
301 
302 			tol_uV = opp_uV * priv->voltage_tolerance / 100;
303 			if (regulator_is_supported_voltage(cpu_reg, opp_uV,
304 							   opp_uV + tol_uV)) {
305 				if (opp_uV < min_uV)
306 					min_uV = opp_uV;
307 				if (opp_uV > max_uV)
308 					max_uV = opp_uV;
309 			} else {
310 				dev_pm_opp_disable(cpu_dev, opp_freq);
311 			}
312 
313 			opp_freq++;
314 		}
315 
316 		ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
317 		if (ret > 0)
318 			transition_latency += ret * 1000;
319 	}
320 
321 	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
322 	if (ret) {
323 		pr_err("failed to init cpufreq table: %d\n", ret);
324 		goto out_free_priv;
325 	}
326 
327 	priv->cpu_dev = cpu_dev;
328 	priv->cpu_reg = cpu_reg;
329 	policy->driver_data = priv;
330 
331 	policy->clk = cpu_clk;
332 	ret = cpufreq_table_validate_and_show(policy, freq_table);
333 	if (ret) {
334 		dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
335 			ret);
336 		goto out_free_cpufreq_table;
337 	}
338 
339 	/* Support turbo/boost mode */
340 	if (policy_has_boost_freq(policy)) {
341 		/* This gets disabled by core on driver unregister */
342 		ret = cpufreq_enable_boost_support();
343 		if (ret)
344 			goto out_free_cpufreq_table;
345 		cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
346 	}
347 
348 	policy->cpuinfo.transition_latency = transition_latency;
349 
350 	of_node_put(np);
351 
352 	return 0;
353 
354 out_free_cpufreq_table:
355 	dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
356 out_free_priv:
357 	kfree(priv);
358 out_free_opp:
359 	of_cpumask_free_opp_table(policy->cpus);
360 out_node_put:
361 	of_node_put(np);
362 out_put_reg_clk:
363 	clk_put(cpu_clk);
364 	if (!IS_ERR(cpu_reg))
365 		regulator_put(cpu_reg);
366 
367 	return ret;
368 }
369 
370 static int cpufreq_exit(struct cpufreq_policy *policy)
371 {
372 	struct private_data *priv = policy->driver_data;
373 
374 	cpufreq_cooling_unregister(priv->cdev);
375 	dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
376 	of_cpumask_free_opp_table(policy->related_cpus);
377 	clk_put(policy->clk);
378 	if (!IS_ERR(priv->cpu_reg))
379 		regulator_put(priv->cpu_reg);
380 	kfree(priv);
381 
382 	return 0;
383 }
384 
385 static void cpufreq_ready(struct cpufreq_policy *policy)
386 {
387 	struct private_data *priv = policy->driver_data;
388 	struct device_node *np = of_node_get(priv->cpu_dev->of_node);
389 
390 	if (WARN_ON(!np))
391 		return;
392 
393 	/*
394 	 * For now, just loading the cooling device;
395 	 * thermal DT code takes care of matching them.
396 	 */
397 	if (of_find_property(np, "#cooling-cells", NULL)) {
398 		priv->cdev = of_cpufreq_cooling_register(np,
399 							 policy->related_cpus);
400 		if (IS_ERR(priv->cdev)) {
401 			dev_err(priv->cpu_dev,
402 				"running cpufreq without cooling device: %ld\n",
403 				PTR_ERR(priv->cdev));
404 
405 			priv->cdev = NULL;
406 		}
407 	}
408 
409 	of_node_put(np);
410 }
411 
412 static struct cpufreq_driver dt_cpufreq_driver = {
413 	.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
414 	.verify = cpufreq_generic_frequency_table_verify,
415 	.target_index = set_target,
416 	.get = cpufreq_generic_get,
417 	.init = cpufreq_init,
418 	.exit = cpufreq_exit,
419 	.ready = cpufreq_ready,
420 	.name = "cpufreq-dt",
421 	.attr = cpufreq_dt_attr,
422 };
423 
424 static int dt_cpufreq_probe(struct platform_device *pdev)
425 {
426 	struct device *cpu_dev;
427 	struct regulator *cpu_reg;
428 	struct clk *cpu_clk;
429 	int ret;
430 
431 	/*
432 	 * All per-cluster (CPUs sharing clock/voltages) initialization is done
433 	 * from ->init(). In probe(), we just need to make sure that clk and
434 	 * regulators are available. Else defer probe and retry.
435 	 *
436 	 * FIXME: Is checking this only for CPU0 sufficient ?
437 	 */
438 	ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
439 	if (ret)
440 		return ret;
441 
442 	clk_put(cpu_clk);
443 	if (!IS_ERR(cpu_reg))
444 		regulator_put(cpu_reg);
445 
446 	dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
447 
448 	ret = cpufreq_register_driver(&dt_cpufreq_driver);
449 	if (ret)
450 		dev_err(cpu_dev, "failed register driver: %d\n", ret);
451 
452 	return ret;
453 }
454 
455 static int dt_cpufreq_remove(struct platform_device *pdev)
456 {
457 	cpufreq_unregister_driver(&dt_cpufreq_driver);
458 	return 0;
459 }
460 
461 static struct platform_driver dt_cpufreq_platdrv = {
462 	.driver = {
463 		.name	= "cpufreq-dt",
464 	},
465 	.probe		= dt_cpufreq_probe,
466 	.remove		= dt_cpufreq_remove,
467 };
468 module_platform_driver(dt_cpufreq_platdrv);
469 
470 MODULE_ALIAS("platform:cpufreq-dt");
471 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
472 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
473 MODULE_DESCRIPTION("Generic cpufreq driver");
474 MODULE_LICENSE("GPL");
475