1 /*
2  * Copyright (C) 2016 Linaro.
3  * Viresh Kumar <viresh.kumar@linaro.org>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9 
10 #include <linux/err.h>
11 #include <linux/of.h>
12 #include <linux/of_device.h>
13 #include <linux/platform_device.h>
14 
15 #include "cpufreq-dt.h"
16 
17 /*
18  * Machines for which the cpufreq device is *always* created, mostly used for
19  * platforms using "operating-points" (V1) property.
20  */
21 static const struct of_device_id whitelist[] __initconst = {
22 	{ .compatible = "allwinner,sun4i-a10", },
23 	{ .compatible = "allwinner,sun5i-a10s", },
24 	{ .compatible = "allwinner,sun5i-a13", },
25 	{ .compatible = "allwinner,sun5i-r8", },
26 	{ .compatible = "allwinner,sun6i-a31", },
27 	{ .compatible = "allwinner,sun6i-a31s", },
28 	{ .compatible = "allwinner,sun7i-a20", },
29 	{ .compatible = "allwinner,sun8i-a23", },
30 	{ .compatible = "allwinner,sun8i-a83t", },
31 	{ .compatible = "allwinner,sun8i-h3", },
32 
33 	{ .compatible = "apm,xgene-shadowcat", },
34 
35 	{ .compatible = "arm,integrator-ap", },
36 	{ .compatible = "arm,integrator-cp", },
37 
38 	{ .compatible = "hisilicon,hi3660", },
39 
40 	{ .compatible = "fsl,imx27", },
41 	{ .compatible = "fsl,imx51", },
42 	{ .compatible = "fsl,imx53", },
43 	{ .compatible = "fsl,imx7d", },
44 
45 	{ .compatible = "marvell,berlin", },
46 	{ .compatible = "marvell,pxa250", },
47 	{ .compatible = "marvell,pxa270", },
48 
49 	{ .compatible = "samsung,exynos3250", },
50 	{ .compatible = "samsung,exynos4210", },
51 	{ .compatible = "samsung,exynos5250", },
52 #ifndef CONFIG_BL_SWITCHER
53 	{ .compatible = "samsung,exynos5800", },
54 #endif
55 
56 	{ .compatible = "renesas,emev2", },
57 	{ .compatible = "renesas,r7s72100", },
58 	{ .compatible = "renesas,r8a73a4", },
59 	{ .compatible = "renesas,r8a7740", },
60 	{ .compatible = "renesas,r8a7743", },
61 	{ .compatible = "renesas,r8a7744", },
62 	{ .compatible = "renesas,r8a7745", },
63 	{ .compatible = "renesas,r8a7778", },
64 	{ .compatible = "renesas,r8a7779", },
65 	{ .compatible = "renesas,r8a7790", },
66 	{ .compatible = "renesas,r8a7791", },
67 	{ .compatible = "renesas,r8a7792", },
68 	{ .compatible = "renesas,r8a7793", },
69 	{ .compatible = "renesas,r8a7794", },
70 	{ .compatible = "renesas,sh73a0", },
71 
72 	{ .compatible = "rockchip,rk2928", },
73 	{ .compatible = "rockchip,rk3036", },
74 	{ .compatible = "rockchip,rk3066a", },
75 	{ .compatible = "rockchip,rk3066b", },
76 	{ .compatible = "rockchip,rk3188", },
77 	{ .compatible = "rockchip,rk3228", },
78 	{ .compatible = "rockchip,rk3288", },
79 	{ .compatible = "rockchip,rk3328", },
80 	{ .compatible = "rockchip,rk3366", },
81 	{ .compatible = "rockchip,rk3368", },
82 	{ .compatible = "rockchip,rk3399",
83 	  .data = &(struct cpufreq_dt_platform_data)
84 		{ .have_governor_per_policy = true, },
85 	},
86 
87 	{ .compatible = "st-ericsson,u8500", },
88 	{ .compatible = "st-ericsson,u8540", },
89 	{ .compatible = "st-ericsson,u9500", },
90 	{ .compatible = "st-ericsson,u9540", },
91 
92 	{ .compatible = "ti,omap2", },
93 	{ .compatible = "ti,omap3", },
94 	{ .compatible = "ti,omap4", },
95 	{ .compatible = "ti,omap5", },
96 
97 	{ .compatible = "xlnx,zynq-7000", },
98 	{ .compatible = "xlnx,zynqmp", },
99 
100 	{ }
101 };
102 
103 /*
104  * Machines for which the cpufreq device is *not* created, mostly used for
105  * platforms using "operating-points-v2" property.
106  */
107 static const struct of_device_id blacklist[] __initconst = {
108 	{ .compatible = "calxeda,highbank", },
109 	{ .compatible = "calxeda,ecx-2000", },
110 
111 	{ .compatible = "marvell,armadaxp", },
112 
113 	{ .compatible = "mediatek,mt2701", },
114 	{ .compatible = "mediatek,mt2712", },
115 	{ .compatible = "mediatek,mt7622", },
116 	{ .compatible = "mediatek,mt7623", },
117 	{ .compatible = "mediatek,mt817x", },
118 	{ .compatible = "mediatek,mt8173", },
119 	{ .compatible = "mediatek,mt8176", },
120 
121 	{ .compatible = "nvidia,tegra124", },
122 
123 	{ .compatible = "qcom,apq8096", },
124 	{ .compatible = "qcom,msm8996", },
125 
126 	{ .compatible = "st,stih407", },
127 	{ .compatible = "st,stih410", },
128 
129 	{ .compatible = "sigma,tango4", },
130 
131 	{ .compatible = "ti,am33xx", },
132 	{ .compatible = "ti,am43", },
133 	{ .compatible = "ti,dra7", },
134 
135 	{ }
136 };
137 
138 static bool __init cpu0_node_has_opp_v2_prop(void)
139 {
140 	struct device_node *np = of_cpu_device_node_get(0);
141 	bool ret = false;
142 
143 	if (of_get_property(np, "operating-points-v2", NULL))
144 		ret = true;
145 
146 	of_node_put(np);
147 	return ret;
148 }
149 
150 static int __init cpufreq_dt_platdev_init(void)
151 {
152 	struct device_node *np = of_find_node_by_path("/");
153 	const struct of_device_id *match;
154 	const void *data = NULL;
155 
156 	if (!np)
157 		return -ENODEV;
158 
159 	match = of_match_node(whitelist, np);
160 	if (match) {
161 		data = match->data;
162 		goto create_pdev;
163 	}
164 
165 	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
166 		goto create_pdev;
167 
168 	of_node_put(np);
169 	return -ENODEV;
170 
171 create_pdev:
172 	of_node_put(np);
173 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
174 			       -1, data,
175 			       sizeof(struct cpufreq_dt_platform_data)));
176 }
177 device_initcall(cpufreq_dt_platdev_init);
178