1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * CPPC (Collaborative Processor Performance Control) driver for
4  * interfacing with the CPUfreq layer and governors. See
5  * cppc_acpi.c for CPPC specific methods.
6  *
7  * (C) Copyright 2014, 2015 Linaro Ltd.
8  * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
9  */
10 
11 #define pr_fmt(fmt)	"CPPC Cpufreq:"	fmt
12 
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/delay.h>
16 #include <linux/cpu.h>
17 #include <linux/cpufreq.h>
18 #include <linux/dmi.h>
19 #include <linux/time.h>
20 #include <linux/vmalloc.h>
21 
22 #include <asm/unaligned.h>
23 
24 #include <acpi/cppc_acpi.h>
25 
26 /* Minimum struct length needed for the DMI processor entry we want */
27 #define DMI_ENTRY_PROCESSOR_MIN_LENGTH	48
28 
29 /* Offest in the DMI processor structure for the max frequency */
30 #define DMI_PROCESSOR_MAX_SPEED  0x14
31 
32 /*
33  * These structs contain information parsed from per CPU
34  * ACPI _CPC structures.
35  * e.g. For each CPU the highest, lowest supported
36  * performance capabilities, desired performance level
37  * requested etc.
38  */
39 static struct cppc_cpudata **all_cpu_data;
40 static bool boost_supported;
41 
42 struct cppc_workaround_oem_info {
43 	char oem_id[ACPI_OEM_ID_SIZE + 1];
44 	char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
45 	u32 oem_revision;
46 };
47 
48 static bool apply_hisi_workaround;
49 
50 static struct cppc_workaround_oem_info wa_info[] = {
51 	{
52 		.oem_id		= "HISI  ",
53 		.oem_table_id	= "HIP07   ",
54 		.oem_revision	= 0,
55 	}, {
56 		.oem_id		= "HISI  ",
57 		.oem_table_id	= "HIP08   ",
58 		.oem_revision	= 0,
59 	}
60 };
61 
62 static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu,
63 					unsigned int perf);
64 
65 /*
66  * HISI platform does not support delivered performance counter and
67  * reference performance counter. It can calculate the performance using the
68  * platform specific mechanism. We reuse the desired performance register to
69  * store the real performance calculated by the platform.
70  */
71 static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpunum)
72 {
73 	struct cppc_cpudata *cpudata = all_cpu_data[cpunum];
74 	u64 desired_perf;
75 	int ret;
76 
77 	ret = cppc_get_desired_perf(cpunum, &desired_perf);
78 	if (ret < 0)
79 		return -EIO;
80 
81 	return cppc_cpufreq_perf_to_khz(cpudata, desired_perf);
82 }
83 
84 static void cppc_check_hisi_workaround(void)
85 {
86 	struct acpi_table_header *tbl;
87 	acpi_status status = AE_OK;
88 	int i;
89 
90 	status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
91 	if (ACPI_FAILURE(status) || !tbl)
92 		return;
93 
94 	for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
95 		if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
96 		    !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
97 		    wa_info[i].oem_revision == tbl->oem_revision) {
98 			apply_hisi_workaround = true;
99 			break;
100 		}
101 	}
102 
103 	acpi_put_table(tbl);
104 }
105 
106 /* Callback function used to retrieve the max frequency from DMI */
107 static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private)
108 {
109 	const u8 *dmi_data = (const u8 *)dm;
110 	u16 *mhz = (u16 *)private;
111 
112 	if (dm->type == DMI_ENTRY_PROCESSOR &&
113 	    dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
114 		u16 val = (u16)get_unaligned((const u16 *)
115 				(dmi_data + DMI_PROCESSOR_MAX_SPEED));
116 		*mhz = val > *mhz ? val : *mhz;
117 	}
118 }
119 
120 /* Look up the max frequency in DMI */
121 static u64 cppc_get_dmi_max_khz(void)
122 {
123 	u16 mhz = 0;
124 
125 	dmi_walk(cppc_find_dmi_mhz, &mhz);
126 
127 	/*
128 	 * Real stupid fallback value, just in case there is no
129 	 * actual value set.
130 	 */
131 	mhz = mhz ? mhz : 1;
132 
133 	return (1000 * mhz);
134 }
135 
136 /*
137  * If CPPC lowest_freq and nominal_freq registers are exposed then we can
138  * use them to convert perf to freq and vice versa
139  *
140  * If the perf/freq point lies between Nominal and Lowest, we can treat
141  * (Low perf, Low freq) and (Nom Perf, Nom freq) as 2D co-ordinates of a line
142  * and extrapolate the rest
143  * For perf/freq > Nominal, we use the ratio perf:freq at Nominal for conversion
144  */
145 static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu,
146 					unsigned int perf)
147 {
148 	static u64 max_khz;
149 	struct cppc_perf_caps *caps = &cpu->perf_caps;
150 	u64 mul, div;
151 
152 	if (caps->lowest_freq && caps->nominal_freq) {
153 		if (perf >= caps->nominal_perf) {
154 			mul = caps->nominal_freq;
155 			div = caps->nominal_perf;
156 		} else {
157 			mul = caps->nominal_freq - caps->lowest_freq;
158 			div = caps->nominal_perf - caps->lowest_perf;
159 		}
160 	} else {
161 		if (!max_khz)
162 			max_khz = cppc_get_dmi_max_khz();
163 		mul = max_khz;
164 		div = cpu->perf_caps.highest_perf;
165 	}
166 	return (u64)perf * mul / div;
167 }
168 
169 static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu,
170 					unsigned int freq)
171 {
172 	static u64 max_khz;
173 	struct cppc_perf_caps *caps = &cpu->perf_caps;
174 	u64  mul, div;
175 
176 	if (caps->lowest_freq && caps->nominal_freq) {
177 		if (freq >= caps->nominal_freq) {
178 			mul = caps->nominal_perf;
179 			div = caps->nominal_freq;
180 		} else {
181 			mul = caps->lowest_perf;
182 			div = caps->lowest_freq;
183 		}
184 	} else {
185 		if (!max_khz)
186 			max_khz = cppc_get_dmi_max_khz();
187 		mul = cpu->perf_caps.highest_perf;
188 		div = max_khz;
189 	}
190 
191 	return (u64)freq * mul / div;
192 }
193 
194 static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
195 		unsigned int target_freq,
196 		unsigned int relation)
197 {
198 	struct cppc_cpudata *cpu;
199 	struct cpufreq_freqs freqs;
200 	u32 desired_perf;
201 	int ret = 0;
202 
203 	cpu = all_cpu_data[policy->cpu];
204 
205 	desired_perf = cppc_cpufreq_khz_to_perf(cpu, target_freq);
206 	/* Return if it is exactly the same perf */
207 	if (desired_perf == cpu->perf_ctrls.desired_perf)
208 		return ret;
209 
210 	cpu->perf_ctrls.desired_perf = desired_perf;
211 	freqs.old = policy->cur;
212 	freqs.new = target_freq;
213 
214 	cpufreq_freq_transition_begin(policy, &freqs);
215 	ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls);
216 	cpufreq_freq_transition_end(policy, &freqs, ret != 0);
217 
218 	if (ret)
219 		pr_debug("Failed to set target on CPU:%d. ret:%d\n",
220 				cpu->cpu, ret);
221 
222 	return ret;
223 }
224 
225 static int cppc_verify_policy(struct cpufreq_policy_data *policy)
226 {
227 	cpufreq_verify_within_cpu_limits(policy);
228 	return 0;
229 }
230 
231 static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
232 {
233 	int cpu_num = policy->cpu;
234 	struct cppc_cpudata *cpu = all_cpu_data[cpu_num];
235 	int ret;
236 
237 	cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf;
238 
239 	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
240 	if (ret)
241 		pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
242 				cpu->perf_caps.lowest_perf, cpu_num, ret);
243 }
244 
245 /*
246  * The PCC subspace describes the rate at which platform can accept commands
247  * on the shared PCC channel (including READs which do not count towards freq
248  * trasition requests), so ideally we need to use the PCC values as a fallback
249  * if we don't have a platform specific transition_delay_us
250  */
251 #ifdef CONFIG_ARM64
252 #include <asm/cputype.h>
253 
254 static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
255 {
256 	unsigned long implementor = read_cpuid_implementor();
257 	unsigned long part_num = read_cpuid_part_number();
258 	unsigned int delay_us = 0;
259 
260 	switch (implementor) {
261 	case ARM_CPU_IMP_QCOM:
262 		switch (part_num) {
263 		case QCOM_CPU_PART_FALKOR_V1:
264 		case QCOM_CPU_PART_FALKOR:
265 			delay_us = 10000;
266 			break;
267 		default:
268 			delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
269 			break;
270 		}
271 		break;
272 	default:
273 		delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
274 		break;
275 	}
276 
277 	return delay_us;
278 }
279 
280 #else
281 
282 static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
283 {
284 	return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
285 }
286 #endif
287 
288 static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
289 {
290 	struct cppc_cpudata *cpu;
291 	unsigned int cpu_num = policy->cpu;
292 	int ret = 0;
293 
294 	cpu = all_cpu_data[policy->cpu];
295 
296 	cpu->cpu = cpu_num;
297 	ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps);
298 
299 	if (ret) {
300 		pr_debug("Err reading CPU%d perf capabilities. ret:%d\n",
301 				cpu_num, ret);
302 		return ret;
303 	}
304 
305 	/* Convert the lowest and nominal freq from MHz to KHz */
306 	cpu->perf_caps.lowest_freq *= 1000;
307 	cpu->perf_caps.nominal_freq *= 1000;
308 
309 	/*
310 	 * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
311 	 * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
312 	 */
313 	policy->min = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_nonlinear_perf);
314 	policy->max = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
315 
316 	/*
317 	 * Set cpuinfo.min_freq to Lowest to make the full range of performance
318 	 * available if userspace wants to use any perf between lowest & lowest
319 	 * nonlinear perf
320 	 */
321 	policy->cpuinfo.min_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_perf);
322 	policy->cpuinfo.max_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
323 
324 	policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num);
325 	policy->shared_type = cpu->shared_type;
326 
327 	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
328 		int i;
329 
330 		cpumask_copy(policy->cpus, cpu->shared_cpu_map);
331 
332 		for_each_cpu(i, policy->cpus) {
333 			if (unlikely(i == policy->cpu))
334 				continue;
335 
336 			memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
337 			       sizeof(cpu->perf_caps));
338 		}
339 	} else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
340 		/* Support only SW_ANY for now. */
341 		pr_debug("Unsupported CPU co-ord type\n");
342 		return -EFAULT;
343 	}
344 
345 	cpu->cur_policy = policy;
346 
347 	/*
348 	 * If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
349 	 * is supported.
350 	 */
351 	if (cpu->perf_caps.highest_perf > cpu->perf_caps.nominal_perf)
352 		boost_supported = true;
353 
354 	/* Set policy->cur to max now. The governors will adjust later. */
355 	policy->cur = cppc_cpufreq_perf_to_khz(cpu,
356 					cpu->perf_caps.highest_perf);
357 	cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf;
358 
359 	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
360 	if (ret)
361 		pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
362 				cpu->perf_caps.highest_perf, cpu_num, ret);
363 
364 	return ret;
365 }
366 
367 static inline u64 get_delta(u64 t1, u64 t0)
368 {
369 	if (t1 > t0 || t0 > ~(u32)0)
370 		return t1 - t0;
371 
372 	return (u32)t1 - (u32)t0;
373 }
374 
375 static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu,
376 				     struct cppc_perf_fb_ctrs fb_ctrs_t0,
377 				     struct cppc_perf_fb_ctrs fb_ctrs_t1)
378 {
379 	u64 delta_reference, delta_delivered;
380 	u64 reference_perf, delivered_perf;
381 
382 	reference_perf = fb_ctrs_t0.reference_perf;
383 
384 	delta_reference = get_delta(fb_ctrs_t1.reference,
385 				    fb_ctrs_t0.reference);
386 	delta_delivered = get_delta(fb_ctrs_t1.delivered,
387 				    fb_ctrs_t0.delivered);
388 
389 	/* Check to avoid divide-by zero */
390 	if (delta_reference || delta_delivered)
391 		delivered_perf = (reference_perf * delta_delivered) /
392 					delta_reference;
393 	else
394 		delivered_perf = cpu->perf_ctrls.desired_perf;
395 
396 	return cppc_cpufreq_perf_to_khz(cpu, delivered_perf);
397 }
398 
399 static unsigned int cppc_cpufreq_get_rate(unsigned int cpunum)
400 {
401 	struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
402 	struct cppc_cpudata *cpu = all_cpu_data[cpunum];
403 	int ret;
404 
405 	if (apply_hisi_workaround)
406 		return hisi_cppc_cpufreq_get_rate(cpunum);
407 
408 	ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t0);
409 	if (ret)
410 		return ret;
411 
412 	udelay(2); /* 2usec delay between sampling */
413 
414 	ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t1);
415 	if (ret)
416 		return ret;
417 
418 	return cppc_get_rate_from_fbctrs(cpu, fb_ctrs_t0, fb_ctrs_t1);
419 }
420 
421 static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
422 {
423 	struct cppc_cpudata *cpudata;
424 	int ret;
425 
426 	if (!boost_supported) {
427 		pr_err("BOOST not supported by CPU or firmware\n");
428 		return -EINVAL;
429 	}
430 
431 	cpudata = all_cpu_data[policy->cpu];
432 	if (state)
433 		policy->max = cppc_cpufreq_perf_to_khz(cpudata,
434 					cpudata->perf_caps.highest_perf);
435 	else
436 		policy->max = cppc_cpufreq_perf_to_khz(cpudata,
437 					cpudata->perf_caps.nominal_perf);
438 	policy->cpuinfo.max_freq = policy->max;
439 
440 	ret = freq_qos_update_request(policy->max_freq_req, policy->max);
441 	if (ret < 0)
442 		return ret;
443 
444 	return 0;
445 }
446 
447 static struct cpufreq_driver cppc_cpufreq_driver = {
448 	.flags = CPUFREQ_CONST_LOOPS,
449 	.verify = cppc_verify_policy,
450 	.target = cppc_cpufreq_set_target,
451 	.get = cppc_cpufreq_get_rate,
452 	.init = cppc_cpufreq_cpu_init,
453 	.stop_cpu = cppc_cpufreq_stop_cpu,
454 	.set_boost = cppc_cpufreq_set_boost,
455 	.name = "cppc_cpufreq",
456 };
457 
458 static int __init cppc_cpufreq_init(void)
459 {
460 	int i, ret = 0;
461 	struct cppc_cpudata *cpu;
462 
463 	if (acpi_disabled)
464 		return -ENODEV;
465 
466 	all_cpu_data = kcalloc(num_possible_cpus(), sizeof(void *),
467 			       GFP_KERNEL);
468 	if (!all_cpu_data)
469 		return -ENOMEM;
470 
471 	for_each_possible_cpu(i) {
472 		all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
473 		if (!all_cpu_data[i])
474 			goto out;
475 
476 		cpu = all_cpu_data[i];
477 		if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL))
478 			goto out;
479 	}
480 
481 	ret = acpi_get_psd_map(all_cpu_data);
482 	if (ret) {
483 		pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n");
484 		goto out;
485 	}
486 
487 	cppc_check_hisi_workaround();
488 
489 	ret = cpufreq_register_driver(&cppc_cpufreq_driver);
490 	if (ret)
491 		goto out;
492 
493 	return ret;
494 
495 out:
496 	for_each_possible_cpu(i) {
497 		cpu = all_cpu_data[i];
498 		if (!cpu)
499 			break;
500 		free_cpumask_var(cpu->shared_cpu_map);
501 		kfree(cpu);
502 	}
503 
504 	kfree(all_cpu_data);
505 	return -ENODEV;
506 }
507 
508 static void __exit cppc_cpufreq_exit(void)
509 {
510 	struct cppc_cpudata *cpu;
511 	int i;
512 
513 	cpufreq_unregister_driver(&cppc_cpufreq_driver);
514 
515 	for_each_possible_cpu(i) {
516 		cpu = all_cpu_data[i];
517 		free_cpumask_var(cpu->shared_cpu_map);
518 		kfree(cpu);
519 	}
520 
521 	kfree(all_cpu_data);
522 }
523 
524 module_exit(cppc_cpufreq_exit);
525 MODULE_AUTHOR("Ashwin Chaugule");
526 MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
527 MODULE_LICENSE("GPL");
528 
529 late_initcall(cppc_cpufreq_init);
530 
531 static const struct acpi_device_id cppc_acpi_ids[] __used = {
532 	{ACPI_PROCESSOR_DEVICE_HID, },
533 	{}
534 };
535 
536 MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);
537