1 /* 2 * acpi-cpufreq.c - ACPI Processor P-States Driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 8 * 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License along 22 * with this program; if not, write to the Free Software Foundation, Inc., 23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 24 * 25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 26 */ 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/init.h> 31 #include <linux/smp.h> 32 #include <linux/sched.h> 33 #include <linux/cpufreq.h> 34 #include <linux/compiler.h> 35 #include <linux/dmi.h> 36 #include <linux/slab.h> 37 38 #include <linux/acpi.h> 39 #include <linux/io.h> 40 #include <linux/delay.h> 41 #include <linux/uaccess.h> 42 43 #include <acpi/processor.h> 44 45 #include <asm/msr.h> 46 #include <asm/processor.h> 47 #include <asm/cpufeature.h> 48 49 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 50 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 51 MODULE_LICENSE("GPL"); 52 53 #define PFX "acpi-cpufreq: " 54 55 enum { 56 UNDEFINED_CAPABLE = 0, 57 SYSTEM_INTEL_MSR_CAPABLE, 58 SYSTEM_AMD_MSR_CAPABLE, 59 SYSTEM_IO_CAPABLE, 60 }; 61 62 #define INTEL_MSR_RANGE (0xffff) 63 #define AMD_MSR_RANGE (0x7) 64 65 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 66 67 struct acpi_cpufreq_data { 68 struct acpi_processor_performance *acpi_data; 69 struct cpufreq_frequency_table *freq_table; 70 unsigned int resume; 71 unsigned int cpu_feature; 72 cpumask_var_t freqdomain_cpus; 73 }; 74 75 static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data); 76 77 /* acpi_perf_data is a pointer to percpu data. */ 78 static struct acpi_processor_performance __percpu *acpi_perf_data; 79 80 static struct cpufreq_driver acpi_cpufreq_driver; 81 82 static unsigned int acpi_pstate_strict; 83 static bool boost_enabled, boost_supported; 84 static struct msr __percpu *msrs; 85 86 static bool boost_state(unsigned int cpu) 87 { 88 u32 lo, hi; 89 u64 msr; 90 91 switch (boot_cpu_data.x86_vendor) { 92 case X86_VENDOR_INTEL: 93 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 94 msr = lo | ((u64)hi << 32); 95 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 96 case X86_VENDOR_AMD: 97 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 98 msr = lo | ((u64)hi << 32); 99 return !(msr & MSR_K7_HWCR_CPB_DIS); 100 } 101 return false; 102 } 103 104 static void boost_set_msrs(bool enable, const struct cpumask *cpumask) 105 { 106 u32 cpu; 107 u32 msr_addr; 108 u64 msr_mask; 109 110 switch (boot_cpu_data.x86_vendor) { 111 case X86_VENDOR_INTEL: 112 msr_addr = MSR_IA32_MISC_ENABLE; 113 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 114 break; 115 case X86_VENDOR_AMD: 116 msr_addr = MSR_K7_HWCR; 117 msr_mask = MSR_K7_HWCR_CPB_DIS; 118 break; 119 default: 120 return; 121 } 122 123 rdmsr_on_cpus(cpumask, msr_addr, msrs); 124 125 for_each_cpu(cpu, cpumask) { 126 struct msr *reg = per_cpu_ptr(msrs, cpu); 127 if (enable) 128 reg->q &= ~msr_mask; 129 else 130 reg->q |= msr_mask; 131 } 132 133 wrmsr_on_cpus(cpumask, msr_addr, msrs); 134 } 135 136 static ssize_t _store_boost(const char *buf, size_t count) 137 { 138 int ret; 139 unsigned long val = 0; 140 141 if (!boost_supported) 142 return -EINVAL; 143 144 ret = kstrtoul(buf, 10, &val); 145 if (ret || (val > 1)) 146 return -EINVAL; 147 148 if ((val && boost_enabled) || (!val && !boost_enabled)) 149 return count; 150 151 get_online_cpus(); 152 153 boost_set_msrs(val, cpu_online_mask); 154 155 put_online_cpus(); 156 157 boost_enabled = val; 158 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); 159 160 return count; 161 } 162 163 static ssize_t store_global_boost(struct kobject *kobj, struct attribute *attr, 164 const char *buf, size_t count) 165 { 166 return _store_boost(buf, count); 167 } 168 169 static ssize_t show_global_boost(struct kobject *kobj, 170 struct attribute *attr, char *buf) 171 { 172 return sprintf(buf, "%u\n", boost_enabled); 173 } 174 175 static struct global_attr global_boost = __ATTR(boost, 0644, 176 show_global_boost, 177 store_global_boost); 178 179 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 180 { 181 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); 182 183 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 184 } 185 186 cpufreq_freq_attr_ro(freqdomain_cpus); 187 188 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 189 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 190 size_t count) 191 { 192 return _store_boost(buf, count); 193 } 194 195 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 196 { 197 return sprintf(buf, "%u\n", boost_enabled); 198 } 199 200 cpufreq_freq_attr_rw(cpb); 201 #endif 202 203 static int check_est_cpu(unsigned int cpuid) 204 { 205 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 206 207 return cpu_has(cpu, X86_FEATURE_EST); 208 } 209 210 static int check_amd_hwpstate_cpu(unsigned int cpuid) 211 { 212 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 213 214 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 215 } 216 217 static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) 218 { 219 struct acpi_processor_performance *perf; 220 int i; 221 222 perf = data->acpi_data; 223 224 for (i = 0; i < perf->state_count; i++) { 225 if (value == perf->states[i].status) 226 return data->freq_table[i].frequency; 227 } 228 return 0; 229 } 230 231 static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) 232 { 233 int i; 234 struct acpi_processor_performance *perf; 235 236 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 237 msr &= AMD_MSR_RANGE; 238 else 239 msr &= INTEL_MSR_RANGE; 240 241 perf = data->acpi_data; 242 243 for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { 244 if (msr == perf->states[data->freq_table[i].driver_data].status) 245 return data->freq_table[i].frequency; 246 } 247 return data->freq_table[0].frequency; 248 } 249 250 static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) 251 { 252 switch (data->cpu_feature) { 253 case SYSTEM_INTEL_MSR_CAPABLE: 254 case SYSTEM_AMD_MSR_CAPABLE: 255 return extract_msr(val, data); 256 case SYSTEM_IO_CAPABLE: 257 return extract_io(val, data); 258 default: 259 return 0; 260 } 261 } 262 263 struct msr_addr { 264 u32 reg; 265 }; 266 267 struct io_addr { 268 u16 port; 269 u8 bit_width; 270 }; 271 272 struct drv_cmd { 273 unsigned int type; 274 const struct cpumask *mask; 275 union { 276 struct msr_addr msr; 277 struct io_addr io; 278 } addr; 279 u32 val; 280 }; 281 282 /* Called via smp_call_function_single(), on the target CPU */ 283 static void do_drv_read(void *_cmd) 284 { 285 struct drv_cmd *cmd = _cmd; 286 u32 h; 287 288 switch (cmd->type) { 289 case SYSTEM_INTEL_MSR_CAPABLE: 290 case SYSTEM_AMD_MSR_CAPABLE: 291 rdmsr(cmd->addr.msr.reg, cmd->val, h); 292 break; 293 case SYSTEM_IO_CAPABLE: 294 acpi_os_read_port((acpi_io_address)cmd->addr.io.port, 295 &cmd->val, 296 (u32)cmd->addr.io.bit_width); 297 break; 298 default: 299 break; 300 } 301 } 302 303 /* Called via smp_call_function_many(), on the target CPUs */ 304 static void do_drv_write(void *_cmd) 305 { 306 struct drv_cmd *cmd = _cmd; 307 u32 lo, hi; 308 309 switch (cmd->type) { 310 case SYSTEM_INTEL_MSR_CAPABLE: 311 rdmsr(cmd->addr.msr.reg, lo, hi); 312 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); 313 wrmsr(cmd->addr.msr.reg, lo, hi); 314 break; 315 case SYSTEM_AMD_MSR_CAPABLE: 316 wrmsr(cmd->addr.msr.reg, cmd->val, 0); 317 break; 318 case SYSTEM_IO_CAPABLE: 319 acpi_os_write_port((acpi_io_address)cmd->addr.io.port, 320 cmd->val, 321 (u32)cmd->addr.io.bit_width); 322 break; 323 default: 324 break; 325 } 326 } 327 328 static void drv_read(struct drv_cmd *cmd) 329 { 330 int err; 331 cmd->val = 0; 332 333 err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1); 334 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 335 } 336 337 static void drv_write(struct drv_cmd *cmd) 338 { 339 int this_cpu; 340 341 this_cpu = get_cpu(); 342 if (cpumask_test_cpu(this_cpu, cmd->mask)) 343 do_drv_write(cmd); 344 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1); 345 put_cpu(); 346 } 347 348 static u32 get_cur_val(const struct cpumask *mask) 349 { 350 struct acpi_processor_performance *perf; 351 struct drv_cmd cmd; 352 353 if (unlikely(cpumask_empty(mask))) 354 return 0; 355 356 switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) { 357 case SYSTEM_INTEL_MSR_CAPABLE: 358 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 359 cmd.addr.msr.reg = MSR_IA32_PERF_CTL; 360 break; 361 case SYSTEM_AMD_MSR_CAPABLE: 362 cmd.type = SYSTEM_AMD_MSR_CAPABLE; 363 cmd.addr.msr.reg = MSR_AMD_PERF_CTL; 364 break; 365 case SYSTEM_IO_CAPABLE: 366 cmd.type = SYSTEM_IO_CAPABLE; 367 perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data; 368 cmd.addr.io.port = perf->control_register.address; 369 cmd.addr.io.bit_width = perf->control_register.bit_width; 370 break; 371 default: 372 return 0; 373 } 374 375 cmd.mask = mask; 376 drv_read(&cmd); 377 378 pr_debug("get_cur_val = %u\n", cmd.val); 379 380 return cmd.val; 381 } 382 383 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 384 { 385 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu); 386 unsigned int freq; 387 unsigned int cached_freq; 388 389 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); 390 391 if (unlikely(data == NULL || 392 data->acpi_data == NULL || data->freq_table == NULL)) { 393 return 0; 394 } 395 396 cached_freq = data->freq_table[data->acpi_data->state].frequency; 397 freq = extract_freq(get_cur_val(cpumask_of(cpu)), data); 398 if (freq != cached_freq) { 399 /* 400 * The dreaded BIOS frequency change behind our back. 401 * Force set the frequency on next target call. 402 */ 403 data->resume = 1; 404 } 405 406 pr_debug("cur freq = %u\n", freq); 407 408 return freq; 409 } 410 411 static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq, 412 struct acpi_cpufreq_data *data) 413 { 414 unsigned int cur_freq; 415 unsigned int i; 416 417 for (i = 0; i < 100; i++) { 418 cur_freq = extract_freq(get_cur_val(mask), data); 419 if (cur_freq == freq) 420 return 1; 421 udelay(10); 422 } 423 return 0; 424 } 425 426 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 427 unsigned int target_freq, unsigned int relation) 428 { 429 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); 430 struct acpi_processor_performance *perf; 431 struct cpufreq_freqs freqs; 432 struct drv_cmd cmd; 433 unsigned int next_state = 0; /* Index into freq_table */ 434 unsigned int next_perf_state = 0; /* Index into perf table */ 435 int result = 0; 436 437 pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); 438 439 if (unlikely(data == NULL || 440 data->acpi_data == NULL || data->freq_table == NULL)) { 441 return -ENODEV; 442 } 443 444 perf = data->acpi_data; 445 result = cpufreq_frequency_table_target(policy, 446 data->freq_table, 447 target_freq, 448 relation, &next_state); 449 if (unlikely(result)) { 450 result = -ENODEV; 451 goto out; 452 } 453 454 next_perf_state = data->freq_table[next_state].driver_data; 455 if (perf->state == next_perf_state) { 456 if (unlikely(data->resume)) { 457 pr_debug("Called after resume, resetting to P%d\n", 458 next_perf_state); 459 data->resume = 0; 460 } else { 461 pr_debug("Already at target state (P%d)\n", 462 next_perf_state); 463 goto out; 464 } 465 } 466 467 switch (data->cpu_feature) { 468 case SYSTEM_INTEL_MSR_CAPABLE: 469 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 470 cmd.addr.msr.reg = MSR_IA32_PERF_CTL; 471 cmd.val = (u32) perf->states[next_perf_state].control; 472 break; 473 case SYSTEM_AMD_MSR_CAPABLE: 474 cmd.type = SYSTEM_AMD_MSR_CAPABLE; 475 cmd.addr.msr.reg = MSR_AMD_PERF_CTL; 476 cmd.val = (u32) perf->states[next_perf_state].control; 477 break; 478 case SYSTEM_IO_CAPABLE: 479 cmd.type = SYSTEM_IO_CAPABLE; 480 cmd.addr.io.port = perf->control_register.address; 481 cmd.addr.io.bit_width = perf->control_register.bit_width; 482 cmd.val = (u32) perf->states[next_perf_state].control; 483 break; 484 default: 485 result = -ENODEV; 486 goto out; 487 } 488 489 /* cpufreq holds the hotplug lock, so we are safe from here on */ 490 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) 491 cmd.mask = policy->cpus; 492 else 493 cmd.mask = cpumask_of(policy->cpu); 494 495 freqs.old = perf->states[perf->state].core_frequency * 1000; 496 freqs.new = data->freq_table[next_state].frequency; 497 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 498 499 drv_write(&cmd); 500 501 if (acpi_pstate_strict) { 502 if (!check_freqs(cmd.mask, freqs.new, data)) { 503 pr_debug("acpi_cpufreq_target failed (%d)\n", 504 policy->cpu); 505 result = -EAGAIN; 506 freqs.new = freqs.old; 507 } 508 } 509 510 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 511 512 if (!result) 513 perf->state = next_perf_state; 514 515 out: 516 return result; 517 } 518 519 static int acpi_cpufreq_verify(struct cpufreq_policy *policy) 520 { 521 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); 522 523 pr_debug("acpi_cpufreq_verify\n"); 524 525 return cpufreq_frequency_table_verify(policy, data->freq_table); 526 } 527 528 static unsigned long 529 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 530 { 531 struct acpi_processor_performance *perf = data->acpi_data; 532 533 if (cpu_khz) { 534 /* search the closest match to cpu_khz */ 535 unsigned int i; 536 unsigned long freq; 537 unsigned long freqn = perf->states[0].core_frequency * 1000; 538 539 for (i = 0; i < (perf->state_count-1); i++) { 540 freq = freqn; 541 freqn = perf->states[i+1].core_frequency * 1000; 542 if ((2 * cpu_khz) > (freqn + freq)) { 543 perf->state = i; 544 return freq; 545 } 546 } 547 perf->state = perf->state_count-1; 548 return freqn; 549 } else { 550 /* assume CPU is at P0... */ 551 perf->state = 0; 552 return perf->states[0].core_frequency * 1000; 553 } 554 } 555 556 static void free_acpi_perf_data(void) 557 { 558 unsigned int i; 559 560 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 561 for_each_possible_cpu(i) 562 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 563 ->shared_cpu_map); 564 free_percpu(acpi_perf_data); 565 } 566 567 static int boost_notify(struct notifier_block *nb, unsigned long action, 568 void *hcpu) 569 { 570 unsigned cpu = (long)hcpu; 571 const struct cpumask *cpumask; 572 573 cpumask = get_cpu_mask(cpu); 574 575 /* 576 * Clear the boost-disable bit on the CPU_DOWN path so that 577 * this cpu cannot block the remaining ones from boosting. On 578 * the CPU_UP path we simply keep the boost-disable flag in 579 * sync with the current global state. 580 */ 581 582 switch (action) { 583 case CPU_UP_PREPARE: 584 case CPU_UP_PREPARE_FROZEN: 585 boost_set_msrs(boost_enabled, cpumask); 586 break; 587 588 case CPU_DOWN_PREPARE: 589 case CPU_DOWN_PREPARE_FROZEN: 590 boost_set_msrs(1, cpumask); 591 break; 592 593 default: 594 break; 595 } 596 597 return NOTIFY_OK; 598 } 599 600 601 static struct notifier_block boost_nb = { 602 .notifier_call = boost_notify, 603 }; 604 605 /* 606 * acpi_cpufreq_early_init - initialize ACPI P-States library 607 * 608 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 609 * in order to determine correct frequency and voltage pairings. We can 610 * do _PDC and _PSD and find out the processor dependency for the 611 * actual init that will happen later... 612 */ 613 static int __init acpi_cpufreq_early_init(void) 614 { 615 unsigned int i; 616 pr_debug("acpi_cpufreq_early_init\n"); 617 618 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 619 if (!acpi_perf_data) { 620 pr_debug("Memory allocation error for acpi_perf_data.\n"); 621 return -ENOMEM; 622 } 623 for_each_possible_cpu(i) { 624 if (!zalloc_cpumask_var_node( 625 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 626 GFP_KERNEL, cpu_to_node(i))) { 627 628 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 629 free_acpi_perf_data(); 630 return -ENOMEM; 631 } 632 } 633 634 /* Do initialization in ACPI core */ 635 acpi_processor_preregister_performance(acpi_perf_data); 636 return 0; 637 } 638 639 #ifdef CONFIG_SMP 640 /* 641 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 642 * or do it in BIOS firmware and won't inform about it to OS. If not 643 * detected, this has a side effect of making CPU run at a different speed 644 * than OS intended it to run at. Detect it and handle it cleanly. 645 */ 646 static int bios_with_sw_any_bug; 647 648 static int sw_any_bug_found(const struct dmi_system_id *d) 649 { 650 bios_with_sw_any_bug = 1; 651 return 0; 652 } 653 654 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 655 { 656 .callback = sw_any_bug_found, 657 .ident = "Supermicro Server X6DLP", 658 .matches = { 659 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 660 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 661 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 662 }, 663 }, 664 { } 665 }; 666 667 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 668 { 669 /* Intel Xeon Processor 7100 Series Specification Update 670 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf 671 * AL30: A Machine Check Exception (MCE) Occurring during an 672 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 673 * Both Processor Cores to Lock Up. */ 674 if (c->x86_vendor == X86_VENDOR_INTEL) { 675 if ((c->x86 == 15) && 676 (c->x86_model == 6) && 677 (c->x86_mask == 8)) { 678 printk(KERN_INFO "acpi-cpufreq: Intel(R) " 679 "Xeon(R) 7100 Errata AL30, processors may " 680 "lock up on frequency changes: disabling " 681 "acpi-cpufreq.\n"); 682 return -ENODEV; 683 } 684 } 685 return 0; 686 } 687 #endif 688 689 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 690 { 691 unsigned int i; 692 unsigned int valid_states = 0; 693 unsigned int cpu = policy->cpu; 694 struct acpi_cpufreq_data *data; 695 unsigned int result = 0; 696 struct cpuinfo_x86 *c = &cpu_data(policy->cpu); 697 struct acpi_processor_performance *perf; 698 #ifdef CONFIG_SMP 699 static int blacklisted; 700 #endif 701 702 pr_debug("acpi_cpufreq_cpu_init\n"); 703 704 #ifdef CONFIG_SMP 705 if (blacklisted) 706 return blacklisted; 707 blacklisted = acpi_cpufreq_blacklist(c); 708 if (blacklisted) 709 return blacklisted; 710 #endif 711 712 data = kzalloc(sizeof(*data), GFP_KERNEL); 713 if (!data) 714 return -ENOMEM; 715 716 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 717 result = -ENOMEM; 718 goto err_free; 719 } 720 721 data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu); 722 per_cpu(acfreq_data, cpu) = data; 723 724 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 725 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 726 727 result = acpi_processor_register_performance(data->acpi_data, cpu); 728 if (result) 729 goto err_free_mask; 730 731 perf = data->acpi_data; 732 policy->shared_type = perf->shared_type; 733 734 /* 735 * Will let policy->cpus know about dependency only when software 736 * coordination is required. 737 */ 738 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 739 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 740 cpumask_copy(policy->cpus, perf->shared_cpu_map); 741 } 742 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 743 744 #ifdef CONFIG_SMP 745 dmi_check_system(sw_any_bug_dmi_table); 746 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 747 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 748 cpumask_copy(policy->cpus, cpu_core_mask(cpu)); 749 } 750 751 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { 752 cpumask_clear(policy->cpus); 753 cpumask_set_cpu(cpu, policy->cpus); 754 cpumask_copy(data->freqdomain_cpus, cpu_sibling_mask(cpu)); 755 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 756 pr_info_once(PFX "overriding BIOS provided _PSD data\n"); 757 } 758 #endif 759 760 /* capability check */ 761 if (perf->state_count <= 1) { 762 pr_debug("No P-States\n"); 763 result = -ENODEV; 764 goto err_unreg; 765 } 766 767 if (perf->control_register.space_id != perf->status_register.space_id) { 768 result = -ENODEV; 769 goto err_unreg; 770 } 771 772 switch (perf->control_register.space_id) { 773 case ACPI_ADR_SPACE_SYSTEM_IO: 774 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 775 boot_cpu_data.x86 == 0xf) { 776 pr_debug("AMD K8 systems must use native drivers.\n"); 777 result = -ENODEV; 778 goto err_unreg; 779 } 780 pr_debug("SYSTEM IO addr space\n"); 781 data->cpu_feature = SYSTEM_IO_CAPABLE; 782 break; 783 case ACPI_ADR_SPACE_FIXED_HARDWARE: 784 pr_debug("HARDWARE addr space\n"); 785 if (check_est_cpu(cpu)) { 786 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 787 break; 788 } 789 if (check_amd_hwpstate_cpu(cpu)) { 790 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 791 break; 792 } 793 result = -ENODEV; 794 goto err_unreg; 795 default: 796 pr_debug("Unknown addr space %d\n", 797 (u32) (perf->control_register.space_id)); 798 result = -ENODEV; 799 goto err_unreg; 800 } 801 802 data->freq_table = kmalloc(sizeof(*data->freq_table) * 803 (perf->state_count+1), GFP_KERNEL); 804 if (!data->freq_table) { 805 result = -ENOMEM; 806 goto err_unreg; 807 } 808 809 /* detect transition latency */ 810 policy->cpuinfo.transition_latency = 0; 811 for (i = 0; i < perf->state_count; i++) { 812 if ((perf->states[i].transition_latency * 1000) > 813 policy->cpuinfo.transition_latency) 814 policy->cpuinfo.transition_latency = 815 perf->states[i].transition_latency * 1000; 816 } 817 818 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 819 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 820 policy->cpuinfo.transition_latency > 20 * 1000) { 821 policy->cpuinfo.transition_latency = 20 * 1000; 822 printk_once(KERN_INFO 823 "P-state transition latency capped at 20 uS\n"); 824 } 825 826 /* table init */ 827 for (i = 0; i < perf->state_count; i++) { 828 if (i > 0 && perf->states[i].core_frequency >= 829 data->freq_table[valid_states-1].frequency / 1000) 830 continue; 831 832 data->freq_table[valid_states].driver_data = i; 833 data->freq_table[valid_states].frequency = 834 perf->states[i].core_frequency * 1000; 835 valid_states++; 836 } 837 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 838 perf->state = 0; 839 840 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); 841 if (result) 842 goto err_freqfree; 843 844 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) 845 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n"); 846 847 switch (perf->control_register.space_id) { 848 case ACPI_ADR_SPACE_SYSTEM_IO: 849 /* Current speed is unknown and not detectable by IO port */ 850 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 851 break; 852 case ACPI_ADR_SPACE_FIXED_HARDWARE: 853 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 854 policy->cur = get_cur_freq_on_cpu(cpu); 855 break; 856 default: 857 break; 858 } 859 860 /* notify BIOS that we exist */ 861 acpi_processor_notify_smm(THIS_MODULE); 862 863 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 864 for (i = 0; i < perf->state_count; i++) 865 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 866 (i == perf->state ? '*' : ' '), i, 867 (u32) perf->states[i].core_frequency, 868 (u32) perf->states[i].power, 869 (u32) perf->states[i].transition_latency); 870 871 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); 872 873 /* 874 * the first call to ->target() should result in us actually 875 * writing something to the appropriate registers. 876 */ 877 data->resume = 1; 878 879 return result; 880 881 err_freqfree: 882 kfree(data->freq_table); 883 err_unreg: 884 acpi_processor_unregister_performance(perf, cpu); 885 err_free_mask: 886 free_cpumask_var(data->freqdomain_cpus); 887 err_free: 888 kfree(data); 889 per_cpu(acfreq_data, cpu) = NULL; 890 891 return result; 892 } 893 894 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 895 { 896 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); 897 898 pr_debug("acpi_cpufreq_cpu_exit\n"); 899 900 if (data) { 901 cpufreq_frequency_table_put_attr(policy->cpu); 902 per_cpu(acfreq_data, policy->cpu) = NULL; 903 acpi_processor_unregister_performance(data->acpi_data, 904 policy->cpu); 905 free_cpumask_var(data->freqdomain_cpus); 906 kfree(data->freq_table); 907 kfree(data); 908 } 909 910 return 0; 911 } 912 913 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 914 { 915 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); 916 917 pr_debug("acpi_cpufreq_resume\n"); 918 919 data->resume = 1; 920 921 return 0; 922 } 923 924 static struct freq_attr *acpi_cpufreq_attr[] = { 925 &cpufreq_freq_attr_scaling_available_freqs, 926 &freqdomain_cpus, 927 NULL, /* this is a placeholder for cpb, do not remove */ 928 NULL, 929 }; 930 931 static struct cpufreq_driver acpi_cpufreq_driver = { 932 .verify = acpi_cpufreq_verify, 933 .target = acpi_cpufreq_target, 934 .bios_limit = acpi_processor_get_bios_limit, 935 .init = acpi_cpufreq_cpu_init, 936 .exit = acpi_cpufreq_cpu_exit, 937 .resume = acpi_cpufreq_resume, 938 .name = "acpi-cpufreq", 939 .attr = acpi_cpufreq_attr, 940 }; 941 942 static void __init acpi_cpufreq_boost_init(void) 943 { 944 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) { 945 msrs = msrs_alloc(); 946 947 if (!msrs) 948 return; 949 950 boost_supported = true; 951 boost_enabled = boost_state(0); 952 953 get_online_cpus(); 954 955 /* Force all MSRs to the same value */ 956 boost_set_msrs(boost_enabled, cpu_online_mask); 957 958 register_cpu_notifier(&boost_nb); 959 960 put_online_cpus(); 961 } else 962 global_boost.attr.mode = 0444; 963 964 /* We create the boost file in any case, though for systems without 965 * hardware support it will be read-only and hardwired to return 0. 966 */ 967 if (cpufreq_sysfs_create_file(&(global_boost.attr))) 968 pr_warn(PFX "could not register global boost sysfs file\n"); 969 else 970 pr_debug("registered global boost sysfs file\n"); 971 } 972 973 static void __exit acpi_cpufreq_boost_exit(void) 974 { 975 cpufreq_sysfs_remove_file(&(global_boost.attr)); 976 977 if (msrs) { 978 unregister_cpu_notifier(&boost_nb); 979 980 msrs_free(msrs); 981 msrs = NULL; 982 } 983 } 984 985 static int __init acpi_cpufreq_init(void) 986 { 987 int ret; 988 989 if (acpi_disabled) 990 return -ENODEV; 991 992 /* don't keep reloading if cpufreq_driver exists */ 993 if (cpufreq_get_current_driver()) 994 return -EEXIST; 995 996 pr_debug("acpi_cpufreq_init\n"); 997 998 ret = acpi_cpufreq_early_init(); 999 if (ret) 1000 return ret; 1001 1002 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 1003 /* this is a sysfs file with a strange name and an even stranger 1004 * semantic - per CPU instantiation, but system global effect. 1005 * Lets enable it only on AMD CPUs for compatibility reasons and 1006 * only if configured. This is considered legacy code, which 1007 * will probably be removed at some point in the future. 1008 */ 1009 if (check_amd_hwpstate_cpu(0)) { 1010 struct freq_attr **iter; 1011 1012 pr_debug("adding sysfs entry for cpb\n"); 1013 1014 for (iter = acpi_cpufreq_attr; *iter != NULL; iter++) 1015 ; 1016 1017 /* make sure there is a terminator behind it */ 1018 if (iter[1] == NULL) 1019 *iter = &cpb; 1020 } 1021 #endif 1022 1023 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 1024 if (ret) 1025 free_acpi_perf_data(); 1026 else 1027 acpi_cpufreq_boost_init(); 1028 1029 return ret; 1030 } 1031 1032 static void __exit acpi_cpufreq_exit(void) 1033 { 1034 pr_debug("acpi_cpufreq_exit\n"); 1035 1036 acpi_cpufreq_boost_exit(); 1037 1038 cpufreq_unregister_driver(&acpi_cpufreq_driver); 1039 1040 free_acpi_perf_data(); 1041 } 1042 1043 module_param(acpi_pstate_strict, uint, 0644); 1044 MODULE_PARM_DESC(acpi_pstate_strict, 1045 "value 0 or non-zero. non-zero -> strict ACPI checks are " 1046 "performed during frequency changes."); 1047 1048 late_initcall(acpi_cpufreq_init); 1049 module_exit(acpi_cpufreq_exit); 1050 1051 static const struct x86_cpu_id acpi_cpufreq_ids[] = { 1052 X86_FEATURE_MATCH(X86_FEATURE_ACPI), 1053 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE), 1054 {} 1055 }; 1056 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1057 1058 static const struct acpi_device_id processor_device_ids[] = { 1059 {ACPI_PROCESSOR_OBJECT_HID, }, 1060 {ACPI_PROCESSOR_DEVICE_HID, }, 1061 {}, 1062 }; 1063 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1064 1065 MODULE_ALIAS("acpi"); 1066