1 /*
2  * acpi-cpufreq.c - ACPI Processor P-States Driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2006       Denis Sadykov <denis.m.sadykov@intel.com>
8  *
9  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10  *
11  *  This program is free software; you can redistribute it and/or modify
12  *  it under the terms of the GNU General Public License as published by
13  *  the Free Software Foundation; either version 2 of the License, or (at
14  *  your option) any later version.
15  *
16  *  This program is distributed in the hope that it will be useful, but
17  *  WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  General Public License for more details.
20  *
21  *  You should have received a copy of the GNU General Public License along
22  *  with this program; if not, write to the Free Software Foundation, Inc.,
23  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24  *
25  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26  */
27 
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/sched.h>
35 #include <linux/cpufreq.h>
36 #include <linux/compiler.h>
37 #include <linux/dmi.h>
38 #include <linux/slab.h>
39 
40 #include <linux/acpi.h>
41 #include <linux/io.h>
42 #include <linux/delay.h>
43 #include <linux/uaccess.h>
44 
45 #include <acpi/processor.h>
46 
47 #include <asm/msr.h>
48 #include <asm/processor.h>
49 #include <asm/cpufeature.h>
50 
51 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
52 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
53 MODULE_LICENSE("GPL");
54 
55 enum {
56 	UNDEFINED_CAPABLE = 0,
57 	SYSTEM_INTEL_MSR_CAPABLE,
58 	SYSTEM_AMD_MSR_CAPABLE,
59 	SYSTEM_IO_CAPABLE,
60 };
61 
62 #define INTEL_MSR_RANGE		(0xffff)
63 #define AMD_MSR_RANGE		(0x7)
64 
65 #define MSR_K7_HWCR_CPB_DIS	(1ULL << 25)
66 
67 struct acpi_cpufreq_data {
68 	unsigned int resume;
69 	unsigned int cpu_feature;
70 	unsigned int acpi_perf_cpu;
71 	cpumask_var_t freqdomain_cpus;
72 	void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
73 	u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
74 };
75 
76 /* acpi_perf_data is a pointer to percpu data. */
77 static struct acpi_processor_performance __percpu *acpi_perf_data;
78 
79 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
80 {
81 	return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
82 }
83 
84 static struct cpufreq_driver acpi_cpufreq_driver;
85 
86 static unsigned int acpi_pstate_strict;
87 static struct msr __percpu *msrs;
88 
89 static bool boost_state(unsigned int cpu)
90 {
91 	u32 lo, hi;
92 	u64 msr;
93 
94 	switch (boot_cpu_data.x86_vendor) {
95 	case X86_VENDOR_INTEL:
96 		rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
97 		msr = lo | ((u64)hi << 32);
98 		return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
99 	case X86_VENDOR_AMD:
100 		rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
101 		msr = lo | ((u64)hi << 32);
102 		return !(msr & MSR_K7_HWCR_CPB_DIS);
103 	}
104 	return false;
105 }
106 
107 static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
108 {
109 	u32 cpu;
110 	u32 msr_addr;
111 	u64 msr_mask;
112 
113 	switch (boot_cpu_data.x86_vendor) {
114 	case X86_VENDOR_INTEL:
115 		msr_addr = MSR_IA32_MISC_ENABLE;
116 		msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
117 		break;
118 	case X86_VENDOR_AMD:
119 		msr_addr = MSR_K7_HWCR;
120 		msr_mask = MSR_K7_HWCR_CPB_DIS;
121 		break;
122 	default:
123 		return;
124 	}
125 
126 	rdmsr_on_cpus(cpumask, msr_addr, msrs);
127 
128 	for_each_cpu(cpu, cpumask) {
129 		struct msr *reg = per_cpu_ptr(msrs, cpu);
130 		if (enable)
131 			reg->q &= ~msr_mask;
132 		else
133 			reg->q |= msr_mask;
134 	}
135 
136 	wrmsr_on_cpus(cpumask, msr_addr, msrs);
137 }
138 
139 static int set_boost(int val)
140 {
141 	get_online_cpus();
142 	boost_set_msrs(val, cpu_online_mask);
143 	put_online_cpus();
144 	pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
145 
146 	return 0;
147 }
148 
149 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
150 {
151 	struct acpi_cpufreq_data *data = policy->driver_data;
152 
153 	if (unlikely(!data))
154 		return -ENODEV;
155 
156 	return cpufreq_show_cpus(data->freqdomain_cpus, buf);
157 }
158 
159 cpufreq_freq_attr_ro(freqdomain_cpus);
160 
161 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
162 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
163 			 size_t count)
164 {
165 	int ret;
166 	unsigned int val = 0;
167 
168 	if (!acpi_cpufreq_driver.set_boost)
169 		return -EINVAL;
170 
171 	ret = kstrtouint(buf, 10, &val);
172 	if (ret || val > 1)
173 		return -EINVAL;
174 
175 	set_boost(val);
176 
177 	return count;
178 }
179 
180 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
181 {
182 	return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
183 }
184 
185 cpufreq_freq_attr_rw(cpb);
186 #endif
187 
188 static int check_est_cpu(unsigned int cpuid)
189 {
190 	struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
191 
192 	return cpu_has(cpu, X86_FEATURE_EST);
193 }
194 
195 static int check_amd_hwpstate_cpu(unsigned int cpuid)
196 {
197 	struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
198 
199 	return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
200 }
201 
202 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
203 {
204 	struct acpi_cpufreq_data *data = policy->driver_data;
205 	struct acpi_processor_performance *perf;
206 	int i;
207 
208 	perf = to_perf_data(data);
209 
210 	for (i = 0; i < perf->state_count; i++) {
211 		if (value == perf->states[i].status)
212 			return policy->freq_table[i].frequency;
213 	}
214 	return 0;
215 }
216 
217 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
218 {
219 	struct acpi_cpufreq_data *data = policy->driver_data;
220 	struct cpufreq_frequency_table *pos;
221 	struct acpi_processor_performance *perf;
222 
223 	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
224 		msr &= AMD_MSR_RANGE;
225 	else
226 		msr &= INTEL_MSR_RANGE;
227 
228 	perf = to_perf_data(data);
229 
230 	cpufreq_for_each_entry(pos, policy->freq_table)
231 		if (msr == perf->states[pos->driver_data].status)
232 			return pos->frequency;
233 	return policy->freq_table[0].frequency;
234 }
235 
236 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
237 {
238 	struct acpi_cpufreq_data *data = policy->driver_data;
239 
240 	switch (data->cpu_feature) {
241 	case SYSTEM_INTEL_MSR_CAPABLE:
242 	case SYSTEM_AMD_MSR_CAPABLE:
243 		return extract_msr(policy, val);
244 	case SYSTEM_IO_CAPABLE:
245 		return extract_io(policy, val);
246 	default:
247 		return 0;
248 	}
249 }
250 
251 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
252 {
253 	u32 val, dummy;
254 
255 	rdmsr(MSR_IA32_PERF_CTL, val, dummy);
256 	return val;
257 }
258 
259 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
260 {
261 	u32 lo, hi;
262 
263 	rdmsr(MSR_IA32_PERF_CTL, lo, hi);
264 	lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
265 	wrmsr(MSR_IA32_PERF_CTL, lo, hi);
266 }
267 
268 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
269 {
270 	u32 val, dummy;
271 
272 	rdmsr(MSR_AMD_PERF_CTL, val, dummy);
273 	return val;
274 }
275 
276 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
277 {
278 	wrmsr(MSR_AMD_PERF_CTL, val, 0);
279 }
280 
281 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
282 {
283 	u32 val;
284 
285 	acpi_os_read_port(reg->address, &val, reg->bit_width);
286 	return val;
287 }
288 
289 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
290 {
291 	acpi_os_write_port(reg->address, val, reg->bit_width);
292 }
293 
294 struct drv_cmd {
295 	struct acpi_pct_register *reg;
296 	u32 val;
297 	union {
298 		void (*write)(struct acpi_pct_register *reg, u32 val);
299 		u32 (*read)(struct acpi_pct_register *reg);
300 	} func;
301 };
302 
303 /* Called via smp_call_function_single(), on the target CPU */
304 static void do_drv_read(void *_cmd)
305 {
306 	struct drv_cmd *cmd = _cmd;
307 
308 	cmd->val = cmd->func.read(cmd->reg);
309 }
310 
311 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
312 {
313 	struct acpi_processor_performance *perf = to_perf_data(data);
314 	struct drv_cmd cmd = {
315 		.reg = &perf->control_register,
316 		.func.read = data->cpu_freq_read,
317 	};
318 	int err;
319 
320 	err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
321 	WARN_ON_ONCE(err);	/* smp_call_function_any() was buggy? */
322 	return cmd.val;
323 }
324 
325 /* Called via smp_call_function_many(), on the target CPUs */
326 static void do_drv_write(void *_cmd)
327 {
328 	struct drv_cmd *cmd = _cmd;
329 
330 	cmd->func.write(cmd->reg, cmd->val);
331 }
332 
333 static void drv_write(struct acpi_cpufreq_data *data,
334 		      const struct cpumask *mask, u32 val)
335 {
336 	struct acpi_processor_performance *perf = to_perf_data(data);
337 	struct drv_cmd cmd = {
338 		.reg = &perf->control_register,
339 		.val = val,
340 		.func.write = data->cpu_freq_write,
341 	};
342 	int this_cpu;
343 
344 	this_cpu = get_cpu();
345 	if (cpumask_test_cpu(this_cpu, mask))
346 		do_drv_write(&cmd);
347 
348 	smp_call_function_many(mask, do_drv_write, &cmd, 1);
349 	put_cpu();
350 }
351 
352 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
353 {
354 	u32 val;
355 
356 	if (unlikely(cpumask_empty(mask)))
357 		return 0;
358 
359 	val = drv_read(data, mask);
360 
361 	pr_debug("get_cur_val = %u\n", val);
362 
363 	return val;
364 }
365 
366 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
367 {
368 	struct acpi_cpufreq_data *data;
369 	struct cpufreq_policy *policy;
370 	unsigned int freq;
371 	unsigned int cached_freq;
372 
373 	pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
374 
375 	policy = cpufreq_cpu_get_raw(cpu);
376 	if (unlikely(!policy))
377 		return 0;
378 
379 	data = policy->driver_data;
380 	if (unlikely(!data || !policy->freq_table))
381 		return 0;
382 
383 	cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
384 	freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
385 	if (freq != cached_freq) {
386 		/*
387 		 * The dreaded BIOS frequency change behind our back.
388 		 * Force set the frequency on next target call.
389 		 */
390 		data->resume = 1;
391 	}
392 
393 	pr_debug("cur freq = %u\n", freq);
394 
395 	return freq;
396 }
397 
398 static unsigned int check_freqs(struct cpufreq_policy *policy,
399 				const struct cpumask *mask, unsigned int freq)
400 {
401 	struct acpi_cpufreq_data *data = policy->driver_data;
402 	unsigned int cur_freq;
403 	unsigned int i;
404 
405 	for (i = 0; i < 100; i++) {
406 		cur_freq = extract_freq(policy, get_cur_val(mask, data));
407 		if (cur_freq == freq)
408 			return 1;
409 		udelay(10);
410 	}
411 	return 0;
412 }
413 
414 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
415 			       unsigned int index)
416 {
417 	struct acpi_cpufreq_data *data = policy->driver_data;
418 	struct acpi_processor_performance *perf;
419 	const struct cpumask *mask;
420 	unsigned int next_perf_state = 0; /* Index into perf table */
421 	int result = 0;
422 
423 	if (unlikely(!data)) {
424 		return -ENODEV;
425 	}
426 
427 	perf = to_perf_data(data);
428 	next_perf_state = policy->freq_table[index].driver_data;
429 	if (perf->state == next_perf_state) {
430 		if (unlikely(data->resume)) {
431 			pr_debug("Called after resume, resetting to P%d\n",
432 				next_perf_state);
433 			data->resume = 0;
434 		} else {
435 			pr_debug("Already at target state (P%d)\n",
436 				next_perf_state);
437 			return 0;
438 		}
439 	}
440 
441 	/*
442 	 * The core won't allow CPUs to go away until the governor has been
443 	 * stopped, so we can rely on the stability of policy->cpus.
444 	 */
445 	mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
446 		cpumask_of(policy->cpu) : policy->cpus;
447 
448 	drv_write(data, mask, perf->states[next_perf_state].control);
449 
450 	if (acpi_pstate_strict) {
451 		if (!check_freqs(policy, mask,
452 				 policy->freq_table[index].frequency)) {
453 			pr_debug("acpi_cpufreq_target failed (%d)\n",
454 				policy->cpu);
455 			result = -EAGAIN;
456 		}
457 	}
458 
459 	if (!result)
460 		perf->state = next_perf_state;
461 
462 	return result;
463 }
464 
465 unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
466 				      unsigned int target_freq)
467 {
468 	struct acpi_cpufreq_data *data = policy->driver_data;
469 	struct acpi_processor_performance *perf;
470 	struct cpufreq_frequency_table *entry;
471 	unsigned int next_perf_state, next_freq, freq;
472 
473 	/*
474 	 * Find the closest frequency above target_freq.
475 	 *
476 	 * The table is sorted in the reverse order with respect to the
477 	 * frequency and all of the entries are valid (see the initialization).
478 	 */
479 	entry = policy->freq_table;
480 	do {
481 		entry++;
482 		freq = entry->frequency;
483 	} while (freq >= target_freq && freq != CPUFREQ_TABLE_END);
484 	entry--;
485 	next_freq = entry->frequency;
486 	next_perf_state = entry->driver_data;
487 
488 	perf = to_perf_data(data);
489 	if (perf->state == next_perf_state) {
490 		if (unlikely(data->resume))
491 			data->resume = 0;
492 		else
493 			return next_freq;
494 	}
495 
496 	data->cpu_freq_write(&perf->control_register,
497 			     perf->states[next_perf_state].control);
498 	perf->state = next_perf_state;
499 	return next_freq;
500 }
501 
502 static unsigned long
503 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
504 {
505 	struct acpi_processor_performance *perf;
506 
507 	perf = to_perf_data(data);
508 	if (cpu_khz) {
509 		/* search the closest match to cpu_khz */
510 		unsigned int i;
511 		unsigned long freq;
512 		unsigned long freqn = perf->states[0].core_frequency * 1000;
513 
514 		for (i = 0; i < (perf->state_count-1); i++) {
515 			freq = freqn;
516 			freqn = perf->states[i+1].core_frequency * 1000;
517 			if ((2 * cpu_khz) > (freqn + freq)) {
518 				perf->state = i;
519 				return freq;
520 			}
521 		}
522 		perf->state = perf->state_count-1;
523 		return freqn;
524 	} else {
525 		/* assume CPU is at P0... */
526 		perf->state = 0;
527 		return perf->states[0].core_frequency * 1000;
528 	}
529 }
530 
531 static void free_acpi_perf_data(void)
532 {
533 	unsigned int i;
534 
535 	/* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
536 	for_each_possible_cpu(i)
537 		free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
538 				 ->shared_cpu_map);
539 	free_percpu(acpi_perf_data);
540 }
541 
542 static int boost_notify(struct notifier_block *nb, unsigned long action,
543 		      void *hcpu)
544 {
545 	unsigned cpu = (long)hcpu;
546 	const struct cpumask *cpumask;
547 
548 	cpumask = get_cpu_mask(cpu);
549 
550 	/*
551 	 * Clear the boost-disable bit on the CPU_DOWN path so that
552 	 * this cpu cannot block the remaining ones from boosting. On
553 	 * the CPU_UP path we simply keep the boost-disable flag in
554 	 * sync with the current global state.
555 	 */
556 
557 	switch (action) {
558 	case CPU_DOWN_FAILED:
559 	case CPU_DOWN_FAILED_FROZEN:
560 	case CPU_ONLINE:
561 	case CPU_ONLINE_FROZEN:
562 		boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
563 		break;
564 
565 	case CPU_DOWN_PREPARE:
566 	case CPU_DOWN_PREPARE_FROZEN:
567 		boost_set_msrs(1, cpumask);
568 		break;
569 
570 	default:
571 		break;
572 	}
573 
574 	return NOTIFY_OK;
575 }
576 
577 
578 static struct notifier_block boost_nb = {
579 	.notifier_call          = boost_notify,
580 };
581 
582 /*
583  * acpi_cpufreq_early_init - initialize ACPI P-States library
584  *
585  * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
586  * in order to determine correct frequency and voltage pairings. We can
587  * do _PDC and _PSD and find out the processor dependency for the
588  * actual init that will happen later...
589  */
590 static int __init acpi_cpufreq_early_init(void)
591 {
592 	unsigned int i;
593 	pr_debug("acpi_cpufreq_early_init\n");
594 
595 	acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
596 	if (!acpi_perf_data) {
597 		pr_debug("Memory allocation error for acpi_perf_data.\n");
598 		return -ENOMEM;
599 	}
600 	for_each_possible_cpu(i) {
601 		if (!zalloc_cpumask_var_node(
602 			&per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
603 			GFP_KERNEL, cpu_to_node(i))) {
604 
605 			/* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
606 			free_acpi_perf_data();
607 			return -ENOMEM;
608 		}
609 	}
610 
611 	/* Do initialization in ACPI core */
612 	acpi_processor_preregister_performance(acpi_perf_data);
613 	return 0;
614 }
615 
616 #ifdef CONFIG_SMP
617 /*
618  * Some BIOSes do SW_ANY coordination internally, either set it up in hw
619  * or do it in BIOS firmware and won't inform about it to OS. If not
620  * detected, this has a side effect of making CPU run at a different speed
621  * than OS intended it to run at. Detect it and handle it cleanly.
622  */
623 static int bios_with_sw_any_bug;
624 
625 static int sw_any_bug_found(const struct dmi_system_id *d)
626 {
627 	bios_with_sw_any_bug = 1;
628 	return 0;
629 }
630 
631 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
632 	{
633 		.callback = sw_any_bug_found,
634 		.ident = "Supermicro Server X6DLP",
635 		.matches = {
636 			DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
637 			DMI_MATCH(DMI_BIOS_VERSION, "080010"),
638 			DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
639 		},
640 	},
641 	{ }
642 };
643 
644 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
645 {
646 	/* Intel Xeon Processor 7100 Series Specification Update
647 	 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
648 	 * AL30: A Machine Check Exception (MCE) Occurring during an
649 	 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
650 	 * Both Processor Cores to Lock Up. */
651 	if (c->x86_vendor == X86_VENDOR_INTEL) {
652 		if ((c->x86 == 15) &&
653 		    (c->x86_model == 6) &&
654 		    (c->x86_mask == 8)) {
655 			pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
656 			return -ENODEV;
657 		    }
658 		}
659 	return 0;
660 }
661 #endif
662 
663 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
664 {
665 	unsigned int i;
666 	unsigned int valid_states = 0;
667 	unsigned int cpu = policy->cpu;
668 	struct acpi_cpufreq_data *data;
669 	unsigned int result = 0;
670 	struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
671 	struct acpi_processor_performance *perf;
672 	struct cpufreq_frequency_table *freq_table;
673 #ifdef CONFIG_SMP
674 	static int blacklisted;
675 #endif
676 
677 	pr_debug("acpi_cpufreq_cpu_init\n");
678 
679 #ifdef CONFIG_SMP
680 	if (blacklisted)
681 		return blacklisted;
682 	blacklisted = acpi_cpufreq_blacklist(c);
683 	if (blacklisted)
684 		return blacklisted;
685 #endif
686 
687 	data = kzalloc(sizeof(*data), GFP_KERNEL);
688 	if (!data)
689 		return -ENOMEM;
690 
691 	if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
692 		result = -ENOMEM;
693 		goto err_free;
694 	}
695 
696 	perf = per_cpu_ptr(acpi_perf_data, cpu);
697 	data->acpi_perf_cpu = cpu;
698 	policy->driver_data = data;
699 
700 	if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
701 		acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
702 
703 	result = acpi_processor_register_performance(perf, cpu);
704 	if (result)
705 		goto err_free_mask;
706 
707 	policy->shared_type = perf->shared_type;
708 
709 	/*
710 	 * Will let policy->cpus know about dependency only when software
711 	 * coordination is required.
712 	 */
713 	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
714 	    policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
715 		cpumask_copy(policy->cpus, perf->shared_cpu_map);
716 	}
717 	cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
718 
719 #ifdef CONFIG_SMP
720 	dmi_check_system(sw_any_bug_dmi_table);
721 	if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
722 		policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
723 		cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
724 	}
725 
726 	if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
727 		cpumask_clear(policy->cpus);
728 		cpumask_set_cpu(cpu, policy->cpus);
729 		cpumask_copy(data->freqdomain_cpus,
730 			     topology_sibling_cpumask(cpu));
731 		policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
732 		pr_info_once("overriding BIOS provided _PSD data\n");
733 	}
734 #endif
735 
736 	/* capability check */
737 	if (perf->state_count <= 1) {
738 		pr_debug("No P-States\n");
739 		result = -ENODEV;
740 		goto err_unreg;
741 	}
742 
743 	if (perf->control_register.space_id != perf->status_register.space_id) {
744 		result = -ENODEV;
745 		goto err_unreg;
746 	}
747 
748 	switch (perf->control_register.space_id) {
749 	case ACPI_ADR_SPACE_SYSTEM_IO:
750 		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
751 		    boot_cpu_data.x86 == 0xf) {
752 			pr_debug("AMD K8 systems must use native drivers.\n");
753 			result = -ENODEV;
754 			goto err_unreg;
755 		}
756 		pr_debug("SYSTEM IO addr space\n");
757 		data->cpu_feature = SYSTEM_IO_CAPABLE;
758 		data->cpu_freq_read = cpu_freq_read_io;
759 		data->cpu_freq_write = cpu_freq_write_io;
760 		break;
761 	case ACPI_ADR_SPACE_FIXED_HARDWARE:
762 		pr_debug("HARDWARE addr space\n");
763 		if (check_est_cpu(cpu)) {
764 			data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
765 			data->cpu_freq_read = cpu_freq_read_intel;
766 			data->cpu_freq_write = cpu_freq_write_intel;
767 			break;
768 		}
769 		if (check_amd_hwpstate_cpu(cpu)) {
770 			data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
771 			data->cpu_freq_read = cpu_freq_read_amd;
772 			data->cpu_freq_write = cpu_freq_write_amd;
773 			break;
774 		}
775 		result = -ENODEV;
776 		goto err_unreg;
777 	default:
778 		pr_debug("Unknown addr space %d\n",
779 			(u32) (perf->control_register.space_id));
780 		result = -ENODEV;
781 		goto err_unreg;
782 	}
783 
784 	freq_table = kzalloc(sizeof(*freq_table) *
785 		    (perf->state_count+1), GFP_KERNEL);
786 	if (!freq_table) {
787 		result = -ENOMEM;
788 		goto err_unreg;
789 	}
790 
791 	/* detect transition latency */
792 	policy->cpuinfo.transition_latency = 0;
793 	for (i = 0; i < perf->state_count; i++) {
794 		if ((perf->states[i].transition_latency * 1000) >
795 		    policy->cpuinfo.transition_latency)
796 			policy->cpuinfo.transition_latency =
797 			    perf->states[i].transition_latency * 1000;
798 	}
799 
800 	/* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
801 	if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
802 	    policy->cpuinfo.transition_latency > 20 * 1000) {
803 		policy->cpuinfo.transition_latency = 20 * 1000;
804 		pr_info_once("P-state transition latency capped at 20 uS\n");
805 	}
806 
807 	/* table init */
808 	for (i = 0; i < perf->state_count; i++) {
809 		if (i > 0 && perf->states[i].core_frequency >=
810 		    freq_table[valid_states-1].frequency / 1000)
811 			continue;
812 
813 		freq_table[valid_states].driver_data = i;
814 		freq_table[valid_states].frequency =
815 		    perf->states[i].core_frequency * 1000;
816 		valid_states++;
817 	}
818 	freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
819 	perf->state = 0;
820 
821 	result = cpufreq_table_validate_and_show(policy, freq_table);
822 	if (result)
823 		goto err_freqfree;
824 
825 	if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
826 		pr_warn(FW_WARN "P-state 0 is not max freq\n");
827 
828 	switch (perf->control_register.space_id) {
829 	case ACPI_ADR_SPACE_SYSTEM_IO:
830 		/*
831 		 * The core will not set policy->cur, because
832 		 * cpufreq_driver->get is NULL, so we need to set it here.
833 		 * However, we have to guess it, because the current speed is
834 		 * unknown and not detectable via IO ports.
835 		 */
836 		policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
837 		break;
838 	case ACPI_ADR_SPACE_FIXED_HARDWARE:
839 		acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
840 		break;
841 	default:
842 		break;
843 	}
844 
845 	/* notify BIOS that we exist */
846 	acpi_processor_notify_smm(THIS_MODULE);
847 
848 	pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
849 	for (i = 0; i < perf->state_count; i++)
850 		pr_debug("     %cP%d: %d MHz, %d mW, %d uS\n",
851 			(i == perf->state ? '*' : ' '), i,
852 			(u32) perf->states[i].core_frequency,
853 			(u32) perf->states[i].power,
854 			(u32) perf->states[i].transition_latency);
855 
856 	/*
857 	 * the first call to ->target() should result in us actually
858 	 * writing something to the appropriate registers.
859 	 */
860 	data->resume = 1;
861 
862 	policy->fast_switch_possible = !acpi_pstate_strict &&
863 		!(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
864 
865 	return result;
866 
867 err_freqfree:
868 	kfree(freq_table);
869 err_unreg:
870 	acpi_processor_unregister_performance(cpu);
871 err_free_mask:
872 	free_cpumask_var(data->freqdomain_cpus);
873 err_free:
874 	kfree(data);
875 	policy->driver_data = NULL;
876 
877 	return result;
878 }
879 
880 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
881 {
882 	struct acpi_cpufreq_data *data = policy->driver_data;
883 
884 	pr_debug("acpi_cpufreq_cpu_exit\n");
885 
886 	policy->fast_switch_possible = false;
887 	policy->driver_data = NULL;
888 	acpi_processor_unregister_performance(data->acpi_perf_cpu);
889 	free_cpumask_var(data->freqdomain_cpus);
890 	kfree(policy->freq_table);
891 	kfree(data);
892 
893 	return 0;
894 }
895 
896 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
897 {
898 	struct acpi_cpufreq_data *data = policy->driver_data;
899 
900 	pr_debug("acpi_cpufreq_resume\n");
901 
902 	data->resume = 1;
903 
904 	return 0;
905 }
906 
907 static struct freq_attr *acpi_cpufreq_attr[] = {
908 	&cpufreq_freq_attr_scaling_available_freqs,
909 	&freqdomain_cpus,
910 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
911 	&cpb,
912 #endif
913 	NULL,
914 };
915 
916 static struct cpufreq_driver acpi_cpufreq_driver = {
917 	.verify		= cpufreq_generic_frequency_table_verify,
918 	.target_index	= acpi_cpufreq_target,
919 	.fast_switch	= acpi_cpufreq_fast_switch,
920 	.bios_limit	= acpi_processor_get_bios_limit,
921 	.init		= acpi_cpufreq_cpu_init,
922 	.exit		= acpi_cpufreq_cpu_exit,
923 	.resume		= acpi_cpufreq_resume,
924 	.name		= "acpi-cpufreq",
925 	.attr		= acpi_cpufreq_attr,
926 };
927 
928 static void __init acpi_cpufreq_boost_init(void)
929 {
930 	if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
931 		msrs = msrs_alloc();
932 
933 		if (!msrs)
934 			return;
935 
936 		acpi_cpufreq_driver.set_boost = set_boost;
937 		acpi_cpufreq_driver.boost_enabled = boost_state(0);
938 
939 		cpu_notifier_register_begin();
940 
941 		/* Force all MSRs to the same value */
942 		boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
943 			       cpu_online_mask);
944 
945 		__register_cpu_notifier(&boost_nb);
946 
947 		cpu_notifier_register_done();
948 	}
949 }
950 
951 static void acpi_cpufreq_boost_exit(void)
952 {
953 	if (msrs) {
954 		unregister_cpu_notifier(&boost_nb);
955 
956 		msrs_free(msrs);
957 		msrs = NULL;
958 	}
959 }
960 
961 static int __init acpi_cpufreq_init(void)
962 {
963 	int ret;
964 
965 	if (acpi_disabled)
966 		return -ENODEV;
967 
968 	/* don't keep reloading if cpufreq_driver exists */
969 	if (cpufreq_get_current_driver())
970 		return -EEXIST;
971 
972 	pr_debug("acpi_cpufreq_init\n");
973 
974 	ret = acpi_cpufreq_early_init();
975 	if (ret)
976 		return ret;
977 
978 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
979 	/* this is a sysfs file with a strange name and an even stranger
980 	 * semantic - per CPU instantiation, but system global effect.
981 	 * Lets enable it only on AMD CPUs for compatibility reasons and
982 	 * only if configured. This is considered legacy code, which
983 	 * will probably be removed at some point in the future.
984 	 */
985 	if (!check_amd_hwpstate_cpu(0)) {
986 		struct freq_attr **attr;
987 
988 		pr_debug("CPB unsupported, do not expose it\n");
989 
990 		for (attr = acpi_cpufreq_attr; *attr; attr++)
991 			if (*attr == &cpb) {
992 				*attr = NULL;
993 				break;
994 			}
995 	}
996 #endif
997 	acpi_cpufreq_boost_init();
998 
999 	ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1000 	if (ret) {
1001 		free_acpi_perf_data();
1002 		acpi_cpufreq_boost_exit();
1003 	}
1004 	return ret;
1005 }
1006 
1007 static void __exit acpi_cpufreq_exit(void)
1008 {
1009 	pr_debug("acpi_cpufreq_exit\n");
1010 
1011 	acpi_cpufreq_boost_exit();
1012 
1013 	cpufreq_unregister_driver(&acpi_cpufreq_driver);
1014 
1015 	free_acpi_perf_data();
1016 }
1017 
1018 module_param(acpi_pstate_strict, uint, 0644);
1019 MODULE_PARM_DESC(acpi_pstate_strict,
1020 	"value 0 or non-zero. non-zero -> strict ACPI checks are "
1021 	"performed during frequency changes.");
1022 
1023 late_initcall(acpi_cpufreq_init);
1024 module_exit(acpi_cpufreq_exit);
1025 
1026 static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1027 	X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1028 	X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1029 	{}
1030 };
1031 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1032 
1033 static const struct acpi_device_id processor_device_ids[] = {
1034 	{ACPI_PROCESSOR_OBJECT_HID, },
1035 	{ACPI_PROCESSOR_DEVICE_HID, },
1036 	{},
1037 };
1038 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1039 
1040 MODULE_ALIAS("acpi");
1041