1 /* 2 * acpi-cpufreq.c - ACPI Processor P-States Driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 8 * 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License along 22 * with this program; if not, write to the Free Software Foundation, Inc., 23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 24 * 25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/smp.h> 34 #include <linux/sched.h> 35 #include <linux/cpufreq.h> 36 #include <linux/compiler.h> 37 #include <linux/dmi.h> 38 #include <linux/slab.h> 39 40 #include <linux/acpi.h> 41 #include <linux/io.h> 42 #include <linux/delay.h> 43 #include <linux/uaccess.h> 44 45 #include <acpi/processor.h> 46 47 #include <asm/msr.h> 48 #include <asm/processor.h> 49 #include <asm/cpufeature.h> 50 51 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 52 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 53 MODULE_LICENSE("GPL"); 54 55 enum { 56 UNDEFINED_CAPABLE = 0, 57 SYSTEM_INTEL_MSR_CAPABLE, 58 SYSTEM_AMD_MSR_CAPABLE, 59 SYSTEM_IO_CAPABLE, 60 }; 61 62 #define INTEL_MSR_RANGE (0xffff) 63 #define AMD_MSR_RANGE (0x7) 64 65 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 66 67 struct acpi_cpufreq_data { 68 unsigned int resume; 69 unsigned int cpu_feature; 70 unsigned int acpi_perf_cpu; 71 cpumask_var_t freqdomain_cpus; 72 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); 73 u32 (*cpu_freq_read)(struct acpi_pct_register *reg); 74 }; 75 76 /* acpi_perf_data is a pointer to percpu data. */ 77 static struct acpi_processor_performance __percpu *acpi_perf_data; 78 79 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) 80 { 81 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); 82 } 83 84 static struct cpufreq_driver acpi_cpufreq_driver; 85 86 static unsigned int acpi_pstate_strict; 87 static struct msr __percpu *msrs; 88 89 static bool boost_state(unsigned int cpu) 90 { 91 u32 lo, hi; 92 u64 msr; 93 94 switch (boot_cpu_data.x86_vendor) { 95 case X86_VENDOR_INTEL: 96 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 97 msr = lo | ((u64)hi << 32); 98 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 99 case X86_VENDOR_AMD: 100 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 101 msr = lo | ((u64)hi << 32); 102 return !(msr & MSR_K7_HWCR_CPB_DIS); 103 } 104 return false; 105 } 106 107 static void boost_set_msrs(bool enable, const struct cpumask *cpumask) 108 { 109 u32 cpu; 110 u32 msr_addr; 111 u64 msr_mask; 112 113 switch (boot_cpu_data.x86_vendor) { 114 case X86_VENDOR_INTEL: 115 msr_addr = MSR_IA32_MISC_ENABLE; 116 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 117 break; 118 case X86_VENDOR_AMD: 119 msr_addr = MSR_K7_HWCR; 120 msr_mask = MSR_K7_HWCR_CPB_DIS; 121 break; 122 default: 123 return; 124 } 125 126 rdmsr_on_cpus(cpumask, msr_addr, msrs); 127 128 for_each_cpu(cpu, cpumask) { 129 struct msr *reg = per_cpu_ptr(msrs, cpu); 130 if (enable) 131 reg->q &= ~msr_mask; 132 else 133 reg->q |= msr_mask; 134 } 135 136 wrmsr_on_cpus(cpumask, msr_addr, msrs); 137 } 138 139 static int set_boost(int val) 140 { 141 get_online_cpus(); 142 boost_set_msrs(val, cpu_online_mask); 143 put_online_cpus(); 144 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); 145 146 return 0; 147 } 148 149 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 150 { 151 struct acpi_cpufreq_data *data = policy->driver_data; 152 153 if (unlikely(!data)) 154 return -ENODEV; 155 156 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 157 } 158 159 cpufreq_freq_attr_ro(freqdomain_cpus); 160 161 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 162 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 163 size_t count) 164 { 165 int ret; 166 unsigned int val = 0; 167 168 if (!acpi_cpufreq_driver.set_boost) 169 return -EINVAL; 170 171 ret = kstrtouint(buf, 10, &val); 172 if (ret || val > 1) 173 return -EINVAL; 174 175 set_boost(val); 176 177 return count; 178 } 179 180 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 181 { 182 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); 183 } 184 185 cpufreq_freq_attr_rw(cpb); 186 #endif 187 188 static int check_est_cpu(unsigned int cpuid) 189 { 190 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 191 192 return cpu_has(cpu, X86_FEATURE_EST); 193 } 194 195 static int check_amd_hwpstate_cpu(unsigned int cpuid) 196 { 197 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 198 199 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 200 } 201 202 static unsigned extract_io(struct cpufreq_policy *policy, u32 value) 203 { 204 struct acpi_cpufreq_data *data = policy->driver_data; 205 struct acpi_processor_performance *perf; 206 int i; 207 208 perf = to_perf_data(data); 209 210 for (i = 0; i < perf->state_count; i++) { 211 if (value == perf->states[i].status) 212 return policy->freq_table[i].frequency; 213 } 214 return 0; 215 } 216 217 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) 218 { 219 struct acpi_cpufreq_data *data = policy->driver_data; 220 struct cpufreq_frequency_table *pos; 221 struct acpi_processor_performance *perf; 222 223 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 224 msr &= AMD_MSR_RANGE; 225 else 226 msr &= INTEL_MSR_RANGE; 227 228 perf = to_perf_data(data); 229 230 cpufreq_for_each_entry(pos, policy->freq_table) 231 if (msr == perf->states[pos->driver_data].status) 232 return pos->frequency; 233 return policy->freq_table[0].frequency; 234 } 235 236 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) 237 { 238 struct acpi_cpufreq_data *data = policy->driver_data; 239 240 switch (data->cpu_feature) { 241 case SYSTEM_INTEL_MSR_CAPABLE: 242 case SYSTEM_AMD_MSR_CAPABLE: 243 return extract_msr(policy, val); 244 case SYSTEM_IO_CAPABLE: 245 return extract_io(policy, val); 246 default: 247 return 0; 248 } 249 } 250 251 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) 252 { 253 u32 val, dummy; 254 255 rdmsr(MSR_IA32_PERF_CTL, val, dummy); 256 return val; 257 } 258 259 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) 260 { 261 u32 lo, hi; 262 263 rdmsr(MSR_IA32_PERF_CTL, lo, hi); 264 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); 265 wrmsr(MSR_IA32_PERF_CTL, lo, hi); 266 } 267 268 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) 269 { 270 u32 val, dummy; 271 272 rdmsr(MSR_AMD_PERF_CTL, val, dummy); 273 return val; 274 } 275 276 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) 277 { 278 wrmsr(MSR_AMD_PERF_CTL, val, 0); 279 } 280 281 static u32 cpu_freq_read_io(struct acpi_pct_register *reg) 282 { 283 u32 val; 284 285 acpi_os_read_port(reg->address, &val, reg->bit_width); 286 return val; 287 } 288 289 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) 290 { 291 acpi_os_write_port(reg->address, val, reg->bit_width); 292 } 293 294 struct drv_cmd { 295 struct acpi_pct_register *reg; 296 u32 val; 297 union { 298 void (*write)(struct acpi_pct_register *reg, u32 val); 299 u32 (*read)(struct acpi_pct_register *reg); 300 } func; 301 }; 302 303 /* Called via smp_call_function_single(), on the target CPU */ 304 static void do_drv_read(void *_cmd) 305 { 306 struct drv_cmd *cmd = _cmd; 307 308 cmd->val = cmd->func.read(cmd->reg); 309 } 310 311 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) 312 { 313 struct acpi_processor_performance *perf = to_perf_data(data); 314 struct drv_cmd cmd = { 315 .reg = &perf->control_register, 316 .func.read = data->cpu_freq_read, 317 }; 318 int err; 319 320 err = smp_call_function_any(mask, do_drv_read, &cmd, 1); 321 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 322 return cmd.val; 323 } 324 325 /* Called via smp_call_function_many(), on the target CPUs */ 326 static void do_drv_write(void *_cmd) 327 { 328 struct drv_cmd *cmd = _cmd; 329 330 cmd->func.write(cmd->reg, cmd->val); 331 } 332 333 static void drv_write(struct acpi_cpufreq_data *data, 334 const struct cpumask *mask, u32 val) 335 { 336 struct acpi_processor_performance *perf = to_perf_data(data); 337 struct drv_cmd cmd = { 338 .reg = &perf->control_register, 339 .val = val, 340 .func.write = data->cpu_freq_write, 341 }; 342 int this_cpu; 343 344 this_cpu = get_cpu(); 345 if (cpumask_test_cpu(this_cpu, mask)) 346 do_drv_write(&cmd); 347 348 smp_call_function_many(mask, do_drv_write, &cmd, 1); 349 put_cpu(); 350 } 351 352 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) 353 { 354 u32 val; 355 356 if (unlikely(cpumask_empty(mask))) 357 return 0; 358 359 val = drv_read(data, mask); 360 361 pr_debug("get_cur_val = %u\n", val); 362 363 return val; 364 } 365 366 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 367 { 368 struct acpi_cpufreq_data *data; 369 struct cpufreq_policy *policy; 370 unsigned int freq; 371 unsigned int cached_freq; 372 373 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); 374 375 policy = cpufreq_cpu_get_raw(cpu); 376 if (unlikely(!policy)) 377 return 0; 378 379 data = policy->driver_data; 380 if (unlikely(!data || !policy->freq_table)) 381 return 0; 382 383 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; 384 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); 385 if (freq != cached_freq) { 386 /* 387 * The dreaded BIOS frequency change behind our back. 388 * Force set the frequency on next target call. 389 */ 390 data->resume = 1; 391 } 392 393 pr_debug("cur freq = %u\n", freq); 394 395 return freq; 396 } 397 398 static unsigned int check_freqs(struct cpufreq_policy *policy, 399 const struct cpumask *mask, unsigned int freq) 400 { 401 struct acpi_cpufreq_data *data = policy->driver_data; 402 unsigned int cur_freq; 403 unsigned int i; 404 405 for (i = 0; i < 100; i++) { 406 cur_freq = extract_freq(policy, get_cur_val(mask, data)); 407 if (cur_freq == freq) 408 return 1; 409 udelay(10); 410 } 411 return 0; 412 } 413 414 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 415 unsigned int index) 416 { 417 struct acpi_cpufreq_data *data = policy->driver_data; 418 struct acpi_processor_performance *perf; 419 const struct cpumask *mask; 420 unsigned int next_perf_state = 0; /* Index into perf table */ 421 int result = 0; 422 423 if (unlikely(!data)) { 424 return -ENODEV; 425 } 426 427 perf = to_perf_data(data); 428 next_perf_state = policy->freq_table[index].driver_data; 429 if (perf->state == next_perf_state) { 430 if (unlikely(data->resume)) { 431 pr_debug("Called after resume, resetting to P%d\n", 432 next_perf_state); 433 data->resume = 0; 434 } else { 435 pr_debug("Already at target state (P%d)\n", 436 next_perf_state); 437 return 0; 438 } 439 } 440 441 /* 442 * The core won't allow CPUs to go away until the governor has been 443 * stopped, so we can rely on the stability of policy->cpus. 444 */ 445 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? 446 cpumask_of(policy->cpu) : policy->cpus; 447 448 drv_write(data, mask, perf->states[next_perf_state].control); 449 450 if (acpi_pstate_strict) { 451 if (!check_freqs(policy, mask, 452 policy->freq_table[index].frequency)) { 453 pr_debug("acpi_cpufreq_target failed (%d)\n", 454 policy->cpu); 455 result = -EAGAIN; 456 } 457 } 458 459 if (!result) 460 perf->state = next_perf_state; 461 462 return result; 463 } 464 465 unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, 466 unsigned int target_freq) 467 { 468 struct acpi_cpufreq_data *data = policy->driver_data; 469 struct acpi_processor_performance *perf; 470 struct cpufreq_frequency_table *entry; 471 unsigned int next_perf_state, next_freq, index; 472 473 /* 474 * Find the closest frequency above target_freq. 475 */ 476 if (policy->cached_target_freq == target_freq) 477 index = policy->cached_resolved_idx; 478 else 479 index = cpufreq_table_find_index_dl(policy, target_freq); 480 481 entry = &policy->freq_table[index]; 482 next_freq = entry->frequency; 483 next_perf_state = entry->driver_data; 484 485 perf = to_perf_data(data); 486 if (perf->state == next_perf_state) { 487 if (unlikely(data->resume)) 488 data->resume = 0; 489 else 490 return next_freq; 491 } 492 493 data->cpu_freq_write(&perf->control_register, 494 perf->states[next_perf_state].control); 495 perf->state = next_perf_state; 496 return next_freq; 497 } 498 499 static unsigned long 500 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 501 { 502 struct acpi_processor_performance *perf; 503 504 perf = to_perf_data(data); 505 if (cpu_khz) { 506 /* search the closest match to cpu_khz */ 507 unsigned int i; 508 unsigned long freq; 509 unsigned long freqn = perf->states[0].core_frequency * 1000; 510 511 for (i = 0; i < (perf->state_count-1); i++) { 512 freq = freqn; 513 freqn = perf->states[i+1].core_frequency * 1000; 514 if ((2 * cpu_khz) > (freqn + freq)) { 515 perf->state = i; 516 return freq; 517 } 518 } 519 perf->state = perf->state_count-1; 520 return freqn; 521 } else { 522 /* assume CPU is at P0... */ 523 perf->state = 0; 524 return perf->states[0].core_frequency * 1000; 525 } 526 } 527 528 static void free_acpi_perf_data(void) 529 { 530 unsigned int i; 531 532 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 533 for_each_possible_cpu(i) 534 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 535 ->shared_cpu_map); 536 free_percpu(acpi_perf_data); 537 } 538 539 static int boost_notify(struct notifier_block *nb, unsigned long action, 540 void *hcpu) 541 { 542 unsigned cpu = (long)hcpu; 543 const struct cpumask *cpumask; 544 545 cpumask = get_cpu_mask(cpu); 546 547 /* 548 * Clear the boost-disable bit on the CPU_DOWN path so that 549 * this cpu cannot block the remaining ones from boosting. On 550 * the CPU_UP path we simply keep the boost-disable flag in 551 * sync with the current global state. 552 */ 553 554 switch (action) { 555 case CPU_DOWN_FAILED: 556 case CPU_DOWN_FAILED_FROZEN: 557 case CPU_ONLINE: 558 case CPU_ONLINE_FROZEN: 559 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask); 560 break; 561 562 case CPU_DOWN_PREPARE: 563 case CPU_DOWN_PREPARE_FROZEN: 564 boost_set_msrs(1, cpumask); 565 break; 566 567 default: 568 break; 569 } 570 571 return NOTIFY_OK; 572 } 573 574 575 static struct notifier_block boost_nb = { 576 .notifier_call = boost_notify, 577 }; 578 579 /* 580 * acpi_cpufreq_early_init - initialize ACPI P-States library 581 * 582 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 583 * in order to determine correct frequency and voltage pairings. We can 584 * do _PDC and _PSD and find out the processor dependency for the 585 * actual init that will happen later... 586 */ 587 static int __init acpi_cpufreq_early_init(void) 588 { 589 unsigned int i; 590 pr_debug("acpi_cpufreq_early_init\n"); 591 592 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 593 if (!acpi_perf_data) { 594 pr_debug("Memory allocation error for acpi_perf_data.\n"); 595 return -ENOMEM; 596 } 597 for_each_possible_cpu(i) { 598 if (!zalloc_cpumask_var_node( 599 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 600 GFP_KERNEL, cpu_to_node(i))) { 601 602 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 603 free_acpi_perf_data(); 604 return -ENOMEM; 605 } 606 } 607 608 /* Do initialization in ACPI core */ 609 acpi_processor_preregister_performance(acpi_perf_data); 610 return 0; 611 } 612 613 #ifdef CONFIG_SMP 614 /* 615 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 616 * or do it in BIOS firmware and won't inform about it to OS. If not 617 * detected, this has a side effect of making CPU run at a different speed 618 * than OS intended it to run at. Detect it and handle it cleanly. 619 */ 620 static int bios_with_sw_any_bug; 621 622 static int sw_any_bug_found(const struct dmi_system_id *d) 623 { 624 bios_with_sw_any_bug = 1; 625 return 0; 626 } 627 628 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 629 { 630 .callback = sw_any_bug_found, 631 .ident = "Supermicro Server X6DLP", 632 .matches = { 633 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 634 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 635 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 636 }, 637 }, 638 { } 639 }; 640 641 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 642 { 643 /* Intel Xeon Processor 7100 Series Specification Update 644 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf 645 * AL30: A Machine Check Exception (MCE) Occurring during an 646 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 647 * Both Processor Cores to Lock Up. */ 648 if (c->x86_vendor == X86_VENDOR_INTEL) { 649 if ((c->x86 == 15) && 650 (c->x86_model == 6) && 651 (c->x86_mask == 8)) { 652 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); 653 return -ENODEV; 654 } 655 } 656 return 0; 657 } 658 #endif 659 660 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 661 { 662 unsigned int i; 663 unsigned int valid_states = 0; 664 unsigned int cpu = policy->cpu; 665 struct acpi_cpufreq_data *data; 666 unsigned int result = 0; 667 struct cpuinfo_x86 *c = &cpu_data(policy->cpu); 668 struct acpi_processor_performance *perf; 669 struct cpufreq_frequency_table *freq_table; 670 #ifdef CONFIG_SMP 671 static int blacklisted; 672 #endif 673 674 pr_debug("acpi_cpufreq_cpu_init\n"); 675 676 #ifdef CONFIG_SMP 677 if (blacklisted) 678 return blacklisted; 679 blacklisted = acpi_cpufreq_blacklist(c); 680 if (blacklisted) 681 return blacklisted; 682 #endif 683 684 data = kzalloc(sizeof(*data), GFP_KERNEL); 685 if (!data) 686 return -ENOMEM; 687 688 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 689 result = -ENOMEM; 690 goto err_free; 691 } 692 693 perf = per_cpu_ptr(acpi_perf_data, cpu); 694 data->acpi_perf_cpu = cpu; 695 policy->driver_data = data; 696 697 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 698 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 699 700 result = acpi_processor_register_performance(perf, cpu); 701 if (result) 702 goto err_free_mask; 703 704 policy->shared_type = perf->shared_type; 705 706 /* 707 * Will let policy->cpus know about dependency only when software 708 * coordination is required. 709 */ 710 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 711 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 712 cpumask_copy(policy->cpus, perf->shared_cpu_map); 713 } 714 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 715 716 #ifdef CONFIG_SMP 717 dmi_check_system(sw_any_bug_dmi_table); 718 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 719 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 720 cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); 721 } 722 723 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { 724 cpumask_clear(policy->cpus); 725 cpumask_set_cpu(cpu, policy->cpus); 726 cpumask_copy(data->freqdomain_cpus, 727 topology_sibling_cpumask(cpu)); 728 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 729 pr_info_once("overriding BIOS provided _PSD data\n"); 730 } 731 #endif 732 733 /* capability check */ 734 if (perf->state_count <= 1) { 735 pr_debug("No P-States\n"); 736 result = -ENODEV; 737 goto err_unreg; 738 } 739 740 if (perf->control_register.space_id != perf->status_register.space_id) { 741 result = -ENODEV; 742 goto err_unreg; 743 } 744 745 switch (perf->control_register.space_id) { 746 case ACPI_ADR_SPACE_SYSTEM_IO: 747 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 748 boot_cpu_data.x86 == 0xf) { 749 pr_debug("AMD K8 systems must use native drivers.\n"); 750 result = -ENODEV; 751 goto err_unreg; 752 } 753 pr_debug("SYSTEM IO addr space\n"); 754 data->cpu_feature = SYSTEM_IO_CAPABLE; 755 data->cpu_freq_read = cpu_freq_read_io; 756 data->cpu_freq_write = cpu_freq_write_io; 757 break; 758 case ACPI_ADR_SPACE_FIXED_HARDWARE: 759 pr_debug("HARDWARE addr space\n"); 760 if (check_est_cpu(cpu)) { 761 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 762 data->cpu_freq_read = cpu_freq_read_intel; 763 data->cpu_freq_write = cpu_freq_write_intel; 764 break; 765 } 766 if (check_amd_hwpstate_cpu(cpu)) { 767 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 768 data->cpu_freq_read = cpu_freq_read_amd; 769 data->cpu_freq_write = cpu_freq_write_amd; 770 break; 771 } 772 result = -ENODEV; 773 goto err_unreg; 774 default: 775 pr_debug("Unknown addr space %d\n", 776 (u32) (perf->control_register.space_id)); 777 result = -ENODEV; 778 goto err_unreg; 779 } 780 781 freq_table = kzalloc(sizeof(*freq_table) * 782 (perf->state_count+1), GFP_KERNEL); 783 if (!freq_table) { 784 result = -ENOMEM; 785 goto err_unreg; 786 } 787 788 /* detect transition latency */ 789 policy->cpuinfo.transition_latency = 0; 790 for (i = 0; i < perf->state_count; i++) { 791 if ((perf->states[i].transition_latency * 1000) > 792 policy->cpuinfo.transition_latency) 793 policy->cpuinfo.transition_latency = 794 perf->states[i].transition_latency * 1000; 795 } 796 797 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 798 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 799 policy->cpuinfo.transition_latency > 20 * 1000) { 800 policy->cpuinfo.transition_latency = 20 * 1000; 801 pr_info_once("P-state transition latency capped at 20 uS\n"); 802 } 803 804 /* table init */ 805 for (i = 0; i < perf->state_count; i++) { 806 if (i > 0 && perf->states[i].core_frequency >= 807 freq_table[valid_states-1].frequency / 1000) 808 continue; 809 810 freq_table[valid_states].driver_data = i; 811 freq_table[valid_states].frequency = 812 perf->states[i].core_frequency * 1000; 813 valid_states++; 814 } 815 freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 816 perf->state = 0; 817 818 result = cpufreq_table_validate_and_show(policy, freq_table); 819 if (result) 820 goto err_freqfree; 821 822 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) 823 pr_warn(FW_WARN "P-state 0 is not max freq\n"); 824 825 switch (perf->control_register.space_id) { 826 case ACPI_ADR_SPACE_SYSTEM_IO: 827 /* 828 * The core will not set policy->cur, because 829 * cpufreq_driver->get is NULL, so we need to set it here. 830 * However, we have to guess it, because the current speed is 831 * unknown and not detectable via IO ports. 832 */ 833 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 834 break; 835 case ACPI_ADR_SPACE_FIXED_HARDWARE: 836 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 837 break; 838 default: 839 break; 840 } 841 842 /* notify BIOS that we exist */ 843 acpi_processor_notify_smm(THIS_MODULE); 844 845 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 846 for (i = 0; i < perf->state_count; i++) 847 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 848 (i == perf->state ? '*' : ' '), i, 849 (u32) perf->states[i].core_frequency, 850 (u32) perf->states[i].power, 851 (u32) perf->states[i].transition_latency); 852 853 /* 854 * the first call to ->target() should result in us actually 855 * writing something to the appropriate registers. 856 */ 857 data->resume = 1; 858 859 policy->fast_switch_possible = !acpi_pstate_strict && 860 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); 861 862 return result; 863 864 err_freqfree: 865 kfree(freq_table); 866 err_unreg: 867 acpi_processor_unregister_performance(cpu); 868 err_free_mask: 869 free_cpumask_var(data->freqdomain_cpus); 870 err_free: 871 kfree(data); 872 policy->driver_data = NULL; 873 874 return result; 875 } 876 877 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 878 { 879 struct acpi_cpufreq_data *data = policy->driver_data; 880 881 pr_debug("acpi_cpufreq_cpu_exit\n"); 882 883 policy->fast_switch_possible = false; 884 policy->driver_data = NULL; 885 acpi_processor_unregister_performance(data->acpi_perf_cpu); 886 free_cpumask_var(data->freqdomain_cpus); 887 kfree(policy->freq_table); 888 kfree(data); 889 890 return 0; 891 } 892 893 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 894 { 895 struct acpi_cpufreq_data *data = policy->driver_data; 896 897 pr_debug("acpi_cpufreq_resume\n"); 898 899 data->resume = 1; 900 901 return 0; 902 } 903 904 static struct freq_attr *acpi_cpufreq_attr[] = { 905 &cpufreq_freq_attr_scaling_available_freqs, 906 &freqdomain_cpus, 907 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 908 &cpb, 909 #endif 910 NULL, 911 }; 912 913 static struct cpufreq_driver acpi_cpufreq_driver = { 914 .verify = cpufreq_generic_frequency_table_verify, 915 .target_index = acpi_cpufreq_target, 916 .fast_switch = acpi_cpufreq_fast_switch, 917 .bios_limit = acpi_processor_get_bios_limit, 918 .init = acpi_cpufreq_cpu_init, 919 .exit = acpi_cpufreq_cpu_exit, 920 .resume = acpi_cpufreq_resume, 921 .name = "acpi-cpufreq", 922 .attr = acpi_cpufreq_attr, 923 }; 924 925 static void __init acpi_cpufreq_boost_init(void) 926 { 927 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) { 928 msrs = msrs_alloc(); 929 930 if (!msrs) 931 return; 932 933 acpi_cpufreq_driver.set_boost = set_boost; 934 acpi_cpufreq_driver.boost_enabled = boost_state(0); 935 936 cpu_notifier_register_begin(); 937 938 /* Force all MSRs to the same value */ 939 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, 940 cpu_online_mask); 941 942 __register_cpu_notifier(&boost_nb); 943 944 cpu_notifier_register_done(); 945 } 946 } 947 948 static void acpi_cpufreq_boost_exit(void) 949 { 950 if (msrs) { 951 unregister_cpu_notifier(&boost_nb); 952 953 msrs_free(msrs); 954 msrs = NULL; 955 } 956 } 957 958 static int __init acpi_cpufreq_init(void) 959 { 960 int ret; 961 962 if (acpi_disabled) 963 return -ENODEV; 964 965 /* don't keep reloading if cpufreq_driver exists */ 966 if (cpufreq_get_current_driver()) 967 return -EEXIST; 968 969 pr_debug("acpi_cpufreq_init\n"); 970 971 ret = acpi_cpufreq_early_init(); 972 if (ret) 973 return ret; 974 975 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 976 /* this is a sysfs file with a strange name and an even stranger 977 * semantic - per CPU instantiation, but system global effect. 978 * Lets enable it only on AMD CPUs for compatibility reasons and 979 * only if configured. This is considered legacy code, which 980 * will probably be removed at some point in the future. 981 */ 982 if (!check_amd_hwpstate_cpu(0)) { 983 struct freq_attr **attr; 984 985 pr_debug("CPB unsupported, do not expose it\n"); 986 987 for (attr = acpi_cpufreq_attr; *attr; attr++) 988 if (*attr == &cpb) { 989 *attr = NULL; 990 break; 991 } 992 } 993 #endif 994 acpi_cpufreq_boost_init(); 995 996 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 997 if (ret) { 998 free_acpi_perf_data(); 999 acpi_cpufreq_boost_exit(); 1000 } 1001 return ret; 1002 } 1003 1004 static void __exit acpi_cpufreq_exit(void) 1005 { 1006 pr_debug("acpi_cpufreq_exit\n"); 1007 1008 acpi_cpufreq_boost_exit(); 1009 1010 cpufreq_unregister_driver(&acpi_cpufreq_driver); 1011 1012 free_acpi_perf_data(); 1013 } 1014 1015 module_param(acpi_pstate_strict, uint, 0644); 1016 MODULE_PARM_DESC(acpi_pstate_strict, 1017 "value 0 or non-zero. non-zero -> strict ACPI checks are " 1018 "performed during frequency changes."); 1019 1020 late_initcall(acpi_cpufreq_init); 1021 module_exit(acpi_cpufreq_exit); 1022 1023 static const struct x86_cpu_id acpi_cpufreq_ids[] = { 1024 X86_FEATURE_MATCH(X86_FEATURE_ACPI), 1025 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE), 1026 {} 1027 }; 1028 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1029 1030 static const struct acpi_device_id processor_device_ids[] = { 1031 {ACPI_PROCESSOR_OBJECT_HID, }, 1032 {ACPI_PROCESSOR_DEVICE_HID, }, 1033 {}, 1034 }; 1035 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1036 1037 MODULE_ALIAS("acpi"); 1038