1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * acpi-cpufreq.c - ACPI Processor P-States Driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/smp.h> 17 #include <linux/sched.h> 18 #include <linux/cpufreq.h> 19 #include <linux/compiler.h> 20 #include <linux/dmi.h> 21 #include <linux/slab.h> 22 23 #include <linux/acpi.h> 24 #include <linux/io.h> 25 #include <linux/delay.h> 26 #include <linux/uaccess.h> 27 28 #include <acpi/processor.h> 29 30 #include <asm/msr.h> 31 #include <asm/processor.h> 32 #include <asm/cpufeature.h> 33 #include <asm/cpu_device_id.h> 34 35 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 36 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 37 MODULE_LICENSE("GPL"); 38 39 enum { 40 UNDEFINED_CAPABLE = 0, 41 SYSTEM_INTEL_MSR_CAPABLE, 42 SYSTEM_AMD_MSR_CAPABLE, 43 SYSTEM_IO_CAPABLE, 44 }; 45 46 #define INTEL_MSR_RANGE (0xffff) 47 #define AMD_MSR_RANGE (0x7) 48 #define HYGON_MSR_RANGE (0x7) 49 50 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 51 52 struct acpi_cpufreq_data { 53 unsigned int resume; 54 unsigned int cpu_feature; 55 unsigned int acpi_perf_cpu; 56 cpumask_var_t freqdomain_cpus; 57 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); 58 u32 (*cpu_freq_read)(struct acpi_pct_register *reg); 59 }; 60 61 /* acpi_perf_data is a pointer to percpu data. */ 62 static struct acpi_processor_performance __percpu *acpi_perf_data; 63 64 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) 65 { 66 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); 67 } 68 69 static struct cpufreq_driver acpi_cpufreq_driver; 70 71 static unsigned int acpi_pstate_strict; 72 73 static bool boost_state(unsigned int cpu) 74 { 75 u32 lo, hi; 76 u64 msr; 77 78 switch (boot_cpu_data.x86_vendor) { 79 case X86_VENDOR_INTEL: 80 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 81 msr = lo | ((u64)hi << 32); 82 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 83 case X86_VENDOR_HYGON: 84 case X86_VENDOR_AMD: 85 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 86 msr = lo | ((u64)hi << 32); 87 return !(msr & MSR_K7_HWCR_CPB_DIS); 88 } 89 return false; 90 } 91 92 static int boost_set_msr(bool enable) 93 { 94 u32 msr_addr; 95 u64 msr_mask, val; 96 97 switch (boot_cpu_data.x86_vendor) { 98 case X86_VENDOR_INTEL: 99 msr_addr = MSR_IA32_MISC_ENABLE; 100 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 101 break; 102 case X86_VENDOR_HYGON: 103 case X86_VENDOR_AMD: 104 msr_addr = MSR_K7_HWCR; 105 msr_mask = MSR_K7_HWCR_CPB_DIS; 106 break; 107 default: 108 return -EINVAL; 109 } 110 111 rdmsrl(msr_addr, val); 112 113 if (enable) 114 val &= ~msr_mask; 115 else 116 val |= msr_mask; 117 118 wrmsrl(msr_addr, val); 119 return 0; 120 } 121 122 static void boost_set_msr_each(void *p_en) 123 { 124 bool enable = (bool) p_en; 125 126 boost_set_msr(enable); 127 } 128 129 static int set_boost(int val) 130 { 131 get_online_cpus(); 132 on_each_cpu(boost_set_msr_each, (void *)(long)val, 1); 133 put_online_cpus(); 134 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); 135 136 return 0; 137 } 138 139 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 140 { 141 struct acpi_cpufreq_data *data = policy->driver_data; 142 143 if (unlikely(!data)) 144 return -ENODEV; 145 146 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 147 } 148 149 cpufreq_freq_attr_ro(freqdomain_cpus); 150 151 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 152 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 153 size_t count) 154 { 155 int ret; 156 unsigned int val = 0; 157 158 if (!acpi_cpufreq_driver.set_boost) 159 return -EINVAL; 160 161 ret = kstrtouint(buf, 10, &val); 162 if (ret || val > 1) 163 return -EINVAL; 164 165 set_boost(val); 166 167 return count; 168 } 169 170 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 171 { 172 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); 173 } 174 175 cpufreq_freq_attr_rw(cpb); 176 #endif 177 178 static int check_est_cpu(unsigned int cpuid) 179 { 180 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 181 182 return cpu_has(cpu, X86_FEATURE_EST); 183 } 184 185 static int check_amd_hwpstate_cpu(unsigned int cpuid) 186 { 187 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 188 189 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 190 } 191 192 static unsigned extract_io(struct cpufreq_policy *policy, u32 value) 193 { 194 struct acpi_cpufreq_data *data = policy->driver_data; 195 struct acpi_processor_performance *perf; 196 int i; 197 198 perf = to_perf_data(data); 199 200 for (i = 0; i < perf->state_count; i++) { 201 if (value == perf->states[i].status) 202 return policy->freq_table[i].frequency; 203 } 204 return 0; 205 } 206 207 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) 208 { 209 struct acpi_cpufreq_data *data = policy->driver_data; 210 struct cpufreq_frequency_table *pos; 211 struct acpi_processor_performance *perf; 212 213 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 214 msr &= AMD_MSR_RANGE; 215 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) 216 msr &= HYGON_MSR_RANGE; 217 else 218 msr &= INTEL_MSR_RANGE; 219 220 perf = to_perf_data(data); 221 222 cpufreq_for_each_entry(pos, policy->freq_table) 223 if (msr == perf->states[pos->driver_data].status) 224 return pos->frequency; 225 return policy->freq_table[0].frequency; 226 } 227 228 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) 229 { 230 struct acpi_cpufreq_data *data = policy->driver_data; 231 232 switch (data->cpu_feature) { 233 case SYSTEM_INTEL_MSR_CAPABLE: 234 case SYSTEM_AMD_MSR_CAPABLE: 235 return extract_msr(policy, val); 236 case SYSTEM_IO_CAPABLE: 237 return extract_io(policy, val); 238 default: 239 return 0; 240 } 241 } 242 243 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) 244 { 245 u32 val, dummy; 246 247 rdmsr(MSR_IA32_PERF_CTL, val, dummy); 248 return val; 249 } 250 251 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) 252 { 253 u32 lo, hi; 254 255 rdmsr(MSR_IA32_PERF_CTL, lo, hi); 256 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); 257 wrmsr(MSR_IA32_PERF_CTL, lo, hi); 258 } 259 260 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) 261 { 262 u32 val, dummy; 263 264 rdmsr(MSR_AMD_PERF_CTL, val, dummy); 265 return val; 266 } 267 268 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) 269 { 270 wrmsr(MSR_AMD_PERF_CTL, val, 0); 271 } 272 273 static u32 cpu_freq_read_io(struct acpi_pct_register *reg) 274 { 275 u32 val; 276 277 acpi_os_read_port(reg->address, &val, reg->bit_width); 278 return val; 279 } 280 281 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) 282 { 283 acpi_os_write_port(reg->address, val, reg->bit_width); 284 } 285 286 struct drv_cmd { 287 struct acpi_pct_register *reg; 288 u32 val; 289 union { 290 void (*write)(struct acpi_pct_register *reg, u32 val); 291 u32 (*read)(struct acpi_pct_register *reg); 292 } func; 293 }; 294 295 /* Called via smp_call_function_single(), on the target CPU */ 296 static void do_drv_read(void *_cmd) 297 { 298 struct drv_cmd *cmd = _cmd; 299 300 cmd->val = cmd->func.read(cmd->reg); 301 } 302 303 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) 304 { 305 struct acpi_processor_performance *perf = to_perf_data(data); 306 struct drv_cmd cmd = { 307 .reg = &perf->control_register, 308 .func.read = data->cpu_freq_read, 309 }; 310 int err; 311 312 err = smp_call_function_any(mask, do_drv_read, &cmd, 1); 313 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 314 return cmd.val; 315 } 316 317 /* Called via smp_call_function_many(), on the target CPUs */ 318 static void do_drv_write(void *_cmd) 319 { 320 struct drv_cmd *cmd = _cmd; 321 322 cmd->func.write(cmd->reg, cmd->val); 323 } 324 325 static void drv_write(struct acpi_cpufreq_data *data, 326 const struct cpumask *mask, u32 val) 327 { 328 struct acpi_processor_performance *perf = to_perf_data(data); 329 struct drv_cmd cmd = { 330 .reg = &perf->control_register, 331 .val = val, 332 .func.write = data->cpu_freq_write, 333 }; 334 int this_cpu; 335 336 this_cpu = get_cpu(); 337 if (cpumask_test_cpu(this_cpu, mask)) 338 do_drv_write(&cmd); 339 340 smp_call_function_many(mask, do_drv_write, &cmd, 1); 341 put_cpu(); 342 } 343 344 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) 345 { 346 u32 val; 347 348 if (unlikely(cpumask_empty(mask))) 349 return 0; 350 351 val = drv_read(data, mask); 352 353 pr_debug("%s = %u\n", __func__, val); 354 355 return val; 356 } 357 358 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 359 { 360 struct acpi_cpufreq_data *data; 361 struct cpufreq_policy *policy; 362 unsigned int freq; 363 unsigned int cached_freq; 364 365 pr_debug("%s (%d)\n", __func__, cpu); 366 367 policy = cpufreq_cpu_get_raw(cpu); 368 if (unlikely(!policy)) 369 return 0; 370 371 data = policy->driver_data; 372 if (unlikely(!data || !policy->freq_table)) 373 return 0; 374 375 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; 376 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); 377 if (freq != cached_freq) { 378 /* 379 * The dreaded BIOS frequency change behind our back. 380 * Force set the frequency on next target call. 381 */ 382 data->resume = 1; 383 } 384 385 pr_debug("cur freq = %u\n", freq); 386 387 return freq; 388 } 389 390 static unsigned int check_freqs(struct cpufreq_policy *policy, 391 const struct cpumask *mask, unsigned int freq) 392 { 393 struct acpi_cpufreq_data *data = policy->driver_data; 394 unsigned int cur_freq; 395 unsigned int i; 396 397 for (i = 0; i < 100; i++) { 398 cur_freq = extract_freq(policy, get_cur_val(mask, data)); 399 if (cur_freq == freq) 400 return 1; 401 udelay(10); 402 } 403 return 0; 404 } 405 406 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 407 unsigned int index) 408 { 409 struct acpi_cpufreq_data *data = policy->driver_data; 410 struct acpi_processor_performance *perf; 411 const struct cpumask *mask; 412 unsigned int next_perf_state = 0; /* Index into perf table */ 413 int result = 0; 414 415 if (unlikely(!data)) { 416 return -ENODEV; 417 } 418 419 perf = to_perf_data(data); 420 next_perf_state = policy->freq_table[index].driver_data; 421 if (perf->state == next_perf_state) { 422 if (unlikely(data->resume)) { 423 pr_debug("Called after resume, resetting to P%d\n", 424 next_perf_state); 425 data->resume = 0; 426 } else { 427 pr_debug("Already at target state (P%d)\n", 428 next_perf_state); 429 return 0; 430 } 431 } 432 433 /* 434 * The core won't allow CPUs to go away until the governor has been 435 * stopped, so we can rely on the stability of policy->cpus. 436 */ 437 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? 438 cpumask_of(policy->cpu) : policy->cpus; 439 440 drv_write(data, mask, perf->states[next_perf_state].control); 441 442 if (acpi_pstate_strict) { 443 if (!check_freqs(policy, mask, 444 policy->freq_table[index].frequency)) { 445 pr_debug("%s (%d)\n", __func__, policy->cpu); 446 result = -EAGAIN; 447 } 448 } 449 450 if (!result) 451 perf->state = next_perf_state; 452 453 return result; 454 } 455 456 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, 457 unsigned int target_freq) 458 { 459 struct acpi_cpufreq_data *data = policy->driver_data; 460 struct acpi_processor_performance *perf; 461 struct cpufreq_frequency_table *entry; 462 unsigned int next_perf_state, next_freq, index; 463 464 /* 465 * Find the closest frequency above target_freq. 466 */ 467 if (policy->cached_target_freq == target_freq) 468 index = policy->cached_resolved_idx; 469 else 470 index = cpufreq_table_find_index_dl(policy, target_freq); 471 472 entry = &policy->freq_table[index]; 473 next_freq = entry->frequency; 474 next_perf_state = entry->driver_data; 475 476 perf = to_perf_data(data); 477 if (perf->state == next_perf_state) { 478 if (unlikely(data->resume)) 479 data->resume = 0; 480 else 481 return next_freq; 482 } 483 484 data->cpu_freq_write(&perf->control_register, 485 perf->states[next_perf_state].control); 486 perf->state = next_perf_state; 487 return next_freq; 488 } 489 490 static unsigned long 491 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 492 { 493 struct acpi_processor_performance *perf; 494 495 perf = to_perf_data(data); 496 if (cpu_khz) { 497 /* search the closest match to cpu_khz */ 498 unsigned int i; 499 unsigned long freq; 500 unsigned long freqn = perf->states[0].core_frequency * 1000; 501 502 for (i = 0; i < (perf->state_count-1); i++) { 503 freq = freqn; 504 freqn = perf->states[i+1].core_frequency * 1000; 505 if ((2 * cpu_khz) > (freqn + freq)) { 506 perf->state = i; 507 return freq; 508 } 509 } 510 perf->state = perf->state_count-1; 511 return freqn; 512 } else { 513 /* assume CPU is at P0... */ 514 perf->state = 0; 515 return perf->states[0].core_frequency * 1000; 516 } 517 } 518 519 static void free_acpi_perf_data(void) 520 { 521 unsigned int i; 522 523 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 524 for_each_possible_cpu(i) 525 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 526 ->shared_cpu_map); 527 free_percpu(acpi_perf_data); 528 } 529 530 static int cpufreq_boost_online(unsigned int cpu) 531 { 532 /* 533 * On the CPU_UP path we simply keep the boost-disable flag 534 * in sync with the current global state. 535 */ 536 return boost_set_msr(acpi_cpufreq_driver.boost_enabled); 537 } 538 539 static int cpufreq_boost_down_prep(unsigned int cpu) 540 { 541 /* 542 * Clear the boost-disable bit on the CPU_DOWN path so that 543 * this cpu cannot block the remaining ones from boosting. 544 */ 545 return boost_set_msr(1); 546 } 547 548 /* 549 * acpi_cpufreq_early_init - initialize ACPI P-States library 550 * 551 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 552 * in order to determine correct frequency and voltage pairings. We can 553 * do _PDC and _PSD and find out the processor dependency for the 554 * actual init that will happen later... 555 */ 556 static int __init acpi_cpufreq_early_init(void) 557 { 558 unsigned int i; 559 pr_debug("%s\n", __func__); 560 561 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 562 if (!acpi_perf_data) { 563 pr_debug("Memory allocation error for acpi_perf_data.\n"); 564 return -ENOMEM; 565 } 566 for_each_possible_cpu(i) { 567 if (!zalloc_cpumask_var_node( 568 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 569 GFP_KERNEL, cpu_to_node(i))) { 570 571 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 572 free_acpi_perf_data(); 573 return -ENOMEM; 574 } 575 } 576 577 /* Do initialization in ACPI core */ 578 acpi_processor_preregister_performance(acpi_perf_data); 579 return 0; 580 } 581 582 #ifdef CONFIG_SMP 583 /* 584 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 585 * or do it in BIOS firmware and won't inform about it to OS. If not 586 * detected, this has a side effect of making CPU run at a different speed 587 * than OS intended it to run at. Detect it and handle it cleanly. 588 */ 589 static int bios_with_sw_any_bug; 590 591 static int sw_any_bug_found(const struct dmi_system_id *d) 592 { 593 bios_with_sw_any_bug = 1; 594 return 0; 595 } 596 597 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 598 { 599 .callback = sw_any_bug_found, 600 .ident = "Supermicro Server X6DLP", 601 .matches = { 602 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 603 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 604 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 605 }, 606 }, 607 { } 608 }; 609 610 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 611 { 612 /* Intel Xeon Processor 7100 Series Specification Update 613 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf 614 * AL30: A Machine Check Exception (MCE) Occurring during an 615 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 616 * Both Processor Cores to Lock Up. */ 617 if (c->x86_vendor == X86_VENDOR_INTEL) { 618 if ((c->x86 == 15) && 619 (c->x86_model == 6) && 620 (c->x86_stepping == 8)) { 621 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); 622 return -ENODEV; 623 } 624 } 625 return 0; 626 } 627 #endif 628 629 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 630 { 631 unsigned int i; 632 unsigned int valid_states = 0; 633 unsigned int cpu = policy->cpu; 634 struct acpi_cpufreq_data *data; 635 unsigned int result = 0; 636 struct cpuinfo_x86 *c = &cpu_data(policy->cpu); 637 struct acpi_processor_performance *perf; 638 struct cpufreq_frequency_table *freq_table; 639 #ifdef CONFIG_SMP 640 static int blacklisted; 641 #endif 642 643 pr_debug("%s\n", __func__); 644 645 #ifdef CONFIG_SMP 646 if (blacklisted) 647 return blacklisted; 648 blacklisted = acpi_cpufreq_blacklist(c); 649 if (blacklisted) 650 return blacklisted; 651 #endif 652 653 data = kzalloc(sizeof(*data), GFP_KERNEL); 654 if (!data) 655 return -ENOMEM; 656 657 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 658 result = -ENOMEM; 659 goto err_free; 660 } 661 662 perf = per_cpu_ptr(acpi_perf_data, cpu); 663 data->acpi_perf_cpu = cpu; 664 policy->driver_data = data; 665 666 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 667 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 668 669 result = acpi_processor_register_performance(perf, cpu); 670 if (result) 671 goto err_free_mask; 672 673 policy->shared_type = perf->shared_type; 674 675 /* 676 * Will let policy->cpus know about dependency only when software 677 * coordination is required. 678 */ 679 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 680 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 681 cpumask_copy(policy->cpus, perf->shared_cpu_map); 682 } 683 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 684 685 #ifdef CONFIG_SMP 686 dmi_check_system(sw_any_bug_dmi_table); 687 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 688 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 689 cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); 690 } 691 692 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { 693 cpumask_clear(policy->cpus); 694 cpumask_set_cpu(cpu, policy->cpus); 695 cpumask_copy(data->freqdomain_cpus, 696 topology_sibling_cpumask(cpu)); 697 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 698 pr_info_once("overriding BIOS provided _PSD data\n"); 699 } 700 #endif 701 702 /* capability check */ 703 if (perf->state_count <= 1) { 704 pr_debug("No P-States\n"); 705 result = -ENODEV; 706 goto err_unreg; 707 } 708 709 if (perf->control_register.space_id != perf->status_register.space_id) { 710 result = -ENODEV; 711 goto err_unreg; 712 } 713 714 switch (perf->control_register.space_id) { 715 case ACPI_ADR_SPACE_SYSTEM_IO: 716 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 717 boot_cpu_data.x86 == 0xf) { 718 pr_debug("AMD K8 systems must use native drivers.\n"); 719 result = -ENODEV; 720 goto err_unreg; 721 } 722 pr_debug("SYSTEM IO addr space\n"); 723 data->cpu_feature = SYSTEM_IO_CAPABLE; 724 data->cpu_freq_read = cpu_freq_read_io; 725 data->cpu_freq_write = cpu_freq_write_io; 726 break; 727 case ACPI_ADR_SPACE_FIXED_HARDWARE: 728 pr_debug("HARDWARE addr space\n"); 729 if (check_est_cpu(cpu)) { 730 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 731 data->cpu_freq_read = cpu_freq_read_intel; 732 data->cpu_freq_write = cpu_freq_write_intel; 733 break; 734 } 735 if (check_amd_hwpstate_cpu(cpu)) { 736 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 737 data->cpu_freq_read = cpu_freq_read_amd; 738 data->cpu_freq_write = cpu_freq_write_amd; 739 break; 740 } 741 result = -ENODEV; 742 goto err_unreg; 743 default: 744 pr_debug("Unknown addr space %d\n", 745 (u32) (perf->control_register.space_id)); 746 result = -ENODEV; 747 goto err_unreg; 748 } 749 750 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table), 751 GFP_KERNEL); 752 if (!freq_table) { 753 result = -ENOMEM; 754 goto err_unreg; 755 } 756 757 /* detect transition latency */ 758 policy->cpuinfo.transition_latency = 0; 759 for (i = 0; i < perf->state_count; i++) { 760 if ((perf->states[i].transition_latency * 1000) > 761 policy->cpuinfo.transition_latency) 762 policy->cpuinfo.transition_latency = 763 perf->states[i].transition_latency * 1000; 764 } 765 766 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 767 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 768 policy->cpuinfo.transition_latency > 20 * 1000) { 769 policy->cpuinfo.transition_latency = 20 * 1000; 770 pr_info_once("P-state transition latency capped at 20 uS\n"); 771 } 772 773 /* table init */ 774 for (i = 0; i < perf->state_count; i++) { 775 if (i > 0 && perf->states[i].core_frequency >= 776 freq_table[valid_states-1].frequency / 1000) 777 continue; 778 779 freq_table[valid_states].driver_data = i; 780 freq_table[valid_states].frequency = 781 perf->states[i].core_frequency * 1000; 782 valid_states++; 783 } 784 freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 785 policy->freq_table = freq_table; 786 perf->state = 0; 787 788 switch (perf->control_register.space_id) { 789 case ACPI_ADR_SPACE_SYSTEM_IO: 790 /* 791 * The core will not set policy->cur, because 792 * cpufreq_driver->get is NULL, so we need to set it here. 793 * However, we have to guess it, because the current speed is 794 * unknown and not detectable via IO ports. 795 */ 796 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 797 break; 798 case ACPI_ADR_SPACE_FIXED_HARDWARE: 799 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 800 break; 801 default: 802 break; 803 } 804 805 /* notify BIOS that we exist */ 806 acpi_processor_notify_smm(THIS_MODULE); 807 808 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 809 for (i = 0; i < perf->state_count; i++) 810 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 811 (i == perf->state ? '*' : ' '), i, 812 (u32) perf->states[i].core_frequency, 813 (u32) perf->states[i].power, 814 (u32) perf->states[i].transition_latency); 815 816 /* 817 * the first call to ->target() should result in us actually 818 * writing something to the appropriate registers. 819 */ 820 data->resume = 1; 821 822 policy->fast_switch_possible = !acpi_pstate_strict && 823 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); 824 825 return result; 826 827 err_unreg: 828 acpi_processor_unregister_performance(cpu); 829 err_free_mask: 830 free_cpumask_var(data->freqdomain_cpus); 831 err_free: 832 kfree(data); 833 policy->driver_data = NULL; 834 835 return result; 836 } 837 838 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 839 { 840 struct acpi_cpufreq_data *data = policy->driver_data; 841 842 pr_debug("%s\n", __func__); 843 844 policy->fast_switch_possible = false; 845 policy->driver_data = NULL; 846 acpi_processor_unregister_performance(data->acpi_perf_cpu); 847 free_cpumask_var(data->freqdomain_cpus); 848 kfree(policy->freq_table); 849 kfree(data); 850 851 return 0; 852 } 853 854 static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy) 855 { 856 struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data, 857 policy->cpu); 858 859 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) 860 pr_warn(FW_WARN "P-state 0 is not max freq\n"); 861 } 862 863 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 864 { 865 struct acpi_cpufreq_data *data = policy->driver_data; 866 867 pr_debug("%s\n", __func__); 868 869 data->resume = 1; 870 871 return 0; 872 } 873 874 static struct freq_attr *acpi_cpufreq_attr[] = { 875 &cpufreq_freq_attr_scaling_available_freqs, 876 &freqdomain_cpus, 877 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 878 &cpb, 879 #endif 880 NULL, 881 }; 882 883 static struct cpufreq_driver acpi_cpufreq_driver = { 884 .verify = cpufreq_generic_frequency_table_verify, 885 .target_index = acpi_cpufreq_target, 886 .fast_switch = acpi_cpufreq_fast_switch, 887 .bios_limit = acpi_processor_get_bios_limit, 888 .init = acpi_cpufreq_cpu_init, 889 .exit = acpi_cpufreq_cpu_exit, 890 .ready = acpi_cpufreq_cpu_ready, 891 .resume = acpi_cpufreq_resume, 892 .name = "acpi-cpufreq", 893 .attr = acpi_cpufreq_attr, 894 }; 895 896 static enum cpuhp_state acpi_cpufreq_online; 897 898 static void __init acpi_cpufreq_boost_init(void) 899 { 900 int ret; 901 902 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) { 903 pr_debug("Boost capabilities not present in the processor\n"); 904 return; 905 } 906 907 acpi_cpufreq_driver.set_boost = set_boost; 908 acpi_cpufreq_driver.boost_enabled = boost_state(0); 909 910 /* 911 * This calls the online callback on all online cpu and forces all 912 * MSRs to the same value. 913 */ 914 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online", 915 cpufreq_boost_online, cpufreq_boost_down_prep); 916 if (ret < 0) { 917 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n"); 918 return; 919 } 920 acpi_cpufreq_online = ret; 921 } 922 923 static void acpi_cpufreq_boost_exit(void) 924 { 925 if (acpi_cpufreq_online > 0) 926 cpuhp_remove_state_nocalls(acpi_cpufreq_online); 927 } 928 929 static int __init acpi_cpufreq_init(void) 930 { 931 int ret; 932 933 if (acpi_disabled) 934 return -ENODEV; 935 936 /* don't keep reloading if cpufreq_driver exists */ 937 if (cpufreq_get_current_driver()) 938 return -EEXIST; 939 940 pr_debug("%s\n", __func__); 941 942 ret = acpi_cpufreq_early_init(); 943 if (ret) 944 return ret; 945 946 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 947 /* this is a sysfs file with a strange name and an even stranger 948 * semantic - per CPU instantiation, but system global effect. 949 * Lets enable it only on AMD CPUs for compatibility reasons and 950 * only if configured. This is considered legacy code, which 951 * will probably be removed at some point in the future. 952 */ 953 if (!check_amd_hwpstate_cpu(0)) { 954 struct freq_attr **attr; 955 956 pr_debug("CPB unsupported, do not expose it\n"); 957 958 for (attr = acpi_cpufreq_attr; *attr; attr++) 959 if (*attr == &cpb) { 960 *attr = NULL; 961 break; 962 } 963 } 964 #endif 965 acpi_cpufreq_boost_init(); 966 967 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 968 if (ret) { 969 free_acpi_perf_data(); 970 acpi_cpufreq_boost_exit(); 971 } 972 return ret; 973 } 974 975 static void __exit acpi_cpufreq_exit(void) 976 { 977 pr_debug("%s\n", __func__); 978 979 acpi_cpufreq_boost_exit(); 980 981 cpufreq_unregister_driver(&acpi_cpufreq_driver); 982 983 free_acpi_perf_data(); 984 } 985 986 module_param(acpi_pstate_strict, uint, 0644); 987 MODULE_PARM_DESC(acpi_pstate_strict, 988 "value 0 or non-zero. non-zero -> strict ACPI checks are " 989 "performed during frequency changes."); 990 991 late_initcall(acpi_cpufreq_init); 992 module_exit(acpi_cpufreq_exit); 993 994 static const struct x86_cpu_id acpi_cpufreq_ids[] = { 995 X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL), 996 X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL), 997 {} 998 }; 999 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1000 1001 static const struct acpi_device_id processor_device_ids[] = { 1002 {ACPI_PROCESSOR_OBJECT_HID, }, 1003 {ACPI_PROCESSOR_DEVICE_HID, }, 1004 {}, 1005 }; 1006 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1007 1008 MODULE_ALIAS("acpi"); 1009