1 /* 2 * acpi-cpufreq.c - ACPI Processor P-States Driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 8 * 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License along 22 * with this program; if not, write to the Free Software Foundation, Inc., 23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 24 * 25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/smp.h> 34 #include <linux/sched.h> 35 #include <linux/cpufreq.h> 36 #include <linux/compiler.h> 37 #include <linux/dmi.h> 38 #include <linux/slab.h> 39 40 #include <linux/acpi.h> 41 #include <linux/io.h> 42 #include <linux/delay.h> 43 #include <linux/uaccess.h> 44 45 #include <acpi/processor.h> 46 47 #include <asm/msr.h> 48 #include <asm/processor.h> 49 #include <asm/cpufeature.h> 50 51 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 52 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 53 MODULE_LICENSE("GPL"); 54 55 enum { 56 UNDEFINED_CAPABLE = 0, 57 SYSTEM_INTEL_MSR_CAPABLE, 58 SYSTEM_AMD_MSR_CAPABLE, 59 SYSTEM_IO_CAPABLE, 60 }; 61 62 #define INTEL_MSR_RANGE (0xffff) 63 #define AMD_MSR_RANGE (0x7) 64 65 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 66 67 struct acpi_cpufreq_data { 68 unsigned int resume; 69 unsigned int cpu_feature; 70 unsigned int acpi_perf_cpu; 71 cpumask_var_t freqdomain_cpus; 72 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); 73 u32 (*cpu_freq_read)(struct acpi_pct_register *reg); 74 }; 75 76 /* acpi_perf_data is a pointer to percpu data. */ 77 static struct acpi_processor_performance __percpu *acpi_perf_data; 78 79 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) 80 { 81 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); 82 } 83 84 static struct cpufreq_driver acpi_cpufreq_driver; 85 86 static unsigned int acpi_pstate_strict; 87 88 static bool boost_state(unsigned int cpu) 89 { 90 u32 lo, hi; 91 u64 msr; 92 93 switch (boot_cpu_data.x86_vendor) { 94 case X86_VENDOR_INTEL: 95 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 96 msr = lo | ((u64)hi << 32); 97 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 98 case X86_VENDOR_AMD: 99 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 100 msr = lo | ((u64)hi << 32); 101 return !(msr & MSR_K7_HWCR_CPB_DIS); 102 } 103 return false; 104 } 105 106 static int boost_set_msr(bool enable) 107 { 108 u32 msr_addr; 109 u64 msr_mask, val; 110 111 switch (boot_cpu_data.x86_vendor) { 112 case X86_VENDOR_INTEL: 113 msr_addr = MSR_IA32_MISC_ENABLE; 114 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 115 break; 116 case X86_VENDOR_AMD: 117 msr_addr = MSR_K7_HWCR; 118 msr_mask = MSR_K7_HWCR_CPB_DIS; 119 break; 120 default: 121 return -EINVAL; 122 } 123 124 rdmsrl(msr_addr, val); 125 126 if (enable) 127 val &= ~msr_mask; 128 else 129 val |= msr_mask; 130 131 wrmsrl(msr_addr, val); 132 return 0; 133 } 134 135 static void boost_set_msr_each(void *p_en) 136 { 137 bool enable = (bool) p_en; 138 139 boost_set_msr(enable); 140 } 141 142 static int set_boost(int val) 143 { 144 get_online_cpus(); 145 on_each_cpu(boost_set_msr_each, (void *)(long)val, 1); 146 put_online_cpus(); 147 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); 148 149 return 0; 150 } 151 152 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 153 { 154 struct acpi_cpufreq_data *data = policy->driver_data; 155 156 if (unlikely(!data)) 157 return -ENODEV; 158 159 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 160 } 161 162 cpufreq_freq_attr_ro(freqdomain_cpus); 163 164 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 165 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 166 size_t count) 167 { 168 int ret; 169 unsigned int val = 0; 170 171 if (!acpi_cpufreq_driver.set_boost) 172 return -EINVAL; 173 174 ret = kstrtouint(buf, 10, &val); 175 if (ret || val > 1) 176 return -EINVAL; 177 178 set_boost(val); 179 180 return count; 181 } 182 183 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 184 { 185 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); 186 } 187 188 cpufreq_freq_attr_rw(cpb); 189 #endif 190 191 static int check_est_cpu(unsigned int cpuid) 192 { 193 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 194 195 return cpu_has(cpu, X86_FEATURE_EST); 196 } 197 198 static int check_amd_hwpstate_cpu(unsigned int cpuid) 199 { 200 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 201 202 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 203 } 204 205 static unsigned extract_io(struct cpufreq_policy *policy, u32 value) 206 { 207 struct acpi_cpufreq_data *data = policy->driver_data; 208 struct acpi_processor_performance *perf; 209 int i; 210 211 perf = to_perf_data(data); 212 213 for (i = 0; i < perf->state_count; i++) { 214 if (value == perf->states[i].status) 215 return policy->freq_table[i].frequency; 216 } 217 return 0; 218 } 219 220 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) 221 { 222 struct acpi_cpufreq_data *data = policy->driver_data; 223 struct cpufreq_frequency_table *pos; 224 struct acpi_processor_performance *perf; 225 226 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 227 msr &= AMD_MSR_RANGE; 228 else 229 msr &= INTEL_MSR_RANGE; 230 231 perf = to_perf_data(data); 232 233 cpufreq_for_each_entry(pos, policy->freq_table) 234 if (msr == perf->states[pos->driver_data].status) 235 return pos->frequency; 236 return policy->freq_table[0].frequency; 237 } 238 239 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) 240 { 241 struct acpi_cpufreq_data *data = policy->driver_data; 242 243 switch (data->cpu_feature) { 244 case SYSTEM_INTEL_MSR_CAPABLE: 245 case SYSTEM_AMD_MSR_CAPABLE: 246 return extract_msr(policy, val); 247 case SYSTEM_IO_CAPABLE: 248 return extract_io(policy, val); 249 default: 250 return 0; 251 } 252 } 253 254 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) 255 { 256 u32 val, dummy; 257 258 rdmsr(MSR_IA32_PERF_CTL, val, dummy); 259 return val; 260 } 261 262 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) 263 { 264 u32 lo, hi; 265 266 rdmsr(MSR_IA32_PERF_CTL, lo, hi); 267 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); 268 wrmsr(MSR_IA32_PERF_CTL, lo, hi); 269 } 270 271 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) 272 { 273 u32 val, dummy; 274 275 rdmsr(MSR_AMD_PERF_CTL, val, dummy); 276 return val; 277 } 278 279 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) 280 { 281 wrmsr(MSR_AMD_PERF_CTL, val, 0); 282 } 283 284 static u32 cpu_freq_read_io(struct acpi_pct_register *reg) 285 { 286 u32 val; 287 288 acpi_os_read_port(reg->address, &val, reg->bit_width); 289 return val; 290 } 291 292 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) 293 { 294 acpi_os_write_port(reg->address, val, reg->bit_width); 295 } 296 297 struct drv_cmd { 298 struct acpi_pct_register *reg; 299 u32 val; 300 union { 301 void (*write)(struct acpi_pct_register *reg, u32 val); 302 u32 (*read)(struct acpi_pct_register *reg); 303 } func; 304 }; 305 306 /* Called via smp_call_function_single(), on the target CPU */ 307 static void do_drv_read(void *_cmd) 308 { 309 struct drv_cmd *cmd = _cmd; 310 311 cmd->val = cmd->func.read(cmd->reg); 312 } 313 314 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) 315 { 316 struct acpi_processor_performance *perf = to_perf_data(data); 317 struct drv_cmd cmd = { 318 .reg = &perf->control_register, 319 .func.read = data->cpu_freq_read, 320 }; 321 int err; 322 323 err = smp_call_function_any(mask, do_drv_read, &cmd, 1); 324 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 325 return cmd.val; 326 } 327 328 /* Called via smp_call_function_many(), on the target CPUs */ 329 static void do_drv_write(void *_cmd) 330 { 331 struct drv_cmd *cmd = _cmd; 332 333 cmd->func.write(cmd->reg, cmd->val); 334 } 335 336 static void drv_write(struct acpi_cpufreq_data *data, 337 const struct cpumask *mask, u32 val) 338 { 339 struct acpi_processor_performance *perf = to_perf_data(data); 340 struct drv_cmd cmd = { 341 .reg = &perf->control_register, 342 .val = val, 343 .func.write = data->cpu_freq_write, 344 }; 345 int this_cpu; 346 347 this_cpu = get_cpu(); 348 if (cpumask_test_cpu(this_cpu, mask)) 349 do_drv_write(&cmd); 350 351 smp_call_function_many(mask, do_drv_write, &cmd, 1); 352 put_cpu(); 353 } 354 355 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) 356 { 357 u32 val; 358 359 if (unlikely(cpumask_empty(mask))) 360 return 0; 361 362 val = drv_read(data, mask); 363 364 pr_debug("get_cur_val = %u\n", val); 365 366 return val; 367 } 368 369 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 370 { 371 struct acpi_cpufreq_data *data; 372 struct cpufreq_policy *policy; 373 unsigned int freq; 374 unsigned int cached_freq; 375 376 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); 377 378 policy = cpufreq_cpu_get_raw(cpu); 379 if (unlikely(!policy)) 380 return 0; 381 382 data = policy->driver_data; 383 if (unlikely(!data || !policy->freq_table)) 384 return 0; 385 386 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; 387 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); 388 if (freq != cached_freq) { 389 /* 390 * The dreaded BIOS frequency change behind our back. 391 * Force set the frequency on next target call. 392 */ 393 data->resume = 1; 394 } 395 396 pr_debug("cur freq = %u\n", freq); 397 398 return freq; 399 } 400 401 static unsigned int check_freqs(struct cpufreq_policy *policy, 402 const struct cpumask *mask, unsigned int freq) 403 { 404 struct acpi_cpufreq_data *data = policy->driver_data; 405 unsigned int cur_freq; 406 unsigned int i; 407 408 for (i = 0; i < 100; i++) { 409 cur_freq = extract_freq(policy, get_cur_val(mask, data)); 410 if (cur_freq == freq) 411 return 1; 412 udelay(10); 413 } 414 return 0; 415 } 416 417 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 418 unsigned int index) 419 { 420 struct acpi_cpufreq_data *data = policy->driver_data; 421 struct acpi_processor_performance *perf; 422 const struct cpumask *mask; 423 unsigned int next_perf_state = 0; /* Index into perf table */ 424 int result = 0; 425 426 if (unlikely(!data)) { 427 return -ENODEV; 428 } 429 430 perf = to_perf_data(data); 431 next_perf_state = policy->freq_table[index].driver_data; 432 if (perf->state == next_perf_state) { 433 if (unlikely(data->resume)) { 434 pr_debug("Called after resume, resetting to P%d\n", 435 next_perf_state); 436 data->resume = 0; 437 } else { 438 pr_debug("Already at target state (P%d)\n", 439 next_perf_state); 440 return 0; 441 } 442 } 443 444 /* 445 * The core won't allow CPUs to go away until the governor has been 446 * stopped, so we can rely on the stability of policy->cpus. 447 */ 448 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? 449 cpumask_of(policy->cpu) : policy->cpus; 450 451 drv_write(data, mask, perf->states[next_perf_state].control); 452 453 if (acpi_pstate_strict) { 454 if (!check_freqs(policy, mask, 455 policy->freq_table[index].frequency)) { 456 pr_debug("acpi_cpufreq_target failed (%d)\n", 457 policy->cpu); 458 result = -EAGAIN; 459 } 460 } 461 462 if (!result) 463 perf->state = next_perf_state; 464 465 return result; 466 } 467 468 unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, 469 unsigned int target_freq) 470 { 471 struct acpi_cpufreq_data *data = policy->driver_data; 472 struct acpi_processor_performance *perf; 473 struct cpufreq_frequency_table *entry; 474 unsigned int next_perf_state, next_freq, index; 475 476 /* 477 * Find the closest frequency above target_freq. 478 */ 479 if (policy->cached_target_freq == target_freq) 480 index = policy->cached_resolved_idx; 481 else 482 index = cpufreq_table_find_index_dl(policy, target_freq); 483 484 entry = &policy->freq_table[index]; 485 next_freq = entry->frequency; 486 next_perf_state = entry->driver_data; 487 488 perf = to_perf_data(data); 489 if (perf->state == next_perf_state) { 490 if (unlikely(data->resume)) 491 data->resume = 0; 492 else 493 return next_freq; 494 } 495 496 data->cpu_freq_write(&perf->control_register, 497 perf->states[next_perf_state].control); 498 perf->state = next_perf_state; 499 return next_freq; 500 } 501 502 static unsigned long 503 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 504 { 505 struct acpi_processor_performance *perf; 506 507 perf = to_perf_data(data); 508 if (cpu_khz) { 509 /* search the closest match to cpu_khz */ 510 unsigned int i; 511 unsigned long freq; 512 unsigned long freqn = perf->states[0].core_frequency * 1000; 513 514 for (i = 0; i < (perf->state_count-1); i++) { 515 freq = freqn; 516 freqn = perf->states[i+1].core_frequency * 1000; 517 if ((2 * cpu_khz) > (freqn + freq)) { 518 perf->state = i; 519 return freq; 520 } 521 } 522 perf->state = perf->state_count-1; 523 return freqn; 524 } else { 525 /* assume CPU is at P0... */ 526 perf->state = 0; 527 return perf->states[0].core_frequency * 1000; 528 } 529 } 530 531 static void free_acpi_perf_data(void) 532 { 533 unsigned int i; 534 535 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 536 for_each_possible_cpu(i) 537 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 538 ->shared_cpu_map); 539 free_percpu(acpi_perf_data); 540 } 541 542 static int cpufreq_boost_online(unsigned int cpu) 543 { 544 /* 545 * On the CPU_UP path we simply keep the boost-disable flag 546 * in sync with the current global state. 547 */ 548 return boost_set_msr(acpi_cpufreq_driver.boost_enabled); 549 } 550 551 static int cpufreq_boost_down_prep(unsigned int cpu) 552 { 553 /* 554 * Clear the boost-disable bit on the CPU_DOWN path so that 555 * this cpu cannot block the remaining ones from boosting. 556 */ 557 return boost_set_msr(1); 558 } 559 560 /* 561 * acpi_cpufreq_early_init - initialize ACPI P-States library 562 * 563 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 564 * in order to determine correct frequency and voltage pairings. We can 565 * do _PDC and _PSD and find out the processor dependency for the 566 * actual init that will happen later... 567 */ 568 static int __init acpi_cpufreq_early_init(void) 569 { 570 unsigned int i; 571 pr_debug("acpi_cpufreq_early_init\n"); 572 573 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 574 if (!acpi_perf_data) { 575 pr_debug("Memory allocation error for acpi_perf_data.\n"); 576 return -ENOMEM; 577 } 578 for_each_possible_cpu(i) { 579 if (!zalloc_cpumask_var_node( 580 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 581 GFP_KERNEL, cpu_to_node(i))) { 582 583 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 584 free_acpi_perf_data(); 585 return -ENOMEM; 586 } 587 } 588 589 /* Do initialization in ACPI core */ 590 acpi_processor_preregister_performance(acpi_perf_data); 591 return 0; 592 } 593 594 #ifdef CONFIG_SMP 595 /* 596 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 597 * or do it in BIOS firmware and won't inform about it to OS. If not 598 * detected, this has a side effect of making CPU run at a different speed 599 * than OS intended it to run at. Detect it and handle it cleanly. 600 */ 601 static int bios_with_sw_any_bug; 602 603 static int sw_any_bug_found(const struct dmi_system_id *d) 604 { 605 bios_with_sw_any_bug = 1; 606 return 0; 607 } 608 609 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 610 { 611 .callback = sw_any_bug_found, 612 .ident = "Supermicro Server X6DLP", 613 .matches = { 614 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 615 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 616 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 617 }, 618 }, 619 { } 620 }; 621 622 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 623 { 624 /* Intel Xeon Processor 7100 Series Specification Update 625 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf 626 * AL30: A Machine Check Exception (MCE) Occurring during an 627 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 628 * Both Processor Cores to Lock Up. */ 629 if (c->x86_vendor == X86_VENDOR_INTEL) { 630 if ((c->x86 == 15) && 631 (c->x86_model == 6) && 632 (c->x86_mask == 8)) { 633 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); 634 return -ENODEV; 635 } 636 } 637 return 0; 638 } 639 #endif 640 641 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 642 { 643 unsigned int i; 644 unsigned int valid_states = 0; 645 unsigned int cpu = policy->cpu; 646 struct acpi_cpufreq_data *data; 647 unsigned int result = 0; 648 struct cpuinfo_x86 *c = &cpu_data(policy->cpu); 649 struct acpi_processor_performance *perf; 650 struct cpufreq_frequency_table *freq_table; 651 #ifdef CONFIG_SMP 652 static int blacklisted; 653 #endif 654 655 pr_debug("acpi_cpufreq_cpu_init\n"); 656 657 #ifdef CONFIG_SMP 658 if (blacklisted) 659 return blacklisted; 660 blacklisted = acpi_cpufreq_blacklist(c); 661 if (blacklisted) 662 return blacklisted; 663 #endif 664 665 data = kzalloc(sizeof(*data), GFP_KERNEL); 666 if (!data) 667 return -ENOMEM; 668 669 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 670 result = -ENOMEM; 671 goto err_free; 672 } 673 674 perf = per_cpu_ptr(acpi_perf_data, cpu); 675 data->acpi_perf_cpu = cpu; 676 policy->driver_data = data; 677 678 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 679 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 680 681 result = acpi_processor_register_performance(perf, cpu); 682 if (result) 683 goto err_free_mask; 684 685 policy->shared_type = perf->shared_type; 686 687 /* 688 * Will let policy->cpus know about dependency only when software 689 * coordination is required. 690 */ 691 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 692 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 693 cpumask_copy(policy->cpus, perf->shared_cpu_map); 694 } 695 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 696 697 #ifdef CONFIG_SMP 698 dmi_check_system(sw_any_bug_dmi_table); 699 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 700 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 701 cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); 702 } 703 704 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { 705 cpumask_clear(policy->cpus); 706 cpumask_set_cpu(cpu, policy->cpus); 707 cpumask_copy(data->freqdomain_cpus, 708 topology_sibling_cpumask(cpu)); 709 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 710 pr_info_once("overriding BIOS provided _PSD data\n"); 711 } 712 #endif 713 714 /* capability check */ 715 if (perf->state_count <= 1) { 716 pr_debug("No P-States\n"); 717 result = -ENODEV; 718 goto err_unreg; 719 } 720 721 if (perf->control_register.space_id != perf->status_register.space_id) { 722 result = -ENODEV; 723 goto err_unreg; 724 } 725 726 switch (perf->control_register.space_id) { 727 case ACPI_ADR_SPACE_SYSTEM_IO: 728 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 729 boot_cpu_data.x86 == 0xf) { 730 pr_debug("AMD K8 systems must use native drivers.\n"); 731 result = -ENODEV; 732 goto err_unreg; 733 } 734 pr_debug("SYSTEM IO addr space\n"); 735 data->cpu_feature = SYSTEM_IO_CAPABLE; 736 data->cpu_freq_read = cpu_freq_read_io; 737 data->cpu_freq_write = cpu_freq_write_io; 738 break; 739 case ACPI_ADR_SPACE_FIXED_HARDWARE: 740 pr_debug("HARDWARE addr space\n"); 741 if (check_est_cpu(cpu)) { 742 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 743 data->cpu_freq_read = cpu_freq_read_intel; 744 data->cpu_freq_write = cpu_freq_write_intel; 745 break; 746 } 747 if (check_amd_hwpstate_cpu(cpu)) { 748 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 749 data->cpu_freq_read = cpu_freq_read_amd; 750 data->cpu_freq_write = cpu_freq_write_amd; 751 break; 752 } 753 result = -ENODEV; 754 goto err_unreg; 755 default: 756 pr_debug("Unknown addr space %d\n", 757 (u32) (perf->control_register.space_id)); 758 result = -ENODEV; 759 goto err_unreg; 760 } 761 762 freq_table = kzalloc(sizeof(*freq_table) * 763 (perf->state_count+1), GFP_KERNEL); 764 if (!freq_table) { 765 result = -ENOMEM; 766 goto err_unreg; 767 } 768 769 /* detect transition latency */ 770 policy->cpuinfo.transition_latency = 0; 771 for (i = 0; i < perf->state_count; i++) { 772 if ((perf->states[i].transition_latency * 1000) > 773 policy->cpuinfo.transition_latency) 774 policy->cpuinfo.transition_latency = 775 perf->states[i].transition_latency * 1000; 776 } 777 778 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 779 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 780 policy->cpuinfo.transition_latency > 20 * 1000) { 781 policy->cpuinfo.transition_latency = 20 * 1000; 782 pr_info_once("P-state transition latency capped at 20 uS\n"); 783 } 784 785 /* table init */ 786 for (i = 0; i < perf->state_count; i++) { 787 if (i > 0 && perf->states[i].core_frequency >= 788 freq_table[valid_states-1].frequency / 1000) 789 continue; 790 791 freq_table[valid_states].driver_data = i; 792 freq_table[valid_states].frequency = 793 perf->states[i].core_frequency * 1000; 794 valid_states++; 795 } 796 freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 797 perf->state = 0; 798 799 result = cpufreq_table_validate_and_show(policy, freq_table); 800 if (result) 801 goto err_freqfree; 802 803 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) 804 pr_warn(FW_WARN "P-state 0 is not max freq\n"); 805 806 switch (perf->control_register.space_id) { 807 case ACPI_ADR_SPACE_SYSTEM_IO: 808 /* 809 * The core will not set policy->cur, because 810 * cpufreq_driver->get is NULL, so we need to set it here. 811 * However, we have to guess it, because the current speed is 812 * unknown and not detectable via IO ports. 813 */ 814 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 815 break; 816 case ACPI_ADR_SPACE_FIXED_HARDWARE: 817 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 818 break; 819 default: 820 break; 821 } 822 823 /* notify BIOS that we exist */ 824 acpi_processor_notify_smm(THIS_MODULE); 825 826 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 827 for (i = 0; i < perf->state_count; i++) 828 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 829 (i == perf->state ? '*' : ' '), i, 830 (u32) perf->states[i].core_frequency, 831 (u32) perf->states[i].power, 832 (u32) perf->states[i].transition_latency); 833 834 /* 835 * the first call to ->target() should result in us actually 836 * writing something to the appropriate registers. 837 */ 838 data->resume = 1; 839 840 policy->fast_switch_possible = !acpi_pstate_strict && 841 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); 842 843 return result; 844 845 err_freqfree: 846 kfree(freq_table); 847 err_unreg: 848 acpi_processor_unregister_performance(cpu); 849 err_free_mask: 850 free_cpumask_var(data->freqdomain_cpus); 851 err_free: 852 kfree(data); 853 policy->driver_data = NULL; 854 855 return result; 856 } 857 858 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 859 { 860 struct acpi_cpufreq_data *data = policy->driver_data; 861 862 pr_debug("acpi_cpufreq_cpu_exit\n"); 863 864 policy->fast_switch_possible = false; 865 policy->driver_data = NULL; 866 acpi_processor_unregister_performance(data->acpi_perf_cpu); 867 free_cpumask_var(data->freqdomain_cpus); 868 kfree(policy->freq_table); 869 kfree(data); 870 871 return 0; 872 } 873 874 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 875 { 876 struct acpi_cpufreq_data *data = policy->driver_data; 877 878 pr_debug("acpi_cpufreq_resume\n"); 879 880 data->resume = 1; 881 882 return 0; 883 } 884 885 static struct freq_attr *acpi_cpufreq_attr[] = { 886 &cpufreq_freq_attr_scaling_available_freqs, 887 &freqdomain_cpus, 888 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 889 &cpb, 890 #endif 891 NULL, 892 }; 893 894 static struct cpufreq_driver acpi_cpufreq_driver = { 895 .verify = cpufreq_generic_frequency_table_verify, 896 .target_index = acpi_cpufreq_target, 897 .fast_switch = acpi_cpufreq_fast_switch, 898 .bios_limit = acpi_processor_get_bios_limit, 899 .init = acpi_cpufreq_cpu_init, 900 .exit = acpi_cpufreq_cpu_exit, 901 .resume = acpi_cpufreq_resume, 902 .name = "acpi-cpufreq", 903 .attr = acpi_cpufreq_attr, 904 }; 905 906 static enum cpuhp_state acpi_cpufreq_online; 907 908 static void __init acpi_cpufreq_boost_init(void) 909 { 910 int ret; 911 912 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) 913 return; 914 915 acpi_cpufreq_driver.set_boost = set_boost; 916 acpi_cpufreq_driver.boost_enabled = boost_state(0); 917 918 /* 919 * This calls the online callback on all online cpu and forces all 920 * MSRs to the same value. 921 */ 922 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online", 923 cpufreq_boost_online, cpufreq_boost_down_prep); 924 if (ret < 0) { 925 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n"); 926 return; 927 } 928 acpi_cpufreq_online = ret; 929 } 930 931 static void acpi_cpufreq_boost_exit(void) 932 { 933 if (acpi_cpufreq_online > 0) 934 cpuhp_remove_state_nocalls(acpi_cpufreq_online); 935 } 936 937 static int __init acpi_cpufreq_init(void) 938 { 939 int ret; 940 941 if (acpi_disabled) 942 return -ENODEV; 943 944 /* don't keep reloading if cpufreq_driver exists */ 945 if (cpufreq_get_current_driver()) 946 return -EEXIST; 947 948 pr_debug("acpi_cpufreq_init\n"); 949 950 ret = acpi_cpufreq_early_init(); 951 if (ret) 952 return ret; 953 954 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 955 /* this is a sysfs file with a strange name and an even stranger 956 * semantic - per CPU instantiation, but system global effect. 957 * Lets enable it only on AMD CPUs for compatibility reasons and 958 * only if configured. This is considered legacy code, which 959 * will probably be removed at some point in the future. 960 */ 961 if (!check_amd_hwpstate_cpu(0)) { 962 struct freq_attr **attr; 963 964 pr_debug("CPB unsupported, do not expose it\n"); 965 966 for (attr = acpi_cpufreq_attr; *attr; attr++) 967 if (*attr == &cpb) { 968 *attr = NULL; 969 break; 970 } 971 } 972 #endif 973 acpi_cpufreq_boost_init(); 974 975 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 976 if (ret) { 977 free_acpi_perf_data(); 978 acpi_cpufreq_boost_exit(); 979 } 980 return ret; 981 } 982 983 static void __exit acpi_cpufreq_exit(void) 984 { 985 pr_debug("acpi_cpufreq_exit\n"); 986 987 acpi_cpufreq_boost_exit(); 988 989 cpufreq_unregister_driver(&acpi_cpufreq_driver); 990 991 free_acpi_perf_data(); 992 } 993 994 module_param(acpi_pstate_strict, uint, 0644); 995 MODULE_PARM_DESC(acpi_pstate_strict, 996 "value 0 or non-zero. non-zero -> strict ACPI checks are " 997 "performed during frequency changes."); 998 999 late_initcall(acpi_cpufreq_init); 1000 module_exit(acpi_cpufreq_exit); 1001 1002 static const struct x86_cpu_id acpi_cpufreq_ids[] = { 1003 X86_FEATURE_MATCH(X86_FEATURE_ACPI), 1004 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE), 1005 {} 1006 }; 1007 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1008 1009 static const struct acpi_device_id processor_device_ids[] = { 1010 {ACPI_PROCESSOR_OBJECT_HID, }, 1011 {ACPI_PROCESSOR_DEVICE_HID, }, 1012 {}, 1013 }; 1014 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1015 1016 MODULE_ALIAS("acpi"); 1017